drm/i915: Fix vGPU balloon for ggtt guard page
Subsystems (2)
PATCH 1/1 drm/i915: Fix vGPU balloon for ggtt guard page
From commit a6508ded2a66 ("drm/i915: Use page coloring to provide the guard page at the end of the GTT"), we no longer explicitly subtract guard page at end for GGTT address space init, so shouldn't subtract that for vGPU balloon too, as that will leave that end page to be available for vGPU. Change balloon to cover full range too.
This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g cmd parser that guest kernel uses end page as scratch then try to run MI_STORE_REG_MEM onto it.
--- drivers/gpu/drm/i915/i915_vgpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
drivers/gpu/drm/i915/i915_vgpu.c +2 -2
@@ -222,9 +222,9 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv)* No need to partition out the last physical page, * because it is reserved to the guard page. */ -if (unmappable_end < ggtt_end -PAGE_SIZE ) { +if (unmappable_end < ggtt_end) { ret =vgt_balloon_space (ggtt, &bl_info.space[3 ], - unmappable_end, ggtt_end -PAGE_SIZE ); + unmappable_end, ggtt_end);if (ret) goto err; }
Signature · 6 lines
2.11.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Quoted 21 lines · Zhenyu Wang
From commit
a6508ded2a66("drm/i915: Use page coloring to provide the guard page at the end of the GTT"), we no longer explicitly subtract guard page at end for GGTT address space init, so shouldn't subtract that for vGPU balloon too, as that will leave that end page to be available for vGPU. Change balloon to cover full range too.This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g cmd parser that guest kernel uses end page as scratch then try to run
MI_STORE_REG_MEMonto it.Cc Terrence Xu <[email protected]>Signed-off-by Zhenyu Wang <[email protected]>--- drivers/gpu/drm/i915/i915_vgpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)drivers/gpu/drm/i915/i915_vgpu.c +0
-0
drivers/gpu/drm/i915/i915_vgpu.c int intel_vgt_balloon(struct drm_i915_private *dev_priv) · line 224
Quoted 3 lines
drivers/gpu/drm/i915/i915_vgpu.c +0
-0@@ -222,9 +222,9 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv)* No need to partition out the last physical page, * because it is reserved to the guard page. */
And update the comment.
Quoted 8 lines
drivers/gpu/drm/i915/i915_vgpu.c +2
-2-if (unmappable_end < ggtt_end -PAGE_SIZE ) { +if (unmappable_end < ggtt_end) { ret =vgt_balloon_space (ggtt, &bl_info.space[3 ], - unmappable_end, ggtt_end -PAGE_SIZE ); + unmappable_end, ggtt_end);if (ret) goto err; }
Signature · 5 lines
Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✗ Fi.CI.BAT: failure for drm/i915: Fix vGPU balloon for ggtt guard page
In reply to Zhenyu Wang== Series Details ==
== Series Details ==
Series: drm/i915: Fix vGPU balloon for ggtt guard page
URL : https://patchwork.freedesktop.org/series/20983/
State : failure
== Summary ==
Series 20983v1 drm/i915: Fix vGPU balloon for ggtt guard page
https://patchwork.freedesktop.org/api/1.0/series/20983/revisions/1/mbox/
Test gem_ctx_create:
Subgroup basic-files:
incomplete -> PASS (fi-skl-6700k)
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
pass -> INCOMPLETE (fi-kbl-7500u)fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 464s fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 614s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 544s fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time: 599s fi-byt-j1900 total:278 pass:251 dwarn:0 dfail:0 fail:0 skip:27 time: 508s fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 498s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 441s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 436s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 434s fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 502s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 489s fi-kbl-7500u total:51 pass:43 dwarn:0 dfail:0 fail:0 skip:7 time: 0s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 511s fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 598s fi-skl-6700k total:51 pass:43 dwarn:0 dfail:0 fail:0 skip:7 time: 0s fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 547s fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 558s fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time: 424s
789c80247ee92848a46d66a32ca723e16a261913 drm-tip: 2017y-03m-09d-12h-32m-54s UTC integration manifest 6040acc drm/i915: Fix vGPU balloon for ggtt guard page
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4113/
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
PATCH v2 1/1 drm/i915: Fix vGPU balloon for ggtt guard page
In reply to Zhenyu WangFrom commit a6508ded2a66 ("drm/i915: Use page coloring to provide the guard page at the end of the GTT"), we no longer explicitly subtract guard page at end for GGTT address space init, so shouldn't subtract that for vGPU balloon too, as that will leave that end page to be available for vGPU. Change balloon to cover full range too.
This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g cmd parser that guest kernel uses end page as scratch then try to run MI_STORE_REG_MEM onto it.
v2: remove old comments
--- drivers/gpu/drm/i915/i915_vgpu.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-)
drivers/gpu/drm/i915/i915_vgpu.c +2 -6
@@ -218,13 +218,9 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv) goto err; } -/* -* No need to partition out the last physical page, -* because it is reserved to the guard page. -*/ -if (unmappable_end < ggtt_end -PAGE_SIZE ) { +if (unmappable_end < ggtt_end) { ret =vgt_balloon_space (ggtt, &bl_info.space[3 ], - unmappable_end, ggtt_end -PAGE_SIZE ); + unmappable_end, ggtt_end);if (ret) goto err; }
Signature · 6 lines
2.11.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Quoted 6 lines · Zhenyu Wang
From commit
a6508ded2a66("drm/i915: Use page coloring to provide the guard page at the end of the GTT"), we no longer explicitly subtract guard page at end for GGTT address space init, so shouldn't subtract that for vGPU balloon too, as that will leave that end page to be available for vGPU. Change balloon to cover full range too.
Quoted 8 lines
This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g cmd parser that guest kernel uses end page as scratch then try to run
MI_STORE_REG_MEMonto it.v2: remove old comments
Cc Terrence Xu <[email protected]>Signed-off-by Zhenyu Wang <[email protected]>
-Chris
Signature · 5 lines
Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Quoted 11 lines · Chris Wilson
Quoted 10 lines · Zhenyu Wang
From commit
a6508ded2a66("drm/i915: Use page coloring to provide the guard page at the end of the GTT"), we no longer explicitly subtract guard page at end for GGTT address space init, so shouldn't subtract that for vGPU balloon too, as that will leave that end page to be available for vGPU. Change balloon to cover full range too.This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g cmd parser that guest kernel uses end page as scratch then try to run
MI_STORE_REG_MEMonto it.
Quoted 5 lines
Quoted 4 lines
v2: remove old comments
Cc Terrence Xu <[email protected]>Signed-off-by Zhenyu Wang <[email protected]>Reviewed-by Chris Wilson <[email protected]>
ping for commit to dinq, as required to run lastest drm-intel in guest.
Signature · 3 lines
Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Chris Wilson
AppliedQuoted 12 lines · Zhenyu Wang
Quoted 11 lines · Chris Wilson
Quoted 10 lines · Zhenyu Wang
From commit
a6508ded2a66("drm/i915: Use page coloring to provide the guard page at the end of the GTT"), we no longer explicitly subtract guard page at end for GGTT address space init, so shouldn't subtract that for vGPU balloon too, as that will leave that end page to be available for vGPU. Change balloon to cover full range too.This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g cmd parser that guest kernel uses end page as scratch then try to run
MI_STORE_REG_MEMonto it.
Quoted 7 lines
Quoted 5 lines
Quoted 4 lines
v2: remove old comments
Cc Terrence Xu <[email protected]>Signed-off-by Zhenyu Wang <[email protected]>Reviewed-by Chris Wilson <[email protected]>ping for commit to dinq, as required to run lastest drm-intel in guest.
Applied, I had assumed you would pick up the gvt tree. -Chris
Signature · 5 lines
Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Quoted 15 lines · Chris Wilson
Quoted 14 lines · Zhenyu Wang
Quoted 13 lines · Chris Wilson
Quoted 12 lines · Zhenyu Wang
From commit
a6508ded2a66("drm/i915: Use page coloring to provide the guard page at the end of the GTT"), we no longer explicitly subtract guard page at end for GGTT address space init, so shouldn't subtract that for vGPU balloon too, as that will leave that end page to be available for vGPU. Change balloon to cover full range too.This fixes to use recent drm-intel tip kernel for guest OS. Found by GVT-g cmd parser that guest kernel uses end page as scratch then try to run
MI_STORE_REG_MEMonto it.v2: remove old comments
Quoted 7 lines
Quoted 5 lines
Quoted 3 lines
Quoted 2 lines
Cc Terrence Xu <[email protected]>Signed-off-by Zhenyu Wang <[email protected]>Reviewed-by Chris Wilson <[email protected]>ping for commit to dinq, as required to run lastest drm-intel in guest.
Applied, I had assumed you would pick up the gvt tree.
oh, no, this depends on i915 change, so should align there.
Signature · 3 lines
Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✓ Fi.CI.BAT: success for drm/i915: Fix vGPU balloon for ggtt guard page (rev2)
In reply to Zhenyu Wang== Series Details ==
== Series Details ==
Series: drm/i915: Fix vGPU balloon for ggtt guard page (rev2)
URL : https://patchwork.freedesktop.org/series/20983/
State : success
== Summary ==
Series 20983v2 drm/i915: Fix vGPU balloon for ggtt guard page
https://patchwork.freedesktop.org/api/1.0/series/20983/revisions/2/mbox/
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
incomplete -> PASS (fi-skl-6700hq) fdo#100130fdo#100130 https://bugs.freedesktop.org/show_bug.cgi?id=100130
fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 463s fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 608s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 534s fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time: 605s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 439s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 494s fi-kbl-7500u total:278 pass:259 dwarn:1 dfail:0 fail:0 skip:18 time: 480s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 505s fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 592s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 504s
efa9a3649bd94a4f35911aaecc723e041d8b99c5 drm-tip: 2017y-03m-09d-21h-28m-20s UTC integration manifest 041cc98 drm/i915: Fix vGPU balloon for ggtt guard page
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4129/
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Patchwork
CI✓ Fi.CI.BAT: success for drm/i915: Fix vGPU balloon for ggtt guard page (rev2)
In reply to Zhenyu Wang== Series Details ==
== Series Details ==
Series: drm/i915: Fix vGPU balloon for ggtt guard page (rev2)
URL : https://patchwork.freedesktop.org/series/20983/
State : success
== Summary ==
Series 20983v2 drm/i915: Fix vGPU balloon for ggtt guard page
https://patchwork.freedesktop.org/api/1.0/series/20983/revisions/2/mbox/
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
incomplete -> PASS (fi-skl-6700hq) fdo#100130fdo#100130 https://bugs.freedesktop.org/show_bug.cgi?id=100130
fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time: 463s fi-bsw-n3050 total:278 pass:239 dwarn:0 dfail:0 fail:0 skip:39 time: 608s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time: 534s fi-bxt-t5700 total:278 pass:258 dwarn:0 dfail:0 fail:0 skip:20 time: 605s fi-byt-n2820 total:278 pass:247 dwarn:0 dfail:0 fail:0 skip:31 time: 500s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 444s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time: 439s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time: 439s fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 516s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time: 494s fi-kbl-7500u total:278 pass:259 dwarn:1 dfail:0 fail:0 skip:18 time: 480s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 505s fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time: 592s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time: 504s fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time: 552s fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time: 559s fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time: 421s
efa9a3649bd94a4f35911aaecc723e041d8b99c5 drm-tip: 2017y-03m-09d-21h-28m-20s UTC integration manifest 041cc98 drm/i915: Fix vGPU balloon for ggtt guard page
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4129/
_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx