ZII Devel C: Wire up switch interrupts
cover ZII Devel C: Wire up switch interrupts
Both switches have a GPIO line on the SoC for interrupts. Add this to the device tree.
The PHYs embedded in the switches support generating interrupts. These are channel through the switch interrupt line. Add this to the device tree as well.
Andrew Lunn (2):
ARM: dts: vf610-zii-dev: Wire up devel C switch interrupts
ARM: dts: vf610-zii-dev-c: Wire up PHY interrupts
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 12 ----- arch/arm/boot/dts/vf610-zii-dev-rev-c.dts | 77 +++++++++++++++++++++++++++++++ arch/arm/boot/dts/vf610-zii-dev.dtsi | 12 +++++ 3 files changed, 89 insertions(+), 12 deletions(-)
Signature · 1 line
2.11.0
PATCH 1/2 ARM: dts: vf610-zii-dev: Wire up devel C switch interrupts
The devel B and devel C board use the same GPIO lines for interrupts from the two switches. Move the pinmux nodes from devel B into the shared .dtsi file, and wire up the interrupts on devel C.
--- arch/arm/boot/dts/vf610-zii-dev-rev-b.dts | 12 ------------ arch/arm/boot/dts/vf610-zii-dev-rev-c.dts | 12 ++++++++++++ arch/arm/boot/dts/vf610-zii-dev.dtsi | 12 ++++++++++++ 3 files changed, 24 insertions(+), 12 deletions(-)
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts +0 -12
@@ -459,18 +459,6 @@ >; }; - pinctrl_gpio_switch0: pinctrl-gpio-switch0 { - fsl,pins = < - VF610_PAD_PTB5__GPIO_27 0x219d - >; - }; - - pinctrl_gpio_switch1: pinctrl-gpio-switch1 { - fsl,pins = < - VF610_PAD_PTB4__GPIO_26 0x219d - >; - }; - pinctrl_mdio_mux: pinctrl-mdio-mux { fsl,pins = < VF610_PAD_PTA18__GPIO_8 0x31c2
arch/arm/boot/dts/vf610-zii-dev-rev-c.dts +12 -0
@@ -67,11 +67,17 @@ switch0: switch@0 { compatible = "marvell,mv88e6190"; + pinctrl-0 = <&pinctrl_gpio_switch0>; + pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; reg = <0>; dsa,member = <0 0>; eeprom-length = <512>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; ports { #address-cells = <1>;
@@ -125,11 +131,17 @@ switch1: switch at 0 { compatible = "marvell,mv88e6190"; + pinctrl-0 = <&pinctrl_gpio_switch1>; + pinctrl-names = "default"; #address-cells = <1>; #size-cells = <0>; reg = <0>; dsa,member = <0 1>; eeprom-length = <512>; + interrupt-parent = <&gpio0>; + interrupts = <26 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; ports { #address-cells = <1>;
arch/arm/boot/dts/vf610-zii-dev.dtsi +12 -0
@@ -296,6 +296,18 @@ >; }; + pinctrl_gpio_switch0: pinctrl-gpio-switch0 { + fsl,pins = < + VF610_PAD_PTB5__GPIO_27 0x219d + >; + }; + + pinctrl_gpio_switch1: pinctrl-gpio-switch1 { + fsl,pins = < + VF610_PAD_PTB4__GPIO_26 0x219d + >; + }; + pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset { fsl,pins = < VF610_PAD_PTE14__GPIO_119 0x31c2
Signature · 1 line
2.11.0
PATCH 2/2 ARM: dts: vf610-zii-dev-c: Wire up PHY interrupts
In reply to Andrew LunnThe PHYs embedded in the switch direct there interrupts through the switch interrupt controllers. Now that devel C has its switch interrupts connected to the SoC, the PHY interrupts can be used by phylib. Explicitly include MDIO nodes in the switch device tree nodes, and link the PHY interrupts back to the switch interrupt controller. Also, link the ports to the PHYs on the MDIO bus.
--- arch/arm/boot/dts/vf610-zii-dev-rev-c.dts | 65 +++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+)
arch/arm/boot/dts/vf610-zii-dev-rev-c.dts +65 -0
@@ -97,21 +97,25 @@ port at 1 { reg = <1>; label = "lan1"; + phy-handle = <&switch0phy1>; }; port at 2 { reg = <2>; label = "lan2"; + phy-handle = <&switch0phy2>; }; port at 3 { reg = <3>; label = "lan3"; + phy-handle = <&switch0phy3>; }; port at 4 { reg = <4>; label = "lan4"; + phy-handle = <&switch0phy4>; }; switch0port10: port at 10 {
@@ -121,6 +125,35 @@ link = <&switch1port10>; }; }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch0phy1: switch0phy at 1 { + reg = <1>; + interrupt-parent = <&switch0>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; + }; + + switch0phy2: switch0phy at 2 { + reg = <2>; + interrupt-parent = <&switch0>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + }; + + switch0phy3: switch0phy at 3 { + reg = <3>; + interrupt-parent = <&switch0>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + }; + + switch0phy4: switch0phy at 4 { + reg = <4>; + interrupt-parent = <&switch0>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + }; + }; }; };
@@ -150,21 +183,25 @@ port at 1 { reg = <1>; label = "lan5"; + phy-handle = <&switch1phy1>; }; port at 2 { reg = <2>; label = "lan6"; + phy-handle = <&switch1phy2>; }; port at 3 { reg = <3>; label = "lan7"; + phy-handle = <&switch1phy3>; }; port at 4 { reg = <4>; label = "lan8"; + phy-handle = <&switch1phy4>; };
@@ -175,6 +212,34 @@ link = <&switch0port10>; }; }; + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch1phy1: switch1phy at 1 { + reg = <1>; + interrupt-parent = <&switch1>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; + }; + + switch1phy2: switch1phy at 2 { + reg = <2>; + interrupt-parent = <&switch1>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + }; + + switch1phy3: switch1phy at 3 { + reg = <3>; + interrupt-parent = <&switch1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + }; + + switch1phy4: switch1phy at 4 { + reg = <4>; + interrupt-parent = <&switch1>; + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + }; + }; }; };
Signature · 1 line
2.11.0
Shawn Guo
Appliedcover ZII Devel C: Wire up switch interrupts
In reply to Andrew LunnQuoted 3 lines · Andrew Lunn
Andrew Lunn (2):
ARM: dts: vf610-zii-dev: Wire up devel C switch interrupts
ARM: dts: vf610-zii-dev-c: Wire up PHY interrupts
Applied both, thanks.