STM32 CRC crypto driver
Subsystems (3)
cover STM32 CRC crypto driver
This set of patches adds a new crypto driver for STMicroelectronics stm32f746. The drivers uses the crypto API and provides with an HW-enabled CRC32 algorithm. It was developed and tested (tcrypt / testmgr) on evaluation board stm32746g.
Fabien Dessenne (4):
dt-bindings: Document STM32 CRC bindings
crypto: stm32 - Support for STM32 CRC32 crypto module
ARM: dts: stm32: Add CRC support to stm32f746
ARM: dts: stm32: enable CRC on stm32746g-eval board
.../devicetree/bindings/crypto/st,stm32-crc.txt | 16 + arch/arm/boot/dts/stm32746g-eval.dts | 4 + arch/arm/boot/dts/stm32f746.dtsi | 7 + drivers/crypto/Kconfig | 2 + drivers/crypto/Makefile | 1 + drivers/crypto/stm32/Kconfig | 8 + drivers/crypto/stm32/Makefile | 2 + drivers/crypto/stm32/stm32_crc32.c | 325 +++++++++++++++++++++ 8 files changed, 365 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/st,stm32-crc.txt create mode 100644 drivers/crypto/stm32/Kconfig create mode 100644 drivers/crypto/stm32/Makefile create mode 100644 drivers/crypto/stm32/stm32_crc32.c
Signature · 1 line
2.7.4
PATCH 1/4 dt-bindings: Document STM32 CRC bindings
Document device tree bindings for the STM32 CRC (crypto CRC32)
--- .../devicetree/bindings/crypto/st,stm32-crc.txt | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/st,stm32-crc.txt
Documentation/devicetree/bindings/crypto/st,stm32-crc.txt new file +16 -0
@@ -0,0 +1,16 @@ +* STMicroelectronics STM32 CRC + +Required properties: +- compatible: shoudl be "st,stm32f7-crc". +- reg: The address and length of the peripheral registers space +- clocks: The input clock of the CRC instance + +Optional properties: none + +Example: + +crc: crc at 40023000 { + compatible = "st,stm32f7-crc"; + reg = <0x40023000 0x400>; + clocks = <&rcc 0 12>; +};
Signature · 1 line
2.7.4
PATCH 2/4 crypto: stm32 - Support for STM32 CRC32 crypto module
In reply to Fabien DessenneThis module registers a CRC32 ("Ethernet") and a CRC32C (Castagnoli) algorithm that make use of the STMicroelectronics STM32 crypto hardware.
Theses algorithms are compatible with the little-endian generic ones. Both algorithms use ~0 as default seed (key).
With CRC32C the output is xored with ~0.
Using TCRYPT CRC32C speed test, this shows up to 900% speedup compared to the crc32c-generic algorithm.
--- drivers/crypto/Kconfig | 2 + drivers/crypto/Makefile | 1 + drivers/crypto/stm32/Kconfig | 8 + drivers/crypto/stm32/Makefile | 2 + drivers/crypto/stm32/stm32_crc32.c | 325 +++++++++++++++++++++++++++++++++++++ 5 files changed, 338 insertions(+) create mode 100644 drivers/crypto/stm32/Kconfig create mode 100644 drivers/crypto/stm32/Makefile create mode 100644 drivers/crypto/stm32/stm32_crc32.c
drivers/crypto/Kconfig +2 -0
@@ -619,4 +619,6 @@ config CRYPTO_DEV_BCM_SPU Secure Processing Unit (SPU). The SPU driver registers ablkcipher, ahash, and aead algorithms with the kernel cryptographic API. +source "drivers/crypto/stm32/Kconfig" + endif # CRYPTO_HW
drivers/crypto/Makefile +1 -0
@@ -30,6 +30,7 @@ obj-$(CONFIG_CRYPTO_DEV_QCE) += qce/ obj-$(CONFIG_CRYPTO_DEV_ROCKCHIP) += rockchip/ obj-$(CONFIG_CRYPTO_DEV_S5P) += s5p-sss.o obj-$(CONFIG_CRYPTO_DEV_SAHARA) += sahara.o +obj-$(CONFIG_CRYPTO_DEV_STM32) += stm32/ obj-$(CONFIG_CRYPTO_DEV_SUN4I_SS) += sunxi-ss/ obj-$(CONFIG_CRYPTO_DEV_TALITOS) += talitos.o obj-$(CONFIG_CRYPTO_DEV_UX500) += ux500/
drivers/crypto/stm32/Kconfig new file +8 -0
@@ -0,0 +1,8 @@ +config CRYPTO_DEV_STM32 + tristate "Support for STM32 crypto accelerators" + depends on ARCH_STM32 + select CRYPTO_HASH + help + This enables support for the CRC32 hw accelerator which can be found + on STMicroelectronis STM32 SOC. +
drivers/crypto/stm32/Makefile new file +2 -0
@@ -0,0 +1,2 @@ +obj-$(CONFIG_CRYPTO_DEV_STM32) += stm32_cryp.o +stm32_cryp-objs := stm32_crc32.o
drivers/crypto/stm32/stm32_crc32.c new file +325 -0
325 lines not on this page · raw message
Signature · 1 line
2.7.4
PATCH 2/4 crypto: stm32 - Support for STM32 CRC32 crypto module
drivers/crypto/stm32/stm32_crc32.c line 301
Quoted 12 lines · Fabien Dessenne
drivers/crypto/stm32/stm32_crc32.c new file +12
-0+static int stm32_crc_remove (struct platform_device *pdev) +{ +struct stm32_crc *crc =platform_get_drvdata (pdev); + +spin_lock (&crc_list.lock); +list_del (&crc->list); +spin_unlock (&crc_list.lock); + +crypto_unregister_shash (algs); + +if (crc && crc->clk) +clk_disable_unprepare (crc->clk);
Hello
No need to test for crc, if it was NULL, you dereference it just before in list_del. Furthermore, It seems that clk_disable_unprepare() handle perfectly NULL, so no test is needed.
Regards
Corentin Labbe
PATCH 3/4 ARM: dts: stm32: Add CRC support to stm32f746
In reply to Fabien DessenneAdd CRC (CRC32 crypto) support to stm32f746.
--- arch/arm/boot/dts/stm32f746.dtsi | 7 +++++++ 1 file changed, 7 insertions(+)
arch/arm/boot/dts/stm32f746.dtsi +7 -0
@@ -289,6 +289,13 @@ }; }; + crc: crc at 40023000 { + compatible = "st,stm32f7-crc"; + reg = <0x40023000 0x400>; + clocks = <&rcc 0 12>; + status = "disabled"; + }; + rcc: rcc at 40023800 { #clock-cells = <2>; compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
Signature · 1 line
2.7.4
PATCH 4/4 ARM: dts: stm32: enable CRC on stm32746g-eval board
In reply to Fabien DessenneEnable the CRC (CRC32 crypto) on stm32746g-eval board
--- arch/arm/boot/dts/stm32746g-eval.dts | 4 ++++ 1 file changed, 4 insertions(+)
arch/arm/boot/dts/stm32746g-eval.dts +4 -0
@@ -89,6 +89,10 @@ clock-frequency = <25000000>; }; +&crc { + status = "okay"; +}; + &usart1 { pinctrl-0 = <&usart1_pins_a>; pinctrl-names = "default";
Signature · 1 line
2.7.4