gpio: mvebu: Add PWM fan support
Subsystems (5)
v2 cover gpio: mvebu: Add PWM fan support
Hi everyone
This patch series was originally submitted by Andrew Lunn but got stalled. I picked up the series and addressed what was discussed for the earlier submission with some helpful input from Andrew. Hopefully this time support for the PWM fan as found on Linksys WRT1900AC (Mamba) will make it in.
Implementing as an MFD was discarded due to backward compatibility. The original discussion can be read at [1].
This series depends on two cleanup series. The first [2] ("gpio: mvebu:
preparatory cleanup for pwm-fan support") got applied but has yet to appear in linux-next. The second one [3] ("gpio: mvebu: use BIT macro instead of bit shifting") is still pending review.
[1] https://patchwork.ozlabs.org/patch/427287/
[2] https://lkml.org/lkml/2017/3/16/62
[3] https://lkml.org/lkml/2017/3/17/493
---
Changes v1 -> v2:
Patch 1/4 gpio: mvebu: Add limited PWM support:
* use BIT macro (suggested by Linus Walleij)
* move id from struct mvebu_pwm to struct mvebu_gpio_chip, implement blink select as if else and comment on the chip id for code clarity (to accommodate Linus Walleijs request for a code clarification / comment. If you can word it better I'm all ears.)
* Move function comment mvebu_pwm_probe into the function itself.
---
Pending:
* Needs ACK from Thierry Reding to be merged via linux-gpio tree by Linus Walleij.
---
Andrew Lunn (4):
gpio: mvebu: Add limited PWM support
mvebu: xp: Add pwm properties to .dtsi files
ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan
.../devicetree/bindings/gpio/gpio-mvebu.txt | 31 +++ MAINTAINERS | 2 + arch/arm/boot/dts/armada-370.dtsi | 10 +- arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 +- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 +- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 +- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 +- arch/arm/configs/mvebu_v7_defconfig | 2 + drivers/gpio/gpio-mvebu.c | 291 +++++++++++++++++++-- 9 files changed, 342 insertions(+), 30 deletions(-)
Signature · 1 line
2.10.2
PATCH v2 1/4 gpio: mvebu: Add limited PWM support
From: Andrew Lunn <[email protected]>
Armada 370/XP devices can 'blink' gpio lines with a configurable on and off period. This can be modelled as a PWM.
However, there are only two sets of PWM configuration registers for all the gpio lines. This driver simply allows a single gpio line per gpio chip of 32 lines to be used as a PWM. Attempts to use more return EBUSY.
Due to the interleaving of registers it is not simple to separate the PWM driver from the gpio driver. Thus the gpio driver has been extended with a PWM driver.
URL: https://patchwork.ozlabs.org/patch/427287/
URL: https://patchwork.ozlabs.org/patch/427295/
[Ralph Sennhauser:
* port forward
* merge pwm portion into gpio-mvebu.c
* merge documentation patch
* update MAINTAINERS]
--- .../devicetree/bindings/gpio/gpio-mvebu.txt | 31 +++ MAINTAINERS | 2 + drivers/gpio/gpio-mvebu.c | 291 +++++++++++++++++++-- 3 files changed, 307 insertions(+), 17 deletions(-)
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +31 -0
@@ -38,6 +38,23 @@ Required properties: - #gpio-cells: Should be two. The first cell is the pin number. The second cell is reserved for flags, unused at the moment. +Optional properties: + +In order to use the gpio lines in PWM mode, some additional optional +properties are required. Only Armada 370 and XP support these properties. + +- reg: an additional register set is needed, for the GPIO Blink + Counter on/off registers. + +- reg-names: Must contain an entry "pwm" corresponding to the + additional register range needed for pwm operation. + +- #pwm-cells: Should be two. The first cell is the pin number. The + second cell is reserved for flags and should be set to 0, so it has a + known value. It then becomes possible to use it in the future. + +- clocks: Must be a phandle to the clock for the gpio controller. + Example: gpio0: gpio@d0018100 {
@@ -51,3 +68,17 @@ Example: #interrupt-cells = <2>; interrupts = <16>, <17>, <18>, <19>; }; + + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio"; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; + ngpios = <17>; + gpio-controller; + #gpio-cells = <2>; + #pwm-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <87>, <88>, <89>; + clocks = <&coreclk 0>; + };
MAINTAINERS +2 -0
@@ -10266,6 +10266,8 @@ F: include/linux/pwm.h F: drivers/pwm/ F: drivers/video/backlight/pwm_bl.c F: include/linux/pwm_backlight.h +F: drivers/gpio/gpio-mvebu.c +F: Documentation/devicetree/bindings/gpio/gpio-mvebu.txt PXA2xx/PXA3xx SUPPORT M: Daniel Mack <[email protected]>
drivers/gpio/gpio-mvebu.c +274 -17
378 lines not on this page · raw message
Signature · 1 line
2.10.2
Rob Herring
maintainerRe: [PATCH v2 1/4] gpio: mvebu: Add limited PWM support
Quoted 39 lines · Ralph Sennhauser
From: Andrew Lunn <[email protected]>
Armada 370/XP devices can 'blink' gpio lines with a configurable on and off period. This can be modelled as a PWM.
However, there are only two sets of PWM configuration registers for all the gpio lines. This driver simply allows a single gpio line per gpio chip of 32 lines to be used as a PWM. Attempts to use more return EBUSY.
Due to the interleaving of registers it is not simple to separate the PWM driver from the gpio driver. Thus the gpio driver has been extended with a PWM driver.
Signed-off-by Andrew Lunn <[email protected]>URL: https://patchwork.ozlabs.org/patch/427287/
URL: https://patchwork.ozlabs.org/patch/427295/
[Ralph Sennhauser:
* port forward
* merge pwm portion intogpio-mvebu.c
* merge documentation patch
* updateMAINTAINERS]Signed-off-by Ralph Sennhauser <[email protected]>--- .../devicetree/bindings/gpio/gpio-mvebu.txt | 31 +++ MAINTAINERS | 2 + drivers/gpio/gpio-mvebu.c | 291 +++++++++++++++++++-- 3 files changed, 307 insertions(+), 17 deletions(-)Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +2
-0@@ -38,6 +38,23 @@ Required properties: - #gpio-cells: Should be two. The first cell is the pin number. The second cell is reserved for flags, unused at the moment. +Optional properties: +
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt Required properties: · line 52
Quoted 10 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +10
-0+In order to use the gpio lines in PWM mode, some additional optional +properties are required. Only Armada 370 and XP support these properties. + +- reg: an additional register set is needed, for the GPIO Blink + Counter on/off registers. + +- reg-names: Must contain an entry "pwm" corresponding to the + additional register range needed for pwm operation. + +- #pwm-cells: Should be two. The first cell is the pin number. The
s/pin number/gpio line/ ?
Quoted 9 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +5
-0+ second cell is reserved for flags and should be set to 0, so it has a + known value. It then becomes possible to use it in the future. + +- clocks: Must be a phandle to the clock for the gpio controller. + Example: gpio0: gpio@d0018100 {
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt Example: · line 73
Quoted 6 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +3
-0@@ -51,3 +68,17 @@ Example: #interrupt-cells = <2>; interrupts = <16>, <17>, <18>, <19>; }; + + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio";
If only 370 and XP support this, I'd expect a compatible string for one of them here.
Quoted 11 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +11
-0+ reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; + ngpios = <17>; + gpio-controller; + #gpio-cells = <2>; + #pwm-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <87>, <88>, <89>; + clocks = <&coreclk 0>; + };
Re: [PATCH v2 1/4] gpio: mvebu: Add limited PWM support
Quoted 40 lines · On Fri, 24 Mar 2017 10:18:29 -0500 Rob Herring…
Quoted 39 lines · Ralph Sennhauser
From: Andrew Lunn <[email protected]>
Armada 370/XP devices can 'blink' gpio lines with a configurable on and off period. This can be modelled as a PWM.
However, there are only two sets of PWM configuration registers for all the gpio lines. This driver simply allows a single gpio line per gpio chip of 32 lines to be used as a PWM. Attempts to use more return EBUSY.
Due to the interleaving of registers it is not simple to separate the PWM driver from the gpio driver. Thus the gpio driver has been extended with a PWM driver.
Signed-off-by Andrew Lunn <[email protected]>URL: https://patchwork.ozlabs.org/patch/427287/
URL: https://patchwork.ozlabs.org/patch/427295/
[Ralph Sennhauser:
* port forward
* merge pwm portion intogpio-mvebu.c
* merge documentation patch
* updateMAINTAINERS]Signed-off-by Ralph Sennhauser <[email protected]>--- .../devicetree/bindings/gpio/gpio-mvebu.txt | 31 +++ MAINTAINERS | 2 + drivers/gpio/gpio-mvebu.c | 291+++++++++++++++++++-- 3 files changed, 307 insertions(+), 17 deletions(-)
(quoted diff) +0
-0
b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txtindex a6f3bec..86932e3 100644 ---a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt+++b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt@@ -38,6 +38,23 @@ Required properties:
- #gpio-cells: Should be two. The first cell is the pin number. The second cell is reserved for flags, unused at the moment.
Quoted 15 lines
Quoted 12 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +3
-0+Optional properties: + +In order to use the gpio lines in PWM mode, some additionaloptional +properties are required. Only Armada 370 and XP support these properties. +
+- reg: an additional register set is needed, for the GPIO BlinkDocumentation/devicetree/bindings/gpio/gpio-mvebu.txt +6
-0+ Counter on/off registers. + +- reg-names: Must contain an entry "pwm" corresponding to the + additional register range needed for pwm operation. + +- #pwm-cells: Should be two. The first cell is the pin number.Quoted 1 line
The
s/pin number/gpio line/ ?
Better indeed.
Quoted 9 lines
Quoted 9 lines
+ second cell is reserved for flags and should be set to 0, so it has a
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +4
-0+ known value. It then becomes possible to use it in the future. + +- clocks: Must be a phandle to the clock for the gpio controller. + Example:
Quoted 11 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt Example: · line 73
Quoted 8 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +3
-0gpio0: gpio@d0018100 {@@ -51,3 +68,17 @@ Example: #interrupt-cells = <2>; interrupts = <16>, <17>, <18>, <19>; }; + + gpio1: gpio@18140 { + compatible = "marvell,orion-gpio";If only 370 and XP support this, I'd expect a compatible string for one of them here.
Commit 5f79c651e81e ("arm: mvebu: use global interrupts for GPIOs on Armada XP") changes it from "marvell,armadaxp-gpio". The commit message says for 3.8 basically leaving it open for a "fix" later.
Adding Thomas Petazzoni as the author.
Thomas, would you happen to know if this is still how it's supposed to be for now?
Thanks
Ralph
Quoted 12 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt Example: · line 84
Quoted 12 lines
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +11
-0+ reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; + ngpios = <17>; + gpio-controller; + #gpio-cells = <2>; + #pwm-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <87>, <88>, <89>; + clocks = <&coreclk 0>; + };
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PATCH v2 2/4 mvebu: xp: Add pwm properties to .dtsi files
In reply to Ralph SennhauserFrom: Andrew Lunn <[email protected]>
Add properties to the gpio nodes to allow them to be also used as pwm lines.
URL: https://patchwork.ozlabs.org/patch/427294/
--- arch/arm/boot/dts/armada-370.dtsi | 10 ++++++++-- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++-- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 ++++++-- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++-- 4 files changed, 30 insertions(+), 8 deletions(-)
arch/arm/boot/dts/armada-370.dtsi +8 -2
@@ -138,24 +138,30 @@ gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio at 18180 {
arch/arm/boot/dts/armada-xp-mv78230.dtsi +8 -2
@@ -203,24 +203,30 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <17>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>; + clocks = <&coreclk 0>; }; }; };
arch/arm/boot/dts/armada-xp-mv78260.dtsi +6 -2
@@ -286,24 +286,28 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; ngpios = <32>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio at 18180 {
arch/arm/boot/dts/armada-xp-mv78460.dtsi +8 -2
@@ -324,24 +324,30 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio at 18180 {
Signature · 1 line
2.10.2
Re: [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
Hi Ralph,
On sam., mars 18 2017, Ralph Sennhauser <[email protected]> wrote:
It seems that I don't receive the 1st patch of the series.
Also could you refresh my mind to expose why these patchse were not apply the first time and why we should apply them now?
Thanks,
Gregory
Quoted 164 lines
From: Andrew Lunn <[email protected]>
Add properties to the gpio nodes to allow them to be also used as pwm lines.
Signed-off-by Andrew Lunn <[email protected]>URL: https://patchwork.ozlabs.org/patch/427294/
Signed-off-by Ralph Sennhauser <[email protected]>--- arch/arm/boot/dts/armada-370.dtsi | 10 ++++++++-- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++-- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 ++++++-- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++-- 4 files changed, 30 insertions(+), 8 deletions(-)arch/arm/boot/dts/armada-370.dtsi +8
-2@@ -138,24 +138,30 @@ gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio at 18180 {arch/arm/boot/dts/armada-xp-mv78230.dtsi +8
-2@@ -203,24 +203,30 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <17>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>; + clocks = <&coreclk 0>; }; }; };arch/arm/boot/dts/armada-xp-mv78260.dtsi +6
-2@@ -286,24 +286,28 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; ngpios = <32>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio at 18180 {arch/arm/boot/dts/armada-xp-mv78460.dtsi +8
-2@@ -324,24 +324,30 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>; }; gpio2: gpio at 18180 {Signature · 1 line
2.10.2
Signature · 4 lines
Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
Andrew Lunn
maintainerRe: [PATCH v2 2/4] mvebu: xp: Add pwm properties to .dtsi files
Quoted 2 lines
Also could you refresh my mind to expose why these patchse were not apply the first time and why we should apply them now?
Hi Gregory
Because i got busy with other things, and never spent the time needed to address the comments. Ralph has addressed all the comments from the original posting.
Andrew
PATCH v2 2/4 mvebu: xp: Add pwm properties to .dtsi files
In reply to Gregory CLEMENTQuoted 6 lines · On Thu, 23 Mar 2017 17:40:53 +0100 Gregory CLEMENT…
Hi Ralph,
On sam., mars 18 2017, Ralph Sennhauser <[email protected]>
wrote:It seems that I don't receive the 1st patch of the series.
Hi Gregory,
it makes no sense to only send part of a series to a recipient. Will have to improve my use of --cc-cmd it seems. Will pay attention to this for v3.
Sorry
Ralph
Quoted 188 lines
Also could you refresh my mind to expose why these patchse were not apply the first time and why we should apply them now?
Thanks,
Gregory
Quoted 178 lines
From: Andrew Lunn <[email protected]>
Add properties to the gpio nodes to allow them to be also used as pwm lines.
Signed-off-by Andrew Lunn <[email protected]>URL: https://patchwork.ozlabs.org/patch/427294/
Signed-off-by Ralph Sennhauser <[email protected]>--- arch/arm/boot/dts/armada-370.dtsi | 10 ++++++++-- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++-- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 ++++++-- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++-- 4 files changed, 30 insertions(+), 8 deletions(-)(quoted diff) +0
-0
b/arch/arm/boot/dts/armada-370.dtsiindex cc011c8..aa9fe72 100644arch/arm/boot/dts/armada-370.dtsi +7
-2@@ -138,24 +138,30 @@ gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>,<90>;
arch/arm/boot/dts/armada-370.dtsi +1
-0+ clocks = <&coreclk 0>; }; gpio2: gpio at 18180 {(quoted diff) +0
-0
b/arch/arm/boot/dts/armada-xp-mv78230.dtsiindex 07c5090..fc3934f 100644 ---a/arch/arm/boot/dts/armada-xp-mv78230.dtsi+++b/arch/arm/boot/dts/armada-xp-mv78230.dtsiarch/arm/boot/dts/armada-xp-mv78230.dtsi +8
-2@@ -203,24 +203,30 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <17>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>; + clocks = <&coreclk 0>;(quoted diff) +0
-0}; }; };(quoted diff) +0
-0
b/arch/arm/boot/dts/armada-xp-mv78260.dtsiindex 64e936a..04dda6a 100644 ---a/arch/arm/boot/dts/armada-xp-mv78260.dtsi+++b/arch/arm/boot/dts/armada-xp-mv78260.dtsiarch/arm/boot/dts/armada-xp-mv78230.dtsi +6
-2@@ -286,24 +286,28 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; ngpios = <32>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>;arch/arm/boot/dts/armada-370.dtsi +0
-0}; gpio2: gpio at 18180 {(quoted diff) +0
-0
b/arch/arm/boot/dts/armada-xp-mv78460.dtsiindex d1383dd..fb6d28a 100644 ---a/arch/arm/boot/dts/armada-xp-mv78460.dtsi+++b/arch/arm/boot/dts/armada-xp-mv78460.dtsiarch/arm/boot/dts/armada-xp-mv78460.dtsi +7
-2@@ -324,24 +324,30 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>,<90>;
arch/arm/boot/dts/armada-370.dtsi +1
-0+ clocks = <&coreclk 0>; }; gpio2: gpio at 18180 {Signature · 1 line
2.10.2
PATCH v2 2/4 mvebu: xp: Add pwm properties to .dtsi files
Hi Ralph,
Quoted 5 lines · Ralph Sennhauser
Quoted 2 lines · On Thu, 23 Mar 2017 17:40:53 +0100 Gregory CLEMENT…
Hi Ralph,
Quoted 8 lines
Quoted 4 lines
On sam., mars 18 2017, Ralph Sennhauser <[email protected]>
wrote:It seems that I don't receive the 1st patch of the series.
Hi Gregory,
it makes no sense to only send part of a series to a recipient. Will
To be frank it depends. Some maintainers don't want to receive a patch which is not related to their subsystem. But it is not my case, I prefer to have the full picture.
Quoted 2 lines
have to improve my use of --cc-cmd it seems. Will pay attention to this for v3.
Also don't forget to add te cover letter too if you have written one.
Thanks!
Gregory
Quoted 198 lines
Sorry
RalphQuoted 183 lines
Also could you refresh my mind to expose why these patchse were not apply the first time and why we should apply them now?
Thanks,
Gregory
Quoted 174 lines
From: Andrew Lunn <[email protected]>
Add properties to the gpio nodes to allow them to be also used as pwm lines.
Signed-off-by Andrew Lunn <[email protected]>URL: https://patchwork.ozlabs.org/patch/427294/
Signed-off-by Ralph Sennhauser <[email protected]>--- arch/arm/boot/dts/armada-370.dtsi | 10 ++++++++-- arch/arm/boot/dts/armada-xp-mv78230.dtsi | 10 ++++++++-- arch/arm/boot/dts/armada-xp-mv78260.dtsi | 8 ++++++-- arch/arm/boot/dts/armada-xp-mv78460.dtsi | 10 ++++++++-- 4 files changed, 30 insertions(+), 8 deletions(-)(quoted diff) +0
-0
b/arch/arm/boot/dts/armada-370.dtsiindex cc011c8..aa9fe72 100644arch/arm/boot/dts/armada-370.dtsi +7
-2@@ -138,24 +138,30 @@ gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>,<90>;
arch/arm/boot/dts/armada-370.dtsi +1
-0+ clocks = <&coreclk 0>; }; gpio2: gpio at 18180 {(quoted diff) +0
-0
b/arch/arm/boot/dts/armada-xp-mv78230.dtsiindex 07c5090..fc3934f 100644 ---a/arch/arm/boot/dts/armada-xp-mv78230.dtsi+++b/arch/arm/boot/dts/armada-xp-mv78230.dtsiarch/arm/boot/dts/armada-xp-mv78230.dtsi +8
-2@@ -203,24 +203,30 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <17>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>; + clocks = <&coreclk 0>;(quoted diff) +0
-0}; }; };(quoted diff) +0
-0
b/arch/arm/boot/dts/armada-xp-mv78260.dtsiindex 64e936a..04dda6a 100644 ---a/arch/arm/boot/dts/armada-xp-mv78260.dtsi+++b/arch/arm/boot/dts/armada-xp-mv78260.dtsiarch/arm/boot/dts/armada-xp-mv78230.dtsi +6
-2@@ -286,24 +286,28 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; ngpios = <32>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>, <90>; + clocks = <&coreclk 0>;arch/arm/boot/dts/armada-370.dtsi +0
-0}; gpio2: gpio at 18180 {(quoted diff) +0
-0
b/arch/arm/boot/dts/armada-xp-mv78460.dtsiindex d1383dd..fb6d28a 100644 ---a/arch/arm/boot/dts/armada-xp-mv78460.dtsi+++b/arch/arm/boot/dts/armada-xp-mv78460.dtsiarch/arm/boot/dts/armada-xp-mv78460.dtsi +7
-2@@ -324,24 +324,30 @@ internal-regs { gpio0: gpio at 18100 { compatible = "marvell,orion-gpio"; - reg = <0x18100 0x40>; + reg = <0x18100 0x40>, <0x181c0 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <82>, <83>, <84>, <85>; + clocks = <&coreclk 0>; }; gpio1: gpio at 18140 { compatible = "marvell,orion-gpio"; - reg = <0x18140 0x40>; + reg = <0x18140 0x40>, <0x181c8 0x08>; + reg-names = "gpio", "pwm"; ngpios = <32>; gpio-controller; #gpio-cells = <2>; + #pwm-cells = <2>; interrupt-controller; #interrupt-cells = <2>; interrupts = <87>, <88>, <89>,<90>;
(quoted diff) +1
-0+ clocks = <&coreclk 0>; };Quoted 5 lines
Quoted 4 lines
gpio2: gpio at 18180 {
Signature · 1 line
2.10.2_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel at lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Signature · 4 lines
Gregory Clement, Free Electrons Kernel, drivers, real-time and embedded Linux development, consulting, training and support. http://free-electrons.com
PATCH v2 3/4 ARM: mvebu: Enable SENSORS_PWM_FAN in defconfig
In reply to Ralph SennhauserFrom: Andrew Lunn <[email protected]>
Now that the gpio driver also supports PWM operation, enable the PWM framework and fan driver in mvebu_v7_defconfig.
URL: https://patchwork.ozlabs.org/patch/427297/
--- arch/arm/configs/mvebu_v7_defconfig | 2 ++ 1 file changed, 2 insertions(+)
arch/arm/configs/mvebu_v7_defconfig +2 -0
@@ -135,6 +135,8 @@ CONFIG_DMADEVICES=y CONFIG_MV_XOR=y # CONFIG_IOMMU_SUPPORT is not set CONFIG_MEMORY=y +CONFIG_PWM=y +CONFIG_SENSORS_PWM_FAN=y CONFIG_EXT4_FS=y CONFIG_ISO9660_FS=y CONFIG_JOLIET=y
Signature · 1 line
2.10.2
PATCH v2 4/4 mvebu: wrt1900ac: Use pwm-fan rather than gpio-fan
In reply to Ralph SennhauserFrom: Andrew Lunn <[email protected]>
The mvebu gpio driver can also perform PWM on some pins. Us the pwm-fan driver to control the fan of the WRT1900AC, giving us finer grained control over its speed and hence noise.
URL: https://patchwork.ozlabs.org/patch/427291/
--- arch/arm/boot/dts/armada-xp-linksys-mamba.dts | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-)
arch/arm/boot/dts/armada-xp-linksys-mamba.dts +3 -5
@@ -293,13 +293,11 @@ }; }; - gpio_fan { + pwm_fan { /* SUNON HA4010V4-0000-C99 */ - compatible = "gpio-fan"; - gpios = <&gpio0 24 0>; - gpio-fan,speed-map = <0 0 - 4500 1>; + compatible = "pwm-fan"; + pwms = <&gpio0 24 4000 0>; }; dsa {
Signature · 1 line
2.10.2
Quoted 4 lines · Ralph Sennhauser
This patch series was originally submitted by Andrew Lunn but got stalled. I picked up the series and addressed what was discussed for the earlier submission with some helpful input from Andrew. Hopefully this time support for the PWM fan as found on Linksys WRT1900AC (Mamba) will make it in.
All looks good to me, I'm waiting for an ACK from the PWM maintainer.
Yours,
Linus Walleij
Quoted 9 lines · On Thu, 23 Mar 2017 10:23:47 +0100 Linus Walleij <[email protected]>…
Quoted 5 lines · Ralph Sennhauser
This patch series was originally submitted by Andrew Lunn but got stalled. I picked up the series and addressed what was discussed for the earlier submission with some helpful input from Andrew. Hopefully this time support for the PWM fan as found on Linksys WRT1900AC (Mamba) will make it in.
Quoted 5 lines
All looks good to me, I'm waiting for an ACK from the PWM maintainer.
Yours,
Linus Walleij
Hi Linus,
There are still several open issues brought up by the PWM maintainer after posting v2 which need to be addressed first (not done in 5 minutes). There will be a v3 for sure and maybe a v4 if necessary. v3 is currently under verification.
Thanks for applying the additional cleanup patch.
Thanks
Ralph