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ARM: tegra: jetson-tk1: adapt internal DT paths to changed upstream DT

PATCH Applied Lucas Stach 2 participants 4 messages Mar 19, 2017 – Mar 20, 2017

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Arm (32-bit) Tegra architecture support
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Lucas Stach

author
#0 lore raw

PATCH 1/3 ARM: tegra: jetson-tk1: adapt internal DT paths to changed upstream DT

The upstream DT changed the node names, so the barebox internal references didn't work anymore.

Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/dts/tegra124-jetson-tk1.dts | 2 +-
 arch/arm/dts/tegra124.dtsi           | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)
arch/arm/dts/tegra124-jetson-tk1.dts +1 -1
index 26f405c..e1974db 100644
@@ -12,6 +12,6 @@
 	};
 
 	/* eMMC */
-	emmc: sdhci@0,700b0600 {
+	emmc: sdhci@700b0600 {
 	};
 };
arch/arm/dts/tegra124.dtsi +4 -4
index 9276f2f..8af3a58 100644
@@ -1,8 +1,8 @@
 / {
 	aliases {
-		mmc0 = "/sdhci@0,700b0000/";
-		mmc1 = "/sdhci@0,700b0200/";
-		mmc2 = "/sdhci@0,700b0400/";
-		mmc3 = "/sdhci@0,700b0600/";
+		mmc0 = "/sdhci@700b0000/";
+		mmc1 = "/sdhci@700b0200/";
+		mmc2 = "/sdhci@700b0400/";
+		mmc3 = "/sdhci@700b0600/";
 	};
 };
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author
#1 lore raw

PATCH 2/3 ARM: tegra124: use old XUSB binding

The XUSB binding was changed upstream, to allow for more flexibility needed to support USB3. The barebox driver has not been adapted to this change. Add back the old DT properties in the Barebox internal DT to keep the existing PCIe functionality working.

Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/dts/tegra124.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)
arch/arm/dts/tegra124.dtsi +34 -0
index 8af3a58..ce618db 100644
@@ -1,3 +1,5 @@
+#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
+
 / {
 	aliases {
 		mmc0 = "/sdhci@700b0000/";

@@ -5,4 +7,36 @@
 		mmc2 = "/sdhci@700b0400/";
 		mmc3 = "/sdhci@700b0600/";
 	};
+
+	pcie-controller@01003000 {
+		phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>;
+		phy-names = "pcie";
+	};
+
+	padctl@7009f000 {
+		pinctrl-0 = <&padctl_default>;
+		pinctrl-names = "default";
+		#phy-cells = <1>;
+
+		padctl_default: pinmux {
+			usb3 {
+				nvidia,lanes = "pcie-0", "pcie-1";
+				nvidia,function = "usb3";
+				nvidia,iddq = <0>;
+			};
+
+			pcie {
+				nvidia,lanes = "pcie-2", "pcie-3",
+				               "pcie-4";
+				nvidia,function = "pcie";
+				nvidia,iddq = <0>;
+			};
+
+			sata {
+				nvidia,lanes = "sata-0";
+				nvidia,function = "sata";
+				nvidia,iddq = <0>;
+			};
+		};
+	};
 };
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author
#2 lore raw

PATCH 3/3 ARM: tegra: jetson-tk1: use phandle for stdout path

In reply to Lucas Stach

Now that the UARTs have phandles in the upstream DT, we can make use of them in Barebox.

Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/dts/tegra124-jetson-tk1.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/dts/tegra124-jetson-tk1.dts +1 -1
index e1974db..00ae58f 100644
@@ -3,7 +3,7 @@
 
 / {
 	chosen {
-		stdout-path = "/serial@0,70006300/";
+		stdout-path = &uartd;
 
 		environment@0 {
 			compatible = "barebox,environment";
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Applied
#3 lore raw
In reply to Lucas Stach
Quoted 8 lines · Lucas Stach

The upstream DT changed the node names, so the barebox internal references didn't work anymore.

Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/dts/tegra124-jetson-tk1.dts | 2 +-
 arch/arm/dts/tegra124.dtsi           | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

Applied. thanks

Sascha

Quoted 39 lines
arch/arm/dts/tegra124-jetson-tk1.dts +1 -1
index 26f405c..e1974db 100644
@@ -12,6 +12,6 @@
 	};
 
 	/* eMMC */
-	emmc: sdhci@0,700b0600 {
+	emmc: sdhci@700b0600 {
 	};
 };
arch/arm/dts/tegra124.dtsi +4 -4
index 9276f2f..8af3a58 100644
@@ -1,8 +1,8 @@
 / {
 	aliases {
-		mmc0 = "/sdhci@0,700b0000/";
-		mmc1 = "/sdhci@0,700b0200/";
-		mmc2 = "/sdhci@0,700b0400/";
-		mmc3 = "/sdhci@0,700b0600/";
+		mmc0 = "/sdhci@700b0000/";
+		mmc1 = "/sdhci@700b0200/";
+		mmc2 = "/sdhci@700b0400/";
+		mmc3 = "/sdhci@700b0600/";
 	};
 };
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