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IPU PRE/PRG devicetree nodes

PATCH New Lucas Stach 2 participants 4 messages Mar 23, 2017 – Mar 24, 2017

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Device tree bindings Arm i.MX and Layerscape
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Lucas Stach

author
#0 lore raw

cover IPU PRE/PRG devicetree nodes

Hi Shawn,

the following 2 patches add the DT nodes for the PRE/PRG units found on i.MX6QP. The bindings and driver code to make use of those are already in Dave Airlies drm-next branch, so can be considered stable.

Regards,
Lucas

Lucas Stach (2):
ARM: dts: imx6qp: add PRE nodes
ARM: dts: imx6qp: add PRG nodes and hook up to IPUs

 arch/arm/boot/dts/imx6qp.dtsi | 58 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)
Signature · 1 line
2.11.0
author
#1 lore raw

PATCH 1/2 ARM: dts: imx6qp: add PRE nodes

Add the DT nodes for the Prefetch Resolve Engines found on i.MX6QP.

Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/boot/dts/imx6qp.dtsi | 38 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 38 insertions(+)
arch/arm/boot/dts/imx6qp.dtsi +38 -0
index 4fd6f26b89a6..d9c0cd0baddb 100644
@@ -55,6 +55,44 @@
 			reg = <0x00960000 0x20000>;
 			clocks = <&clks IMX6QDL_CLK_OCRAM>;
 		};
+
+		aips-bus at 02100000 {
+			pre1: pre at 21c8000 {
+				compatible = "fsl,imx6qp-pre";
+				reg = <0x021c8000 0x1000>;
+				interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clks IMX6QDL_CLK_PRE0>;
+				clock-names = "axi";
+				fsl,iram = <&ocram2>;
+			};
+
+			pre2: pre at 21c9000 {
+				compatible = "fsl,imx6qp-pre";
+				reg = <0x021c9000 0x1000>;
+				interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clks IMX6QDL_CLK_PRE1>;
+				clock-names = "axi";
+				fsl,iram = <&ocram2>;
+			};
+
+			pre3: pre at 21ca000 {
+				compatible = "fsl,imx6qp-pre";
+				reg = <0x021ca000 0x1000>;
+				interrupts = <GIC_SPI 98 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clks IMX6QDL_CLK_PRE2>;
+				clock-names = "axi";
+				fsl,iram = <&ocram3>;
+			};
+
+			pre4: pre at 21cb000 {
+				compatible = "fsl,imx6qp-pre";
+				reg = <0x021cb000 0x1000>;
+				interrupts = <GIC_SPI 99 IRQ_TYPE_EDGE_RISING>;
+				clocks = <&clks IMX6QDL_CLK_PRE3>;
+				clock-names = "axi";
+				fsl,iram = <&ocram3>;
+			};
+		};
 	};
 };
Signature · 1 line
2.11.0
author
#2 lore raw

PATCH 2/2 ARM: dts: imx6qp: add PRG nodes and hook up to IPUs

In reply to Lucas Stach

Add the DT nodes for the Prefetch Resolve Gaskets found on i.MX6QP and hook them up to the assigned IPU nodes.

Signed-off-by Lucas Stach <[email protected]>
---
 arch/arm/boot/dts/imx6qp.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
arch/arm/boot/dts/imx6qp.dtsi +20 -0
index d9c0cd0baddb..59453f2ac4ba 100644
@@ -92,6 +92,24 @@
 				clock-names = "axi";
 				fsl,iram = <&ocram3>;
 			};
+
+			prg1: prg at 21cc000 {
+				compatible = "fsl,imx6qp-prg";
+				reg = <0x021cc000 0x1000>;
+				clocks = <&clks IMX6QDL_CLK_PRG0_APB>,
+					 <&clks IMX6QDL_CLK_PRG0_AXI>;
+				clock-names = "ipg", "axi";
+				fsl,pres = <&pre1>, <&pre2>, <&pre3>;
+			};
+
+			prg2: prg at 21cd000 {
+				compatible = "fsl,imx6qp-prg";
+				reg = <0x021cd000 0x1000>;
+				clocks = <&clks IMX6QDL_CLK_PRG1_APB>,
+					 <&clks IMX6QDL_CLK_PRG1_AXI>;
+				clock-names = "ipg", "axi";
+				fsl,pres = <&pre4>, <&pre2>, <&pre3>;
+			};
 		};
 	};
 };

@@ -104,10 +122,12 @@
 
 &ipu1 {
 	compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
+	fsl,prg = <&prg1>;
 };
 
 &ipu2 {
 	compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
+	fsl,prg = <&prg2>;
 };
 
 &ldb {
Signature · 1 line
2.11.0
Applied
#3 lore raw

cover IPU PRE/PRG devicetree nodes

In reply to Lucas Stach
Quoted 6 lines · Lucas Stach

Hi Shawn,

the following 2 patches add the DT nodes for the PRE/PRG units found on i.MX6QP. The bindings and driver code to make use of those are already in Dave Airlies drm-next branch, so can be considered stable.

Quoted 6 lines

Regards,
Lucas

Lucas Stach (2):
ARM: dts: imx6qp: add PRE nodes
ARM: dts: imx6qp: add PRG nodes and hook up to IPUs

Applied both, thanks.