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kvm/svm: Setup MCG_CAP on AMD properly

PATCH Applied Borislav Petkov 2 participants 2 messages Mar 26, 2017 – Mar 28, 2017

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Borislav Petkov

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PATCH 1/1 kvm/svm: Setup MCG_CAP on AMD properly

From: Borislav Petkov <[email protected]>

MCG_CAP[63:9] bits are reserved on AMD. However, on an AMD guest, this MSR returns 0x100010a. More specifically, bit 24 is set, which is simply wrong. That bit is MCG_SER_P and is present only on Intel. Thus, clean up the reserved bits in order not to confuse guests.

Signed-off-by Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Paolo Bonzini <[email protected]>
Cc "Radim Krčmář" <[email protected]>
---
 arch/x86/kvm/svm.c | 7 +++++++
 1 file changed, 7 insertions(+)
arch/x86/kvm/svm.c +7 -0
index c02b9af2056a..aba6100ebb8d 100644
@@ -5251,6 +5251,12 @@ static inline void avic_post_state_restore(struct kvm_vcpu *vcpu)
 	avic_handle_ldr_update(vcpu);
 }
 
+static void svm_setup_mce(struct kvm_vcpu *vcpu)
+{
+	/* [63:9] are reserved. */
+	vcpu->arch.mcg_cap &= 0x1ff;
+}
+
 static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
 	.cpu_has_kvm_support = has_svm,
 	.disabled_by_bios = is_disabled,

@@ -5362,6 +5368,7 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
 	.pmu_ops = &amd_pmu_ops,
 	.deliver_posted_interrupt = svm_deliver_avic_intr,
 	.update_pi_irte = svm_update_pi_irte,
+	.setup_mce = svm_setup_mce,
 };
 
 static int __init svm_init(void)
Signature · 1 line
2.11.0
maintainer Applied
#1 lore raw
Quoted 34 lines · Borislav Petkov

From: Borislav Petkov <[email protected]>

MCG_CAP[63:9] bits are reserved on AMD. However, on an AMD guest, this MSR returns 0x100010a. More specifically, bit 24 is set, which is simply wrong. That bit is MCG_SER_P and is present only on Intel. Thus, clean up the reserved bits in order not to confuse guests.

Signed-off-by Borislav Petkov <[email protected]>
Cc Joerg Roedel <[email protected]>
Cc Paolo Bonzini <[email protected]>
Cc "Radim Krčmář" <[email protected]>
---
 arch/x86/kvm/svm.c | 7 +++++++
 1 file changed, 7 insertions(+)
arch/x86/kvm/svm.c +6 -0
index c02b9af2056a..aba6100ebb8d 100644
@@ -5251,6 +5251,12 @@ static inline void avic_post_state_restore(struct kvm_vcpu *vcpu)
 	avic_handle_ldr_update(vcpu);
 }
 
+static void svm_setup_mce(struct kvm_vcpu *vcpu)
+{
+	/* [63:9] are reserved. */
+	vcpu->arch.mcg_cap &= 0x1ff;
+}
+
 static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
 	.cpu_has_kvm_support = has_svm,
 	.disabled_by_bios = is_disabled,

arch/x86/kvm/svm.c static struct kvm_x86_ops svm_x86_ops __ro_after_init = { · line 5374

Quoted 7 lines
arch/x86/kvm/svm.c +1 -0
@@ -5362,6 +5368,7 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
 	.pmu_ops = &amd_pmu_ops,
 	.deliver_posted_interrupt = svm_deliver_avic_intr,
 	.update_pi_irte = svm_update_pi_irte,
+	.setup_mce = svm_setup_mce,
 };
 
 static int __init svm_init(void)

Queued for 4.12, thanks.

Paolo