arm64: dts: Add support for FSL's LS1088A SoC

LS1088A contains eight ARM v8 CortexA53 processor cores with 32 KB L1-D cache and 32 KB L1-I cache

Features summary
Eight 32-bit / 64-bit ARM v8 Cortex-A53 CPUs
- Arranged as two clusters of four cores sharing a 1 MB L2 cache
- Speed Up to 1.5 GHz
- Support for cluster power-gating.
Cache coherent interconnect (CCI-400)
- Hardware-managed data coherency
- Up to 700 MHz
One 64-bit DDR4 SDRAM memory controller with ECC
Data path acceleration architecture 2.0 (DPAA2)
Three PCIe 3.0 controllers
One serial ATA (SATA 3.0) controller
Three high-speed USB 3.0 controllers with integrated PHY

Following levels of DTSI/DTS files have been created for the LS1088A
SoC family:

- fsl-ls1088a.dtsi:
DTS-Include file for NXP LS1088A SoC.

- fsl-ls1088a-qds.dts:
DTS file for NXP LS1088A QDS board.

- fsl-ls1088a-rdb.dts:
DTS file for NXP LS1088A RDB board

---
Changes in v3: Incorporated Shawn's comments
- Sorted I2C devices in order of slave address
- Changed pca node name to generic i2c-switch
- Used define for interrupt polarity
- Sorted labelled nodes

Changes in v2: Incorporated Shawn's comments
- License changed to GPL/X11 dual license
- Device nodes in dtsi are disabled
- Properly named temp-sensor node
- Adjusted timer node to just after gic
- Miscellaneous minor comments

 arch/arm64/boot/dts/freescale/Makefile            |   2 +
 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 123 ++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 107 +++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi    | 275 ++++++++++++++++++++++
 4 files changed, 507 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
 create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi

index 6d5df45..72c4b52 100644
@@ -5,6 +5,8 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
 dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb

2.7.4

Applied, thanks.