dt-bindings: Add documentation for GP10B GPU

PATCH Superseded Alexandre Courbot 4 participants 9 messages Mar 30, 2017 – Apr 8, 2017

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Device tree bindings DRM drivers DRM misc Tegra architecture support

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Alexandre Courbot

author

2017-03-30 09:18 UTC #0 lore raw

PATCH 1/2 dt-bindings: Add documentation for GP10B GPU

GP10B's definition is mostly similar to GK20A's and GM20B's. The only noticeable difference is the use of power domains instead of a regulator for power supply.

Signed-off-by Alexandre Courbot <[email protected]>

---
 .../devicetree/bindings/gpu/nvidia,gk20a.txt       | 25 +++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt +24 -1

index ff3db65e50de..b7e4c7444510 100644
@@ -5,6 +5,7 @@ Required properties:
   Currently recognized values:
   - nvidia,gk20a
   - nvidia,gm20b
+  - nvidia,gp10b
 - reg: Physical base address and length of the controller's registers.
   Must contain two entries:
   - first entry for bar0

@@ -14,7 +15,8 @@ Required properties:
 - interrupt-names: Must include the following entries:
   - stall
   - nonstall
-- vdd-supply: regulator for supply voltage.
+- vdd-supply: regulator for supply voltage. Only required for GPUs not using
+  power domains.
 - clocks: Must contain an entry for each entry in clock-names.
   See ../clocks/clock-bindings.txt for details.
 - clock-names: Must include the following entries:

@@ -27,6 +29,8 @@ is also required:
   See ../reset/reset.txt for details.
 - reset-names: Must include the following entries:
   - gpu
+- power-domains: GPUs that make use of power domains can define this property
+  instead of vdd-supply. Currently "nvidia,gp10b" makes use of this.
 
 Optional properties:
 - iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.

@@ -68,3 +72,22 @@ Example for GM20B:
 		iommus = <&mc TEGRA_SWGROUP_GPU>;
 		status = "disabled";
 	};
+
+Example for GP10B:
+
+	gpu at 17000000 {
+		compatible = "nvidia,gp10b";
+		reg = <0x0 0x17000000 0x0 0x1000000>,
+		      <0x0 0x18000000 0x0 0x1000000>;
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
+			      GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "stall", "nonstall";
+		clocks = <&bpmp TEGRA186_CLK_GPCCLK>,
+			 <&bpmp TEGRA186_CLK_GPU>;
+		clock-names = "gpu", "pwr";
+		resets = <&bpmp TEGRA186_RESET_GPU>;
+		reset-names = "gpu";
+		power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;
+		iommus = <&smmu TEGRA186_SID_GPU>;
+		status = "disabled";
+	};

Signature · 1 line

2.12.0

Alexandre Courbot

author

2017-03-30 09:18 UTC #1 lore raw

PATCH 2/2 arm64: tegra: Add GPU node for Tegra 186

Add the DT node for the GP10B GPU on Tegra 186.

Signed-off-by Alexandre Courbot <[email protected]>

---
 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

arch/arm64/boot/dts/nvidia/tegra186.dtsi +18 -0

index b4c71b519289..7ada0c5b0581 100644
@@ -660,6 +660,24 @@
 		};
 	};
 
+	gpu at 17000000 {
+		compatible = "nvidia,gp10b";
+		reg = <0x0 0x17000000 0x0 0x1000000>
+		      <0x0 0x18000000 0x0 0x1000000>;
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
+			      GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "stall", "nonstall";
+
+		clocks = <&bpmp TEGRA186_CLK_GPCCLK>,
+			 <&bpmp TEGRA186_CLK_GPU>;
+		clock-names = "gpu", "pwr";
+		resets = <&bpmp TEGRA186_RESET_GPU>;
+		reset-names = "gpu";
+		status = "disabled";
+
+		power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;
+	};
+
 	sysram at 30000000 {
 		compatible = "nvidia,tegra186-sysram", "mmio-sram";
 		reg = <0x0 0x30000000 0x0 0x50000>;

Signature · 1 line

2.12.0

Alexandre Courbot

author

2017-03-30 09:26 UTC #2 lore raw

PATCH v2 1/1 dt-bindings: Add documentation for GP10B GPU

GP10B's definition is mostly similar to GK20A's and GM20B's. The only noticeable difference is the use of power domains instead of a regulator for power supply.

Signed-off-by Alexandre Courbot <[email protected]>

---
Changes since v1:
- It's much better when it compiles.

 .../devicetree/bindings/gpu/nvidia,gk20a.txt       | 25 +++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt +24 -1

index ff3db65e50de..b7e4c7444510 100644
@@ -5,6 +5,7 @@ Required properties:
   Currently recognized values:
   - nvidia,gk20a
   - nvidia,gm20b
+  - nvidia,gp10b
 - reg: Physical base address and length of the controller's registers.
   Must contain two entries:
   - first entry for bar0

@@ -14,7 +15,8 @@ Required properties:
 - interrupt-names: Must include the following entries:
   - stall
   - nonstall
-- vdd-supply: regulator for supply voltage.
+- vdd-supply: regulator for supply voltage. Only required for GPUs not using
+  power domains.
 - clocks: Must contain an entry for each entry in clock-names.
   See ../clocks/clock-bindings.txt for details.
 - clock-names: Must include the following entries:

@@ -27,6 +29,8 @@ is also required:
   See ../reset/reset.txt for details.
 - reset-names: Must include the following entries:
   - gpu
+- power-domains: GPUs that make use of power domains can define this property
+  instead of vdd-supply. Currently "nvidia,gp10b" makes use of this.
 
 Optional properties:
 - iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.

@@ -68,3 +72,22 @@ Example for GM20B:
 		iommus = <&mc TEGRA_SWGROUP_GPU>;
 		status = "disabled";
 	};
+
+Example for GP10B:
+
+	gpu at 17000000 {
+		compatible = "nvidia,gp10b";
+		reg = <0x0 0x17000000 0x0 0x1000000>,
+		      <0x0 0x18000000 0x0 0x1000000>;
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
+			      GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "stall", "nonstall";
+		clocks = <&bpmp TEGRA186_CLK_GPCCLK>,
+			 <&bpmp TEGRA186_CLK_GPU>;
+		clock-names = "gpu", "pwr";
+		resets = <&bpmp TEGRA186_RESET_GPU>;
+		reset-names = "gpu";
+		power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;
+		iommus = <&smmu TEGRA186_SID_GPU>;
+		status = "disabled";
+	};

Signature · 1 line

2.12.0

Thierry Reding

2017-03-31 12:56 UTC #3 lore raw

Quoted 44 lines · Alexandre Courbot

GP10B's definition is mostly similar to GK20A's and GM20B's. The only noticeable difference is the use of power domains instead of a regulator for power supply.

Signed-off-by Alexandre Courbot <[email protected]>

---
Changes since v1:
- It's much better when it compiles.

 .../devicetree/bindings/gpu/nvidia,gk20a.txt       | 25 +++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt +5 -1

index ff3db65e50de..b7e4c7444510 100644
@@ -5,6 +5,7 @@ Required properties:
   Currently recognized values:
   - nvidia,gk20a
   - nvidia,gm20b
+  - nvidia,gp10b
 - reg: Physical base address and length of the controller's registers.
   Must contain two entries:
   - first entry for bar0

@@ -14,7 +15,8 @@ Required properties:
 - interrupt-names: Must include the following entries:
   - stall
   - nonstall
-- vdd-supply: regulator for supply voltage.
+- vdd-supply: regulator for supply voltage. Only required for GPUs not using
+  power domains.
 - clocks: Must contain an entry for each entry in clock-names.
   See ../clocks/clock-bindings.txt for details.
 - clock-names: Must include the following entries:

@@ -27,6 +29,8 @@ is also required:
   See ../reset/reset.txt for details.
 - reset-names: Must include the following entries:
   - gpu
+- power-domains: GPUs that make use of power domains can define this property
+  instead of vdd-supply. Currently "nvidia,gp10b" makes use of this.
 
 Optional properties:
 - iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.

Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt Example for GM20B: · line 81

Quoted 10 lines

Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt +7 -0

@@ -68,3 +72,22 @@ Example for GM20B:
 		iommus = <&mc TEGRA_SWGROUP_GPU>;
 		status = "disabled";
 	};
+
+Example for GP10B:
+
+	gpu at 17000000 {
+		compatible = "nvidia,gp10b";
+		reg = <0x0 0x17000000 0x0 0x1000000>,
+		      <0x0 0x18000000 0x0 0x1000000>;

Would it make sense to add a reg-names property to give these meaning? I know that the binding describes what each entry is, but having the names specified in a property would make it more immediately obvious.

Just a thought, otherwise looks good to me.

Thierry
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Alexandre Courbot

2017-04-08 10:20 UTC #4 lore raw

Quoted 51 lines · Thierry Reding

Quoted 50 lines · Alexandre Courbot

GP10B's definition is mostly similar to GK20A's and GM20B's. The only noticeable difference is the use of power domains instead of a regulator for power supply.

Signed-off-by Alexandre Courbot <[email protected]>

---
Changes since v1:
- It's much better when it compiles.

 .../devicetree/bindings/gpu/nvidia,gk20a.txt       | 25 +++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt +8 -1

index ff3db65e50de..b7e4c7444510 100644
@@ -5,6 +5,7 @@ Required properties:
   Currently recognized values:
   - nvidia,gk20a
   - nvidia,gm20b
+  - nvidia,gp10b
 - reg: Physical base address and length of the controller's registers.
   Must contain two entries:
   - first entry for bar0

@@ -14,7 +15,8 @@ Required properties:
 - interrupt-names: Must include the following entries:
   - stall
   - nonstall
-- vdd-supply: regulator for supply voltage.
+- vdd-supply: regulator for supply voltage. Only required for GPUs not using
+  power domains.
 - clocks: Must contain an entry for each entry in clock-names.
   See ../clocks/clock-bindings.txt for details.
 - clock-names: Must include the following entries:

@@ -27,6 +29,8 @@ is also required:
   See ../reset/reset.txt for details.
 - reset-names: Must include the following entries:
   - gpu
+- power-domains: GPUs that make use of power domains can define this property
+  instead of vdd-supply. Currently "nvidia,gp10b" makes use of this.
 
 Optional properties:
 - iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details.

@@ -68,3 +72,22 @@ Example for GM20B:
              iommus = <&mc TEGRA_SWGROUP_GPU>;
              status = "disabled";
      };
+
+Example for GP10B:
+

Quoted 8 lines

Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt Example for GM20B: · line 81
Quoted 4 lines
Documentation/devicetree/bindings/gpu/nvidia,gk20a.txt +4 -0
+     gpu at 17000000 {
+             compatible = "nvidia,gp10b";
+             reg = <0x0 0x17000000 0x0 0x1000000>,
+                   <0x0 0x18000000 0x0 0x1000000>;
Would it make sense to add a reg-names property to give these meaning? I know that the binding describes what each entry is, but having the names specified in a property would make it more immediately obvious.

Would certainly work, especially since we have been doing this for other properties. Is there an obvious pro to doing this though?

Rob Herring

maintainer Acked-by on v2 1/1

2017-04-03 15:55 UTC #5 lore raw

In reply to Alexandre Courbot

Quoted 11 lines · Alexandre Courbot

GP10B's definition is mostly similar to GK20A's and GM20B's. The only noticeable difference is the use of power domains instead of a regulator for power supply.
Signed-off-by Alexandre Courbot <[email protected]>
---
Changes since v1:
- It's much better when it compiles.
 .../devicetree/bindings/gpu/nvidia,gk20a.txt       | 25 +++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

Acked-by Rob Herring <[email protected]>

Thierry Reding

Applied

2017-04-04 13:21 UTC #6 lore raw

In reply to Alexandre Courbot

Quoted 11 lines · Alexandre Courbot

GP10B's definition is mostly similar to GK20A's and GM20B's. The only noticeable difference is the use of power domains instead of a regulator for power supply.
Signed-off-by Alexandre Courbot <[email protected]>
---
Changes since v1:
- It's much better when it compiles.
 .../devicetree/bindings/gpu/nvidia,gk20a.txt       | 25 +++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

Applied to for-4.12/arm64/dt, thanks.

Alexandre Courbot

author

2017-03-30 09:28 UTC #7 lore raw

PATCH v2 1/1 arm64: tegra: Add GPU node for Tegra 186

In reply to Alexandre Courbot

Add the DT node for the GP10B GPU on Tegra 186.

Signed-off-by Alexandre Courbot <[email protected]>

---
 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

arch/arm64/boot/dts/nvidia/tegra186.dtsi +18 -0

index b4c71b519289..9ee6c439fb02 100644
@@ -660,6 +660,24 @@
 		};
 	};
 
+	gpu at 17000000 {
+		compatible = "nvidia,gp10b";
+		reg = <0x0 0x17000000 0x0 0x1000000>,
+		      <0x0 0x18000000 0x0 0x1000000>;
+		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
+			      GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "stall", "nonstall";
+
+		clocks = <&bpmp TEGRA186_CLK_GPCCLK>,
+			 <&bpmp TEGRA186_CLK_GPU>;
+		clock-names = "gpu", "pwr";
+		resets = <&bpmp TEGRA186_RESET_GPU>;
+		reset-names = "gpu";
+		status = "disabled";
+
+		power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;
+	};
+
 	sysram at 30000000 {
 		compatible = "nvidia,tegra186-sysram", "mmio-sram";
 		reg = <0x0 0x30000000 0x0 0x50000>;

Signature · 1 line

2.12.0

Thierry Reding

Applied

2017-04-04 13:22 UTC #8 lore raw

Re: [PATCH v2] arm64: tegra: Add GPU node for Tegra 186

Quoted 6 lines · Alexandre Courbot

Add the DT node for the GP10B GPU on Tegra 186.
Signed-off-by Alexandre Courbot <[email protected]>
---
 arch/arm64/boot/dts/nvidia/tegra186.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

Applied to for-4.12/arm64/dt, thanks.