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more facility bit additions for POWER9

PATCH In review Nicholas Piggin 2 participants 4 messages Apr 7, 2017 – Apr 19, 2017 PowerPC

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Nicholas Piggin

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#0 lore raw

cover more facility bit additions for POWER9

No real change except add register definitions and facility unavailable type names.

Nicholas Piggin (2):
powerpc/64s: Add msgp facility unavailable log string powerpc/64s: Add SCV FSCR bit for ISA v3.0

 arch/powerpc/include/asm/reg.h |  2 ++
 arch/powerpc/kernel/traps.c    | 18 ++++++++++--------
 2 files changed, 12 insertions(+), 8 deletions(-)
Signature · 1 line
2.11.0
author reviewer
#1 lore raw

PATCH 1/2 powerpc/64s: Add msgp facility unavailable log string

Signed-off-by Nicholas Piggin <[email protected]>
---
 arch/powerpc/kernel/traps.c | 1 +
 1 file changed, 1 insertion(+)
arch/powerpc/kernel/traps.c +1 -0
index ff365f9de27a..a34d8bf3dbe4 100644
@@ -1440,6 +1440,7 @@ void facility_unavailable_exception(struct pt_regs *regs)
 		[FSCR_TM_LG] = "TM",
 		[FSCR_EBB_LG] = "EBB",
 		[FSCR_TAR_LG] = "TAR",
+		[FSCR_MSGP_LG] = "MSGP",
 	};
 	char *facility = "unknown";
 	u64 value;
Signature · 1 line
2.11.0
author reviewer
#3 lore raw

PATCH 2/2 powerpc/64s: Add SCV FSCR bit for ISA v3.0

In reply to Nicholas Piggin
Signed-off-by Nicholas Piggin <[email protected]>
---
 arch/powerpc/include/asm/reg.h |  2 ++
 arch/powerpc/kernel/traps.c    | 19 ++++++++++---------
 2 files changed, 12 insertions(+), 9 deletions(-)
arch/powerpc/include/asm/reg.h +2 -0
index fc879fd6bdae..d9e52a1336a6 100644
@@ -310,6 +310,7 @@
 #define SPRN_PMCR	0x374	/* Power Management Control Register */
 
 /* HFSCR and FSCR bit numbers are the same */
+#define FSCR_SCV_LG	12	/* Enable System Call Vectored */
 #define FSCR_MSGP_LG	10	/* Enable MSGP */
 #define FSCR_TAR_LG	8	/* Enable Target Address Register */
 #define FSCR_EBB_LG	7	/* Enable Event Based Branching */

@@ -320,6 +321,7 @@
 #define FSCR_VECVSX_LG	1	/* Enable VMX/VSX  */
 #define FSCR_FP_LG	0	/* Enable Floating Point */
 #define SPRN_FSCR	0x099	/* Facility Status & Control Register */
+#define   FSCR_SCV	__MASK(FSCR_SCV_LG)
 #define   FSCR_TAR	__MASK(FSCR_TAR_LG)
 #define   FSCR_EBB	__MASK(FSCR_EBB_LG)
 #define   FSCR_DSCR	__MASK(FSCR_DSCR_LG)
arch/powerpc/kernel/traps.c +10 -9
index a34d8bf3dbe4..5b307efed870 100644
@@ -1432,15 +1432,16 @@ static void tm_unavailable(struct pt_regs *regs)
 void facility_unavailable_exception(struct pt_regs *regs)
 {
 	static char *facility_strings[] = {
-		[FSCR_FP_LG] = "FPU",
-		[FSCR_VECVSX_LG] = "VMX/VSX",
-		[FSCR_DSCR_LG] = "DSCR",
-		[FSCR_PM_LG] = "PMU SPRs",
-		[FSCR_BHRB_LG] = "BHRB",
-		[FSCR_TM_LG] = "TM",
-		[FSCR_EBB_LG] = "EBB",
-		[FSCR_TAR_LG] = "TAR",
-		[FSCR_MSGP_LG] = "MSGP",
+		[FSCR_FP_LG]		= "FPU",
+		[FSCR_VECVSX_LG]	= "VMX/VSX",
+		[FSCR_DSCR_LG]		= "DSCR",
+		[FSCR_PM_LG]		= "PMU SPRs",
+		[FSCR_BHRB_LG]		= "BHRB",
+		[FSCR_TM_LG]		= "TM",
+		[FSCR_EBB_LG]		= "EBB",
+		[FSCR_TAR_LG]		= "TAR",
+		[FSCR_MSGP_LG]		= "MSGP",
+		[FSCR_SCV_LG]		= "SCV",
 	};
 	char *facility = "unknown";
 	u64 value;
Signature · 1 line
2.11.0