QSPI: Falcon or single stage boot mode support

From: Lokesh Vutla <[email protected]>

Move the assignment of board info to global data a bit early which is safe,
so that ram details can be used to enable caches.

Signed-off-by Lokesh Vutla <[email protected]>

Signed-off-by Ravi Babu <[email protected]>

---
 common/spl/spl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

common/spl/spl.c +1 -1

index a3e73b8..f11b370 100644
@@ -322,6 +322,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	struct spl_image_info spl_image;
 
 	debug(">>spl:board_init_r()\n");
+	gd->bd = &bdata;
 
 #if defined(CONFIG_SYS_SPL_MALLOC_START)
 	mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,

@@ -383,7 +384,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
  */
 void preloader_console_init(void)
 {
-	gd->bd = &bdata;
 	gd->baudrate = CONFIG_BAUDRATE;
 
 	serial_init();		/* serial communications setup

*/

From: Lokesh Vutla <[email protected]>

Move the assignment of board info to global data a bit early which is safe,
so that ram details can be used to enable caches.

Signed-off-by Lokesh Vutla <[email protected]>

Signed-off-by Ravi Babu <[email protected]>

From: Lokesh Vutla <[email protected]>

Move the assignment of board info to global data a bit early which is safe,
so that ram details can be used to enable caches.

Signed-off-by Lokesh Vutla <[email protected]>

Signed-off-by Ravi Babu <[email protected]>

Reviewed-by Lukasz Majewski <[email protected]>

Reviewed-by Tom Rini <[email protected]>

From: Lokesh Vutla <[email protected]>

Move the assignment of board info to global data a bit early which is safe,
so that ram details can be used to enable caches.

Signed-off-by Lokesh Vutla <[email protected]>

Signed-off-by Ravi Babu <[email protected]>

Reviewed-by Lukasz Majewski <[email protected]>

Reviewed-by Tom Rini <[email protected]>

---
  common/spl/spl.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

common/spl/spl.c +1 -0

index a3e73b8..f11b370 100644
@@ -322,6 +322,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
  	struct spl_image_info spl_image;
 
  	debug(">>spl:board_init_r()\n");
+	gd->bd = &bdata;
 
  #if defined(CONFIG_SYS_SPL_MALLOC_START)
  	mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,

From: Lokesh Vutla <[email protected]>

Declare the size of ddr very early in spl, so that this can be used to enable cache.

Signed-off-by Lokesh Vutla <[email protected]>

Signed-off-by Ravi Babu <[email protected]>

---
 arch/arm/mach-omap2/am33xx/board.c  | 4 ++++
 arch/arm/mach-omap2/hwinit-common.c | 1 +
 2 files changed, 5 insertions(+)

(quoted diff) +0 -0

b/arch/arm/mach-omap2/am33xx/board.c index 2bfc864..568f36f 100644

arch/arm/mach-omap2/am33xx/board.c +0 -0

 }
 #endif
 

(quoted diff) +0 -0

b/arch/arm/mach-omap2/hwinit-common.c index f317293..cac3274 100644

arch/arm/mach-omap2/am33xx/board.c void board_init_f(ulong dummy) · line 333

Quoted 12 lines

(quoted diff) +0 -0

b/arch/arm/mach-omap2/am33xx/board.c index 2bfc864..568f36f 100644

arch/arm/mach-omap2/am33xx/board.c +4 -0

@@ -327,6 +327,10 @@ void board_init_f(ulong dummy)
 	early_system_init();
 	board_early_init_f();
 	sdram_init();
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size(
+			(void *)CONFIG_SYS_SDRAM_BASE,
+			CONFIG_MAX_RAM_BANK_SIZE);

The above call is a bit strange, since the sdram_init() function sets the DDR (EMIF) controller to use the whole SDRAM available.

Why one cannot take this info directly from EMIF controller?

Hi Ravi,

Quoted 17 lines

From: Lokesh Vutla <[email protected]>

Declare the size of ddr very early in spl, so that this can be used to enable cache.

Signed-off-by Lokesh Vutla <[email protected]>

Signed-off-by Ravi Babu <[email protected]>

---
 arch/arm/mach-omap2/am33xx/board.c  | 4 ++++
 arch/arm/mach-omap2/hwinit-common.c | 1 +
 2 files changed, 5 insertions(+)

(quoted diff) +0 -0

b/arch/arm/mach-omap2/am33xx/board.c index 2bfc864..568f36f 100644

arch/arm/mach-omap2/am33xx/board.c void board_init_f(ulong dummy) · line 333

Quoted 7 lines

arch/arm/mach-omap2/am33xx/board.c +4 -0

@@ -327,6 +327,10 @@ void board_init_f(ulong dummy)
 	early_system_init();
 	board_early_init_f();
 	sdram_init();
+	/* dram_init must store complete ramsize in gd->ram_size */
+	gd->ram_size = get_ram_size(
+			(void *)CONFIG_SYS_SDRAM_BASE,
+			CONFIG_MAX_RAM_BANK_SIZE);

The above call is a bit strange, since the sdram_init() function sets the DDR (EMIF) controller to use the whole SDRAM available.

Why one cannot take this info directly from EMIF controller?

From: Lokesh Vutla <[email protected]>

Declare the size of ddr very early in spl, so that this can be used to enable cache.

Signed-off-by Lokesh Vutla <[email protected]>

Signed-off-by Ravi Babu <[email protected]>

Enables qspi boot configuration for dra7xx platform.

Signed-off-by Ravi Babu <[email protected]>

---
 configs/dra7xx_evm_defconfig | 6 ++++++
 1 file changed, 6 insertions(+)

(quoted diff) +0 -0

b/configs/dra7xx_evm_defconfig index 42f87b3..c510146 100644

configs/dra7xx_evm_defconfig +0 -0

@@ -59,6 +59,12 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm"
 CONFIG_DM=y

Enables qspi boot configuration for dra7xx platform.

Signed-off-by Ravi Babu <[email protected]>

Reviewed-by Lukasz Majewski <[email protected]>

Adding support for fdt fixup to update the memory node in device tree for falcon boot.

This is needed for single stage or falcon bootmode, to pass memory configuration to kernel through DT memory node.

Signed-off-by Ravi Babu <[email protected]>

---
 arch/arm/lib/Makefile    | 1 +
 arch/arm/lib/bootm-fdt.c | 7 ++++++-
 common/Makefile          | 2 +-
 3 files changed, 8 insertions(+), 2 deletions(-)

arch/arm/lib/Makefile +1 -0

index 6e96cfb..53d4ed2 100644
@@ -33,6 +33,7 @@ obj-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
 else
 obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
 obj-$(CONFIG_SPL_FRAMEWORK) += zimage.o
+obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o
 endif
 obj-$(CONFIG_$(SPL_)USE_ARCH_MEMSET) += memset.o
 obj-$(CONFIG_$(SPL_)USE_ARCH_MEMCPY) += memcpy.o

arch/arm/lib/bootm-fdt.c +6 -1

index d84789c..eaa817b 100644
@@ -27,8 +27,10 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int arch_fixup_fdt(void *blob)
 {
+	int ret = 0;
+#if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_OF_LIBFDT)
 	bd_t *bd = gd->bd;
-	int bank, ret;
+	int bank;
 	u64 start[CONFIG_NR_DRAM_BANKS];
 	u64 size[CONFIG_NR_DRAM_BANKS];
 

@@ -42,9 +44,11 @@ int arch_fixup_fdt(void *blob)
 #endif
 	}
 
+#ifdef CONFIG_OF_LIBFDT
 	ret = fdt_fixup_memory_banks(blob, start, size,
 CONFIG_NR_DRAM_BANKS); if (ret)
 		return ret;
+#endif
 
 #ifdef CONFIG_ARMV8_SPIN_TABLE
 	ret = spin_table_update_dt(blob);

@@ -58,6 +62,7 @@ int arch_fixup_fdt(void *blob)
 	if (ret)
 		return ret;
 #endif
+#endif
 
 	return 0;
 }

common/Makefile +0 -0

index 86225f1..bcd2486 100644

Adding support for fdt fixup to update the memory node in device tree for falcon boot.

This is needed for single stage or falcon bootmode, to pass memory configuration to kernel through DT memory node.

Signed-off-by Ravi Babu <[email protected]>

Reviewed-by Lukasz Majewski <[email protected]>

In single stage bootmode or falcon boot mode,
the SPL shall update the memory dt nodes
spl_fixup_fdt() based on DDR configuration for
specific platform.

Signed-off-by Ravi Babu <[email protected]>

---
 common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

common/spl/spl.c +36 -0

index f11b370..b9b1331 100644
@@ -17,6 +17,7 @@
 #include <malloc.h>
 #include <dm/root.h>
 #include <linux/compiler.h>
+#include <fdt_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -56,6 +57,14 @@ __weak int spl_start_uboot(void)
 	return 1;
 }
 
+/* weak default platform specific function to initialize
+ * dram banks
+ */
+__weak int dram_init_banksize(void)
+{
+	return 0;
+}
+
 /*
  * Weak default function for arch specific zImage check. Return zero
  * and fill start and end address if image is recognized.

@@ -66,6 +75,33 @@ int __weak bootz_setup(ulong image, ulong *start,
 ulong *end) }
 #endif
 
+void spl_fixup_fdt(void)
+{
+#if defined(CONFIG_SPL_OF_LIBFDT) &&
 defined(CONFIG_SYS_SPL_ARGS_ADDR)
+	void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
+	int err;
+
+	err = fdt_check_header(fdt_blob);
+	if (err < 0) {
+		printf("fdt_root: %s\n", fdt_strerror(err));
+		return;
+	}
+
+	/* fixup the memory dt node */
+	err = fdt_shrink_to_minimum(fdt_blob, 0);
+	if (err == 0) {
+		printf("spl: fdt_shrink_to_minimum err - %d\n", err);
+		return;
+	}
+
+	err = arch_fixup_fdt(fdt_blob);
+	if (err) {
+		printf("spl: arch_fixup_fdt err - %d\n", err);
+		return;
+	}
+#endif
+}
+
 /*
  * Weak default function for board specific cleanup/preparation

before
* Linux boot. Some boards/platforms might not need it, so just
provide @@ -323,6 +359,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)

common/spl/spl.c +2 -0

+#endif
 
 #if defined(CONFIG_SYS_SPL_MALLOC_START)
 	mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,

@@ -361,6 +400,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #ifdef CONFIG_SPL_OS_BOOT
 	case IH_OS_LINUX:
 		debug("Jumping to Linux\n");
+		spl_fixup_fdt();
 		spl_board_prepare_for_linux();
 		jump_to_image_linux(&spl_image,
 				    (void

*)CONFIG_SYS_SPL_ARGS_ADDR);

Quoted 5 lines

/*
* Weak default function for board specific cleanup/preparation
before
* Linux boot. Some boards/platforms might not need it, so just
provide @@ -323,6 +359,9 @@ void board_init_r(gd_t *dummy1, ulong

common/spl/spl.c void board_init_r(gd_t *dummy1, ulong dummy2) · line 363

Quoted 5 lines

dummy2)

common/spl/spl.c +2 -0

 	debug(">>spl:board_init_r()\n");
 	gd->bd = &bdata;
+#ifdef CONFIG_SPL_OS_BOOT
+	dram_init_banksize();

What is the purpose of this function? In this point the SDRAM should be already configured.

In patch 2/5 you already configured TI's specific "board_init_f" to add some memory related information to gd struct.

Hi Ravi,

Quoted 74 lines

In single stage bootmode or falcon boot mode,
the SPL shall update the memory dt nodes
spl_fixup_fdt() based on DDR configuration for
specific platform.

Signed-off-by Ravi Babu <[email protected]>

---
 common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

common/spl/spl.c +36 -0

index f11b370..b9b1331 100644
@@ -17,6 +17,7 @@
 #include <malloc.h>
 #include <dm/root.h>
 #include <linux/compiler.h>
+#include <fdt_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 

@@ -56,6 +57,14 @@ __weak int spl_start_uboot(void)
 	return 1;
 }
 
+/* weak default platform specific function to initialize
+ * dram banks
+ */
+__weak int dram_init_banksize(void)
+{
+	return 0;
+}
+
 /*
  * Weak default function for arch specific zImage check. Return zero
  * and fill start and end address if image is recognized.

@@ -66,6 +75,33 @@ int __weak bootz_setup(ulong image, ulong *start,
 ulong *end) }
 #endif
 
+void spl_fixup_fdt(void)
+{
+#if defined(CONFIG_SPL_OF_LIBFDT) &&
 defined(CONFIG_SYS_SPL_ARGS_ADDR)
+	void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
+	int err;
+
+	err = fdt_check_header(fdt_blob);
+	if (err < 0) {
+		printf("fdt_root: %s\n", fdt_strerror(err));
+		return;
+	}
+
+	/* fixup the memory dt node */
+	err = fdt_shrink_to_minimum(fdt_blob, 0);
+	if (err == 0) {
+		printf("spl: fdt_shrink_to_minimum err - %d\n", err);
+		return;
+	}
+
+	err = arch_fixup_fdt(fdt_blob);
+	if (err) {
+		printf("spl: arch_fixup_fdt err - %d\n", err);
+		return;
+	}
+#endif
+}
+
 /*
  * Weak default function for board specific cleanup/preparation

before
* Linux boot. Some boards/platforms might not need it, so just
provide @@ -323,6 +359,9 @@ void board_init_r(gd_t *dummy1, ulong

common/spl/spl.c void board_init_r(gd_t *dummy1, ulong dummy2) · line 363

Quoted 5 lines

dummy2)

common/spl/spl.c +2 -0

 	debug(">>spl:board_init_r()\n");
 	gd->bd = &bdata;
+#ifdef CONFIG_SPL_OS_BOOT
+	dram_init_banksize();

What is the purpose of this function? In this point the SDRAM should be already configured.

In patch 2/5 you already configured TI's specific "board_init_f" to add some memory related information to gd struct.

Quoted 12 lines

common/spl/spl.c +2 -0

+#endif
 
 #if defined(CONFIG_SYS_SPL_MALLOC_START)
 	mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START,

@@ -361,6 +400,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #ifdef CONFIG_SPL_OS_BOOT
 	case IH_OS_LINUX:
 		debug("Jumping to Linux\n");
+		spl_fixup_fdt();
 		spl_board_prepare_for_linux();
 		jump_to_image_linux(&spl_image,
 				    (void

Quoted 1 line

*)CONFIG_SYS_SPL_ARGS_ADDR);

Best regards,

Lukasz Majewski

--

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In single stage bootmode or falcon boot mode,
the SPL shall update the memory dt nodes
spl_fixup_fdt() based on DDR configuration for
specific platform.

Signed-off-by Ravi Babu <[email protected]>

In single stage bootmode or falcon boot mode,
the SPL shall update the memory dt nodes
spl_fixup_fdt() based on DDR configuration for
specific platform.

Signed-off-by Ravi Babu <[email protected]>

---
  common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++
  1 file changed, 40 insertions(+)

Quoted 9 lines · Ravi

In single stage bootmode or falcon boot mode,
the SPL shall update the memory dt nodes
spl_fixup_fdt() based on DDR configuration for
specific platform.

Signed-off-by Ravi Babu <[email protected]>

---
  common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++
  1 file changed, 40 insertions(+)

Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.

Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.

Quoted 14 lines · York Sun

Quoted 9 lines · Ravi

In single stage bootmode or falcon boot mode,
the SPL shall update the memory dt nodes
spl_fixup_fdt() based on DDR configuration for
specific platform.

Signed-off-by Ravi Babu <[email protected]>

---
  common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++
  1 file changed, 40 insertions(+)

Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.

Quoted 4 lines

Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.

So, the further argument here is that if you have to edit the dts to include a valid amount of memory so that the dtb the kernel spits out is useful in falcon mode, it's not at all useful in development.

Quoted 20 lines · Tom Rini

Quoted 18 lines · York Sun

Quoted 9 lines · Ravi

In single stage bootmode or falcon boot mode,
the SPL shall update the memory dt nodes
spl_fixup_fdt() based on DDR configuration for
specific platform.

Signed-off-by Ravi Babu <[email protected]>

---
   common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++
   1 file changed, 40 insertions(+)

Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.

Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.

Quoted 3 lines

So, the further argument here is that if you have to edit the dts to include a valid amount of memory so that the dtb the kernel spits out is useful in falcon mode, it's not at all useful in development.

Anyone noticed! this change is breaking falcon mode (tried in i.MX6 and rk3288) even if we forcibly disable CONFIG_SPL_OF_LIBFDT the SPL need to revert back to use SPL_OF_PLATDATA.

Quoted 21 lines · Jagan Teki

Quoted 20 lines · Tom Rini

Quoted 18 lines · York Sun

Quoted 9 lines · Ravi

In single stage bootmode or falcon boot mode,
the SPL shall update the memory dt nodes
spl_fixup_fdt() based on DDR configuration for
specific platform.

Signed-off-by Ravi Babu <[email protected]>

---
   common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++
   1 file changed, 40 insertions(+)

Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.

Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.

Quoted 8 lines

Quoted 3 lines

So, the further argument here is that if you have to edit the dts to include a valid amount of memory so that the dtb the kernel spits out is useful in falcon mode, it's not at all useful in development.

Anyone noticed! this change is breaking falcon mode (tried in i.MX6 and rk3288) even if we forcibly disable CONFIG_SPL_OF_LIBFDT the SPL need to revert back to use SPL_OF_PLATDATA.

It broke falcon boot for ls1043ardb and ls1043ardb (and probably all my ARMv8 platforms) due to the way we reserve secure memory. I have added a patch (not upstreamed yet) to prevent dram_init_banksize() to run twice for my boards.

Quoted 31 lines · York Sun

Quoted 21 lines · Jagan Teki

Quoted 20 lines · Tom Rini

Quoted 18 lines · York Sun

Quoted 9 lines · Ravi

In single stage bootmode or falcon boot mode,
the SPL shall update the memory dt nodes
spl_fixup_fdt() based on DDR configuration for
specific platform.

Signed-off-by Ravi Babu <[email protected]>

---
    common/spl/spl.c | 40 ++++++++++++++++++++++++++++++++++++++++
    1 file changed, 40 insertions(+)

Clearly I am late for this thread. I only notice this change when I try to merge my FIT improvement for falcon boot.

Why do we need to fixup the device tree for falcon boot at all? The device tree is static, saved as argument when exporting it, isn't it? As far as the normal boot fixes up the device tree, the exported device tree is correct.

Quoted 8 lines

Quoted 3 lines

So, the further argument here is that if you have to edit the dts to include a valid amount of memory so that the dtb the kernel spits out is useful in falcon mode, it's not at all useful in development.

Anyone noticed! this change is breaking falcon mode (tried in i.MX6 and rk3288) even if we forcibly disable CONFIG_SPL_OF_LIBFDT the SPL need to revert back to use SPL_OF_PLATDATA.

Quoted 4 lines

It broke falcon boot for ls1043ardb and ls1043ardb (and probably all my ARMv8 platforms) due to the way we reserve secure memory. I have added a patch (not upstreamed yet) to prevent dram_init_banksize() to run twice for my boards.

In-fact I too send patches for dram_init_banksize addition on i.MX6 and rk3288 for fixing falcon, wonder why we need to add explicit function here just to prevent DDR re-config or something similar. I think this spl_fixup_fdt should have board or soc specific routine.?