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x86/intel_idle: add GLK support

PATCH In review David E. Box 4 participants 4 messages Apr 23, 2017 – May 4, 2017 Intel idle driver

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David E. Box

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#0 lore raw

PATCH 1/1 x86/intel_idle: add GLK support

From: "Box, David E" <[email protected]>

Gemini Lake uses the same C-states as Broxton and also uses the IRTL MSR's to determine maximum C-state latency.

Signed-off-by David E. Box <[email protected]>
---
 drivers/idle/intel_idle.c | 2 ++
 1 file changed, 2 insertions(+)
drivers/idle/intel_idle.c +2 -0
index e045a5c..778af71 100644
@@ -1097,6 +1097,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
 	ICPU(INTEL_FAM6_XEON_PHI_KNL,		idle_cpu_knl),
 	ICPU(INTEL_FAM6_XEON_PHI_KNM,		idle_cpu_knl),
 	ICPU(INTEL_FAM6_ATOM_GOLDMONT,		idle_cpu_bxt),
+	ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE,	idle_cpu_bxt),
 	ICPU(INTEL_FAM6_ATOM_DENVERTON,		idle_cpu_dnv),
 	{}
 };

@@ -1309,6 +1310,7 @@ static void intel_idle_state_table_update(void)
 		ivt_idle_state_table_update();
 		break;
 	case INTEL_FAM6_ATOM_GOLDMONT:
+	case INTEL_FAM6_ATOM_GEMINI_LAKE:
 		bxt_idle_state_table_update();
 		break;
 	case INTEL_FAM6_SKYLAKE_DESKTOP:
Signature · 1 line
2.9.3
#1 lore raw
Quoted 6 lines · David E. Box

From: "Box, David E" <[email protected]>

Gemini Lake uses the same C-states as Broxton and also uses the IRTL MSR's to determine maximum C-state latency.

Signed-off-by David E. Box <[email protected]>

You could use the code names consistently in your subjects (but I can fix this up).

Jacob, any concerns?

Quoted 25 lines
---
 drivers/idle/intel_idle.c | 2 ++
 1 file changed, 2 insertions(+)
drivers/idle/intel_idle.c +2 -0
index e045a5c..778af71 100644
@@ -1097,6 +1097,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
 	ICPU(INTEL_FAM6_XEON_PHI_KNL,		idle_cpu_knl),
 	ICPU(INTEL_FAM6_XEON_PHI_KNM,		idle_cpu_knl),
 	ICPU(INTEL_FAM6_ATOM_GOLDMONT,		idle_cpu_bxt),
+	ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE,	idle_cpu_bxt),
 	ICPU(INTEL_FAM6_ATOM_DENVERTON,		idle_cpu_dnv),
 	{}
 };

@@ -1309,6 +1310,7 @@ static void intel_idle_state_table_update(void)
 		ivt_idle_state_table_update();
 		break;
 	case INTEL_FAM6_ATOM_GOLDMONT:
+	case INTEL_FAM6_ATOM_GEMINI_LAKE:
 		bxt_idle_state_table_update();
 		break;
 	case INTEL_FAM6_SKYLAKE_DESKTOP:
Acked-by Pan, Jacob jun
#2 lore raw
Quoted 11 lines · On Thu, 27 Apr 2017 00:36:42 +0200 "Rafael J. Wysocki" <[email protected]>…
Quoted 6 lines

From: "Box, David E" <[email protected]>

Gemini Lake uses the same C-states as Broxton and also uses the IRTL MSR's to determine maximum C-state latency.

Signed-off-by David E. Box <[email protected]>

You could use the code names consistently in your subjects (but I can fix this up).

Jacob, any concerns?

No. Sorry for the delay.

Acked-by Pan, Jacob jun <[email protected]>
reviewer Acked-by on v1 1/1
#3 lore raw
In reply to David E. Box
Acked-by Len Brown <[email protected]>
Quoted 33 lines · David E. Box

From: "Box, David E" <[email protected]>

Gemini Lake uses the same C-states as Broxton and also uses the IRTL MSR's to determine maximum C-state latency.

Signed-off-by David E. Box <[email protected]>
---
 drivers/idle/intel_idle.c | 2 ++
 1 file changed, 2 insertions(+)
drivers/idle/intel_idle.c +2 -1
index e045a5c..778af71 100644
@@ -1097,6 +1097,7 @@ static const struct x86_cpu_id intel_idle_ids[] __initconst = {
        ICPU(INTEL_FAM6_XEON_PHI_KNL,           idle_cpu_knl),
        ICPU(INTEL_FAM6_XEON_PHI_KNM,           idle_cpu_knl),
        ICPU(INTEL_FAM6_ATOM_GOLDMONT,          idle_cpu_bxt),
+       ICPU(INTEL_FAM6_ATOM_GEMINI_LAKE,       idle_cpu_bxt),
        ICPU(INTEL_FAM6_ATOM_DENVERTON,         idle_cpu_dnv),
        {}
 };

@@ -1309,6 +1310,7 @@ static void intel_idle_state_table_update(void)
                ivt_idle_state_table_update();
                break;
        case INTEL_FAM6_ATOM_GOLDMONT:
+       case INTEL_FAM6_ATOM_GEMINI_LAKE:
                bxt_idle_state_table_update();
                break;
        case INTEL_FAM6_SKYLAKE_DESKTOP:
--

2.9.3

Signature · 1 line
Len Brown, Intel Open Source Technology Center