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arch: arm64: Define big endian of IFC for LS1043a/LS1046a

PATCH New Prabhakar Kushwaha 2 participants 4 messages May 4, 2017 – May 5, 2017

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Prabhakar Kushwaha

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#0 lore raw

PATCH 1/1 arch: arm64: Define big endian of IFC for LS1043a/LS1046a

Integrated flash controller present in LS1043A and LS1046A is big endian.

So add big endian property in the devive tree.

Signed-off-by Prabhakar Kushwaha <[email protected]>
---
 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 1 +
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 +
 2 files changed, 2 insertions(+)
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +1 -0
index 45cface..09f1775 100644
@@ -223,6 +223,7 @@
 		ifc: ifc at 1530000 {
 			compatible = "fsl,ifc", "simple-bus";
 			reg = <0x0 0x1530000 0x0 0x10000>;
+			big-endian;
 			interrupts = <0 43 0x4>;
 		};
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +1 -0
index f4b8b7e..509e6c2 100644
@@ -190,6 +190,7 @@
 		ifc: ifc at 1530000 {
 			compatible = "fsl,ifc", "simple-bus";
 			reg = <0x0 0x1530000 0x0 0x10000>;
+			big-endian;
 			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 		};
Signature · 1 line
2.7.4
author
#1 lore raw

PATCH 1/1 arm: arm64: Add flash node for ls1088a qds and rdb

LS1088AQDS consist of NOR, NAND and FPGA connected over IFC LS1088ARDB consist of NAND and FPGA connected over IFC.

So add flash information in ifc node of device tree.

Signed-off-by Prabhakar Kushwaha <[email protected]>
---
 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 27 +++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 20 +++++++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi    |  4 ----
 3 files changed, 47 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts +27 -0
index 8c3cae5..ca7eb41 100644
@@ -53,6 +53,33 @@
 	compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
 };
 
+&ifc {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	status = "okay";
+
+	ranges = <0 0 0x5 0x80000000 0x08000000
+		  2 0 0x5 0x30000000 0x00010000
+		  3 0 0x5 0x20000000 0x00010000>;
+
+	nor at 0,0 {
+		compatible = "cfi-flash";
+		reg = <0x0 0x0 0x8000000>;
+		bank-width = <2>;
+		device-width = <1>;
+	};
+
+	nand at 2,0 {
+		compatible = "fsl,ifc-nand";
+		reg = <0x2 0x0 0x10000>;
+	};
+
+	fpga: board-control at 3,0 {
+		compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
+		reg = <0x3 0x0 0x0000100>;
+	};
+};
+
 &i2c0 {
 	status = "okay";
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts +20 -0
index 8a04fbb..726e167 100644
@@ -53,6 +53,26 @@
 	compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
 };
 
+&ifc {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	status = "okay";
+
+	ranges = <0 0 0x5 0x30000000 0x00010000
+		  2 0 0x5 0x20000000 0x00010000>;
+
+	nand at 0,0 {
+		compatible = "fsl,ifc-nand";
+		reg = <0x0 0x0 0x10000>;
+	};
+
+	fpga: board-control at 2,0 {
+		compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
+		reg = <0x2 0x0 0x0000100>;
+	};
+};
+
+
 &i2c0 {
 	status = "okay";
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +0 -4
index 2946fd7..9f6bcb4 100644
@@ -217,10 +217,6 @@
 			#address-cells = <2>;
 			#size-cells = <1>;
 
-			ranges = <0 0 0x5 0x80000000 0x08000000
-				  2 0 0x5 0x30000000 0x00010000
-				  3 0 0x5 0x20000000 0x00010000>;
-			status = "disabled";
 		};
 
 		i2c0: i2c at 2000000 {
Signature · 1 line
2.7.4
#2 lore raw

PATCH 1/1 arm: arm64: Add flash node for ls1088a qds and rdb

Quoted 6 lines · Prabhakar Kushwaha

LS1088AQDS consist of NOR, NAND and FPGA connected over IFC LS1088ARDB consist of NAND and FPGA connected over IFC.

So add flash information in ifc node of device tree.

Signed-off-by Prabhakar Kushwaha <[email protected]>

Please fix the subject prefix.

Quoted 11 lines
---
 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 27 +++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 20 +++++++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi    |  4 ----
 3 files changed, 47 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts +0 -0
index 8c3cae5..ca7eb41 100644

arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts line 56

Quoted 4 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts +1 -0
@@ -53,6 +53,33 @@
 	compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
 };
 
+&ifc {

Please try to sort these labeled nodes alphabetically. That said, it should be added after &i2c0.

arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts line 58

Quoted 2 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts +2 -0
+	#address-cells = <2>;
+	#size-cells = <1>;

The ifc node defined in fsl-ls1088a.dtsi already has them, right?

Quoted 45 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts +24 -0
+	status = "okay";
+
+	ranges = <0 0 0x5 0x80000000 0x08000000
+		  2 0 0x5 0x30000000 0x00010000
+		  3 0 0x5 0x20000000 0x00010000>;
+
+	nor at 0,0 {
+		compatible = "cfi-flash";
+		reg = <0x0 0x0 0x8000000>;
+		bank-width = <2>;
+		device-width = <1>;
+	};
+
+	nand at 2,0 {
+		compatible = "fsl,ifc-nand";
+		reg = <0x2 0x0 0x10000>;
+	};
+
+	fpga: board-control at 3,0 {
+		compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
+		reg = <0x3 0x0 0x0000100>;
+	};
+};
+
 &i2c0 {
 	status = "okay";
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts +10 -0
index 8a04fbb..726e167 100644
@@ -53,6 +53,26 @@
 	compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
 };
 
+&ifc {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	status = "okay";
+
+	ranges = <0 0 0x5 0x30000000 0x00010000
+		  2 0 0x5 0x20000000 0x00010000>;
+
+	nand at 0,0 {
+		compatible = "fsl,ifc-nand";

arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts line 75

Quoted 10 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts +10 -0
+		reg = <0x0 0x0 0x10000>;
+	};
+
+	fpga: board-control at 2,0 {
+		compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
+		reg = <0x2 0x0 0x0000100>;
+	};
+};
+
+

One newline is good enough.

Shawn

Quoted 27 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts +0 -0
 &i2c0 {
 	status = "okay";
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +0 -4
index 2946fd7..9f6bcb4 100644
@@ -217,10 +217,6 @@
 			#address-cells = <2>;
 			#size-cells = <1>;
 
-			ranges = <0 0 0x5 0x80000000 0x08000000
-				  2 0 0x5 0x30000000 0x00010000
-				  3 0 0x5 0x20000000 0x00010000>;
-			status = "disabled";
 		};
 
 		i2c0: i2c at 2000000 {
Signature · 8 lines
2.7.4



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#3 lore raw

PATCH 1/1 arch: arm64: Define big endian of IFC for LS1043a/LS1046a

In reply to Prabhakar Kushwaha
Quoted 5 lines · Prabhakar Kushwaha

Integrated flash controller present in LS1043A and LS1046A is big endian.

So add big endian property in the devive tree.

Signed-off-by Prabhakar Kushwaha <[email protected]>

The subject prefix should be 'arm64: dts: ...'. I fixed it up and applied the patch.

Shawn