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Add eSDHC UHS-I/HS200 mode support for ls1012a/ls1046a/ls208xa

PATCH New Yangbo Lu 3 participants 8 messages May 9, 2017 – May 12, 2017

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Yangbo Lu

author
#0 lore raw

v3 cover Add eSDHC UHS-I/HS200 mode support for ls1012a/ls1046a/ls208xa

This patchset is to add eSDHC UHS-I/HS200 mode support for ls1012a/ls1046a/ls208xa. Also add eSDHC node for ls1088a. Because eSDHC is not a standard SD controller, the specific speed mode support depends on board's peripheral circuit for eSDHC. So, we have to add these speed modes support on board dts file.

In additon, these dts patches depends on esdhc driver patches which just had been merged on mmc.git. Otherwise, the UHS-I SD card and eMMC HS200 card would fail to be initialized, but other cards still could work fine.
https://patchwork.kernel.org/patch/9689875/
https://patchwork.kernel.org/patch/9689877/
https://patchwork.kernel.org/patch/9689879/
https://patchwork.kernel.org/patch/9689887/
https://patchwork.kernel.org/patch/9689885/

Yangbo Lu (5):
mmc: dt: add compatible into eSDHC required properties
arm64: dts: ls1046a: support SD UHS-I and eMMC HS200 on RDB
arm64: dts: ls208xa: support SD UHS-I on RDB and eMMC HS200 on QDS
arm64: dts: ls1012a: add eSDHC nodes
arm64: dts: ls1088a: add esdhc node

 .../devicetree/bindings/mmc/fsl-esdhc.txt          | 14 ++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts  |  8 +++++++
 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts  | 13 +++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi     | 25 ++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts  |  8 +++++++
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi     |  4 ++--
 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts  |  4 ++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts  |  4 ++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi     | 12 +++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi |  1 +
 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi |  4 ++++
 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi     |  2 +-
 12 files changed, 96 insertions(+), 3 deletions(-)
Signature · 1 line
2.1.0.27.g96db324
author
#1 lore raw

PATCH v3 1/5 mmc: dt: add compatible into eSDHC required properties

This patch is to add compatible into eSDHC required properties.

---
Changes for v2:
- Added this patch.
Changes for v3:
- Added possible comaptible list

---
 Documentation/devicetree/bindings/mmc/fsl-esdhc.txt | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
Documentation/devicetree/bindings/mmc/fsl-esdhc.txt +14 -0
index dedfb02..a2cf5e1 100644
@@ -7,6 +7,20 @@ This file documents differences between the core properties described
 by mmc.txt and the properties used by the sdhci-esdhc driver.
 
 Required properties:
+  - compatible : should be "fsl,esdhc", or "fsl,<chip>-esdhc".
+    Possible compatibles for PowerPC:
+	"fsl,mpc8536-esdhc"
+	"fsl,mpc8378-esdhc"
+	"fsl,p2020-esdhc"
+	"fsl,p4080-esdhc"
+	"fsl,t1040-esdhc"
+	"fsl,t4240-esdhc"
+    Possible compatibles for ARM:
+	"fsl,ls1012a-esdhc"
+	"fsl,ls1088a-esdhc"
+	"fsl,ls1043a-esdhc"
+	"fsl,ls1046a-esdhc"
+	"fsl,ls2080a-esdhc"
   - interrupt-parent : interrupt source phandle.
   - clock-frequency : specifies eSDHC base clock frequency.
 
Signature · 1 line
2.1.0.27.g96db324
#2 lore raw

PATCH v3 1/5 mmc: dt: add compatible into eSDHC required properties

Quoted 11 lines · Yangbo Lu

This patch is to add compatible into eSDHC required properties.

---
Changes for v2:
- Added this patch.
Changes for v3:
- Added possible comaptible list

---
 Documentation/devicetree/bindings/mmc/fsl-esdhc.txt | 14 ++++++++++++++
 1 file changed, 14 insertions(+)
author
#3 lore raw

PATCH v3 2/5 arm64: dts: ls1046a: support SD UHS-I and eMMC HS200 on RDB

In reply to Yangbo Lu

This patch is to enable SD UHS-I mode and eMMC HS200 mode on LS1046ARDB in dts. Also, the eSDHC peripheral clock must be used instead of platform clock to support these modes.

---
Changes for v2:
- Sorted the node.
Changes for v3:
- None.

---
 arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts | 8 ++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi    | 4 ++--
 2 files changed, 10 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts +8 -0
index c5361e9..2d28726 100644
@@ -72,6 +72,14 @@
 	status = "okay";
 };
 
+&esdhc {
+	mmc-hs200-1_8v;
+	sd-uhs-sdr104;
+	sd-uhs-sdr50;
+	sd-uhs-sdr25;
+	sd-uhs-sdr12;
+};
+
 &i2c0 {
 	status = "okay";
 
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +2 -2
index 7ef2b9f..5975d30 100644
@@ -210,10 +210,10 @@
 		};
 
 		esdhc: esdhc at 1560000 {
-			compatible = "fsl,esdhc";
+			compatible = "fsl,ls1046a-esdhc", "fsl,esdhc";
 			reg = <0x0 0x1560000 0x0 0x10000>;
 			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-			clock-frequency = <0>;
+			clocks = <&clockgen 2 1>;
 			voltage-ranges = <1800 1800 3300 3300>;
 			sdhci,auto-cmd12;
 			big-endian;
Signature · 1 line
2.1.0.27.g96db324
author
#4 lore raw

PATCH v3 3/5 arm64: dts: ls208xa: support SD UHS-I on RDB and eMMC HS200 on QDS

In reply to Yangbo Lu

This patch is to enable SD UHS-I mode on LS208xRDB and eMMC HS200 mode on LS208xQDS in dts. Also, the eSDHC peripheral clock must be used instead of platform clock to support these modes.

---
Changes for v2:
- None.
Changes for v3:
- None.

---
 arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi | 1 +
 arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi | 4 ++++
 arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi     | 2 +-
 3 files changed, 6 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi +1 -0
index c4282d9..b237446 100644
@@ -46,6 +46,7 @@
  */
 
 &esdhc {
+	mmc-hs200-1_8v;
 	status = "okay";
 };
 
arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi +4 -0
index 9a1d0d2..29af54b 100644
@@ -46,6 +46,10 @@
  */
 
 &esdhc {
+	sd-uhs-sdr104;
+	sd-uhs-sdr50;
+	sd-uhs-sdr25;
+	sd-uhs-sdr12;
 	status = "okay";
 };
 
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +1 -1
index 6e531b9..94cdd30 100644
@@ -472,7 +472,7 @@
 			compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
 			reg = <0x0 0x2140000 0x0 0x10000>;
 			interrupts = <0 28 0x4>; /* Level high type */
-			clock-frequency = <0>;	/* Updated by bootloader */
+			clocks = <&clockgen 4 1>;
 			voltage-ranges = <1800 1800 3300 3300>;
 			sdhci,auto-cmd12;
 			little-endian;
Signature · 1 line
2.1.0.27.g96db324
author
#5 lore raw

PATCH v3 4/5 arm64: dts: ls1012a: add eSDHC nodes

In reply to Yangbo Lu

There are two eSDHC controllers in LS1012A. This patch is to add eSDHC nodes for ls1012a dts. Also enable eSDHC for RDB/QDS boards.

---
Changes for v2:
- Sorted the node.
Changes for v3:
- None.

---
 arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts |  8 ++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts | 13 ++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi    | 25 +++++++++++++++++++++++
 3 files changed, 46 insertions(+)
arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts +8 -0
index 40ef468..8c013b5 100644
@@ -97,6 +97,14 @@
 	status = "okay";
 };
 
+&esdhc0 {
+	status = "okay";
+};
+
+&esdhc1 {
+	status = "okay";
+};
+
 &i2c0 {
 	status = "okay";
 
arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts +13 -0
index 65d4313..c1a119e 100644
@@ -54,6 +54,19 @@
 	status = "okay";
 };
 
+&esdhc0 {
+	sd-uhs-sdr104;
+	sd-uhs-sdr50;
+	sd-uhs-sdr25;
+	sd-uhs-sdr12;
+	status = "okay";
+};
+
+&esdhc1 {
+	mmc-hs200-1_8v;
+	status = "okay";
+};
+
 &i2c0 {
 	status = "okay";
 };
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +25 -0
index ae47156..9a2ccd8 100644
@@ -117,12 +117,37 @@
 		#size-cells = <2>;
 		ranges;
 
+		esdhc0: esdhc at 1560000 {
+			compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
+			reg = <0x0 0x1560000 0x0 0x10000>;
+			interrupts = <0 62 0x4>;
+			clocks = <&clockgen 4 0>;
+			voltage-ranges = <1800 1800 3300 3300>;
+			sdhci,auto-cmd12;
+			big-endian;
+			bus-width = <4>;
+			status = "disabled";
+		};
+
 		scfg: scfg at 1570000 {
 			compatible = "fsl,ls1012a-scfg", "syscon";
 			reg = <0x0 0x1570000 0x0 0x10000>;
 			big-endian;
 		};
 
+		esdhc1: esdhc at 1580000 {
+			compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
+			reg = <0x0 0x1580000 0x0 0x10000>;
+			interrupts = <0 65 0x4>;
+			clocks = <&clockgen 4 0>;
+			voltage-ranges = <1800 1800 3300 3300>;
+			sdhci,auto-cmd12;
+			big-endian;
+			broken-cd;
+			bus-width = <4>;
+			status = "disabled";
+		};
+
 		crypto: crypto at 1700000 {
 			compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
 				     "fsl,sec-v4.0";
Signature · 1 line
2.1.0.27.g96db324
author
#6 lore raw

PATCH v3 5/5 arm64: dts: ls1088a: add esdhc node

In reply to Yangbo Lu

Add esdhc node for ls1088a and enable it on both RDB and QDS boards.

---
Changes for v2:
- Sorted the node.
Changes for v3:
- None.

---
 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts |  4 ++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts |  4 ++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi    | 12 ++++++++++++
 3 files changed, 20 insertions(+)
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts +4 -0
index 8c3cae5..ff21055 100644
@@ -118,6 +118,10 @@
 	status = "okay";
 };
 
+&esdhc {
+	status = "okay";
+};
+
 &sata {
 	status = "okay";
 };
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts +4 -0
index 8a04fbb..ab62ef6 100644
@@ -102,6 +102,10 @@
 	status = "okay";
 };
 
+&esdhc {
+	status = "okay";
+};
+
 &sata {
 	status = "okay";
 };
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +12 -0
index 2946fd7..10b5775 100644
@@ -263,6 +263,18 @@
 			status = "disabled";
 		};
 
+		esdhc: esdhc at 2140000 {
+			compatible = "fsl,ls1088a-esdhc", "fsl,esdhc";
+			reg = <0x0 0x2140000 0x0 0x10000>;
+			interrupts = <0 28 0x4>; /* Level high type */
+			clock-frequency = <0>;
+			voltage-ranges = <1800 1800 3300 3300>;
+			sdhci,auto-cmd12;
+			little-endian;
+			bus-width = <4>;
+			status = "disabled";
+		};
+
 		sata: sata at 3200000 {
 			compatible = "fsl,ls1088a-ahci", "fsl,ls1043a-ahci";
 			reg = <0x0 0x3200000 0x0 0x10000>;
Signature · 1 line
2.1.0.27.g96db324
Applied
#7 lore raw

v3 cover Add eSDHC UHS-I/HS200 mode support for ls1012a/ls1046a/ls208xa

In reply to Yangbo Lu
Quoted 14 lines · Yangbo Lu

This patchset is to add eSDHC UHS-I/HS200 mode support for ls1012a/ls1046a/ls208xa. Also add eSDHC node for ls1088a. Because eSDHC is not a standard SD controller, the specific speed mode support depends on board's peripheral circuit for eSDHC. So, we have to add these speed modes support on board dts file.

In additon, these dts patches depends on esdhc driver patches which just had been merged on mmc.git. Otherwise, the UHS-I SD card and eMMC HS200 card would fail to be initialized, but other cards still could work fine.
https://patchwork.kernel.org/patch/9689875/
https://patchwork.kernel.org/patch/9689877/
https://patchwork.kernel.org/patch/9689879/
https://patchwork.kernel.org/patch/9689887/
https://patchwork.kernel.org/patch/9689885/

Quoted 6 lines

Yangbo Lu (5):
mmc: dt: add compatible into eSDHC required properties
arm64: dts: ls1046a: support SD UHS-I and eMMC HS200 on RDB
arm64: dts: ls208xa: support SD UHS-I on RDB and eMMC HS200 on QDS
arm64: dts: ls1012a: add eSDHC nodes
arm64: dts: ls1088a: add esdhc node

Applied all, thanks.