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arm64: Add flash node for ls1088a qds and rdb

PATCH New Prabhakar Kushwaha 2 participants 2 messages May 10, 2017 – May 12, 2017

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Prabhakar Kushwaha

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#0 lore raw

PATCH v3 1/1 arm64: Add flash node for ls1088a qds and rdb

LS1088AQDS consist of NOR, NAND and FPGA connected over IFC LS1088ARDB consist of NAND and FPGA connected over IFC.

So add flash information in ifc node of device tree.

Signed-off-by Prabhakar Kushwaha <[email protected]>

---
changes for v2: Incorporated Shawn's comments changes for v3: Incorporated Shawn's further comments

 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 24 +++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 16 +++++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi    |  5 +----
 3 files changed, 41 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts +24 -0
index 8c3cae5..82e1615 100644
@@ -110,6 +110,30 @@
 	};
 };
 
+&ifc {
+	ranges = <0 0 0x5 0x80000000 0x08000000
+		  2 0 0x5 0x30000000 0x00010000
+		  3 0 0x5 0x20000000 0x00010000>;
+	status = "okay";
+
+	nor at 0,0 {
+		compatible = "cfi-flash";
+		reg = <0x0 0x0 0x8000000>;
+		bank-width = <2>;
+		device-width = <1>;
+	};
+
+	nand at 2,0 {
+		compatible = "fsl,ifc-nand";
+		reg = <0x2 0x0 0x10000>;
+	};
+
+	fpga: board-control at 3,0 {
+		compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
+		reg = <0x3 0x0 0x0000100>;
+	};
+};
+
 &duart0 {
 	status = "okay";
 };
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts +16 -0
index 8a04fbb..a93a588 100644
@@ -94,6 +94,22 @@
 	};
 };
 
+&ifc {
+	ranges = <0 0 0x5 0x30000000 0x00010000
+		  2 0 0x5 0x20000000 0x00010000>;
+	status = "okay";
+
+	nand at 0,0 {
+		compatible = "fsl,ifc-nand";
+		reg = <0x0 0x0 0x10000>;
+	};
+
+	fpga: board-control at 2,0 {
+		compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
+		reg = <0x2 0x0 0x0000100>;
+	};
+};
+
 &duart0 {
 	status = "okay";
 };
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +1 -4
index 2946fd7..e852b22 100644
@@ -216,11 +216,8 @@
 			little-endian;
 			#address-cells = <2>;
 			#size-cells = <1>;
-
-			ranges = <0 0 0x5 0x80000000 0x08000000
-				  2 0 0x5 0x30000000 0x00010000
-				  3 0 0x5 0x20000000 0x00010000>;
 			status = "disabled";
+
 		};
 
 		i2c0: i2c at 2000000 {
Signature · 1 line
2.7.4
#1 lore raw

PATCH v3 1/1 arm64: Add flash node for ls1088a qds and rdb

Quoted 6 lines · Prabhakar Kushwaha

LS1088AQDS consist of NOR, NAND and FPGA connected over IFC LS1088ARDB consist of NAND and FPGA connected over IFC.

So add flash information in ifc node of device tree.

Signed-off-by Prabhakar Kushwaha <[email protected]>

The subject prefix should be like 'arm64: dts: ...'.

Quoted 76 lines

---
changes for v2: Incorporated Shawn's comments changes for v3: Incorporated Shawn's further comments

 arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts | 24 +++++++++++++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts | 16 +++++++++++++++
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi    |  5 +----
 3 files changed, 41 insertions(+), 4 deletions(-)
arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts +24 -0
index 8c3cae5..82e1615 100644
@@ -110,6 +110,30 @@
 	};
 };
 
+&ifc {
+	ranges = <0 0 0x5 0x80000000 0x08000000
+		  2 0 0x5 0x30000000 0x00010000
+		  3 0 0x5 0x20000000 0x00010000>;
+	status = "okay";
+
+	nor at 0,0 {
+		compatible = "cfi-flash";
+		reg = <0x0 0x0 0x8000000>;
+		bank-width = <2>;
+		device-width = <1>;
+	};
+
+	nand at 2,0 {
+		compatible = "fsl,ifc-nand";
+		reg = <0x2 0x0 0x10000>;
+	};
+
+	fpga: board-control at 3,0 {
+		compatible = "fsl,ls1088aqds-fpga", "fsl,fpga-qixis";
+		reg = <0x3 0x0 0x0000100>;
+	};
+};
+
 &duart0 {
 	status = "okay";
 };
arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts +16 -0
index 8a04fbb..a93a588 100644
@@ -94,6 +94,22 @@
 	};
 };
 
+&ifc {
+	ranges = <0 0 0x5 0x30000000 0x00010000
+		  2 0 0x5 0x20000000 0x00010000>;
+	status = "okay";
+
+	nand at 0,0 {
+		compatible = "fsl,ifc-nand";
+		reg = <0x0 0x0 0x10000>;
+	};
+
+	fpga: board-control at 2,0 {
+		compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
+		reg = <0x2 0x0 0x0000100>;
+	};
+};
+
 &duart0 {
 	status = "okay";
 };
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +0 -0
index 2946fd7..e852b22 100644

arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi line 220

Quoted 9 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +1 -4
@@ -216,11 +216,8 @@
 			little-endian;
 			#address-cells = <2>;
 			#size-cells = <1>;
-
-			ranges = <0 0 0x5 0x80000000 0x08000000
-				  2 0 0x5 0x30000000 0x00010000
-				  3 0 0x5 0x20000000 0x00010000>;
 			status = "disabled";
+

This is an unrelated change, and should be dropped.

I fixed those up and applied patch.

Shawn

Quoted 12 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +0 -0
 		};
 
 		i2c0: i2c at 2000000 {
Signature · 8 lines
2.7.4



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