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arm64: dts: ls1088a: update the sata node

PATCH New Yuantian Tang 2 participants 5 messages May 11, 2017 – May 12, 2017

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#0 lore raw

PATCH v2 1/1 arm64: dts: ls1088a: update the sata node

1. Sata ecc should be disabled due to a erratum. Provide the ecc register address for driver to use.
2. Enable dma coherence operation

---
v2:
- move dma-coherent property above status

 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +4 -1
index 2946fd7..caecd14 100644
@@ -265,9 +265,12 @@
 
 		sata: sata at 3200000 {
 			compatible = "fsl,ls1088a-ahci", "fsl,ls1043a-ahci";
-			reg = <0x0 0x3200000 0x0 0x10000>;
+			reg = <0x0 0x3200000 0x0 0x10000>,
+				<0x0 0x20140520 0x0 0x4>;
+			reg-names = "ahci", "sata-ecc";
 			interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clockgen 4 3>;
+			dma-coherent;
 			status = "disabled";
 		};
 	};
Signature · 1 line
2.1.0.27.g96db324
#1 lore raw

PATCH 1/1 arm64: dts: ls1088a: Add TMU device tree support

Add nodes and properties for thermal management support.

---
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 89 ++++++++++++++++++++++++++
 1 file changed, 89 insertions(+)
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +89 -0
index caecd14..53dc1c1 100644
@@ -44,6 +44,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "fsl,ls1088a";
@@ -61,6 +62,7 @@
 			compatible = "arm,cortex-a53";
 			reg = <0x0>;
 			clocks = <&clockgen 1 0>;
+			#cooling-cells = <2>;
 		};
 
 		cpu1: cpu at 1 {
@@ -89,6 +91,7 @@
 			compatible = "arm,cortex-a53";
 			reg = <0x100>;
 			clocks = <&clockgen 1 1>;
+			#cooling-cells = <2>;
 		};
 
 		cpu5: cpu at 101 {
@@ -273,6 +276,92 @@
 			dma-coherent;
 			status = "disabled";
 		};
+
+		tmu: tmu at 1f80000 {
+			compatible = "fsl,qoriq-tmu";
+			reg = <0x0 0x1f80000 0x0 0x10000>;
+			interrupts = <0 23 0x4>;
+			fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
+			fsl,tmu-calibration =
+				/* Calibration data group 1 */
+				<0x00000000 0x00000026
+				0x00000001 0x0000002d
+				0x00000002 0x00000032
+				0x00000003 0x00000039
+				0x00000004 0x0000003f
+				0x00000005 0x00000046
+				0x00000006 0x0000004d
+				0x00000007 0x00000054
+				0x00000008 0x0000005a
+				0x00000009 0x00000061
+				0x0000000a 0x0000006a
+				0x0000000b 0x00000071
+				/* Calibration data group 2 */
+				0x00010000 0x00000025
+				0x00010001 0x0000002c
+				0x00010002 0x00000035
+				0x00010003 0x0000003d
+				0x00010004 0x00000045
+				0x00010005 0x0000004e
+				0x00010006 0x00000057
+				0x00010007 0x00000061
+				0x00010008 0x0000006b
+				0x00010009 0x00000076
+				/* Calibration data group 3 */
+				0x00020000 0x00000029
+				0x00020001 0x00000033
+				0x00020002 0x0000003d
+				0x00020003 0x00000049
+				0x00020004 0x00000056
+				0x00020005 0x00000061
+				0x00020006 0x0000006d
+				/* Calibration data group 4 */
+				0x00030000 0x00000021
+				0x00030001 0x0000002a
+				0x00030002 0x0000003c
+				0x00030003 0x0000004e>;
+			little-endian;
+			#thermal-sensor-cells = <1>;
+		};
+
+		thermal-zones {
+			cpu_thermal: cpu-thermal {
+				polling-delay-passive = <1000>;
+				polling-delay = <5000>;
+				thermal-sensors = <&tmu 0>;
+
+				trips {
+					cpu_alert: cpu-alert {
+						temperature = <85000>;
+						hysteresis = <2000>;
+						type = "passive";
+					};
+
+					cpu_crit: cpu-crit {
+						temperature = <95000>;
+						hysteresis = <2000>;
+						type = "critical";
+					};
+				};
+
+				cooling-maps {
+					map0 {
+						trip = <&cpu_alert>;
+						cooling-device =
+							<&cpu0 THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>;
+					};
+
+					map1 {
+						trip = <&cpu_alert>;
+						cooling-device =
+							<&cpu4 THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>;
+					};
+				};
+			};
+		};
+
 	};
 
 };
Signature · 1 line
2.1.0.27.g96db324
#2 lore raw

PATCH 1/1 arm64: dts: ls1088a: Add TMU device tree support

Quoted 36 lines · Yuantian Tang

Add nodes and properties for thermal management support.

---
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 89 ++++++++++++++++++++++++++
 1 file changed, 89 insertions(+)
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +3 -0
index caecd14..53dc1c1 100644
@@ -44,6 +44,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "fsl,ls1088a";
@@ -61,6 +62,7 @@
 			compatible = "arm,cortex-a53";
 			reg = <0x0>;
 			clocks = <&clockgen 1 0>;
+			#cooling-cells = <2>;
 		};
 
 		cpu1: cpu at 1 {
@@ -89,6 +91,7 @@
 			compatible = "arm,cortex-a53";
 			reg = <0x100>;
 			clocks = <&clockgen 1 1>;
+			#cooling-cells = <2>;
 		};
 
 		cpu5: cpu at 101 {

arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi line 280

Quoted 5 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +2 -0
@@ -273,6 +276,92 @@
 			dma-coherent;
 			status = "disabled";
 		};
+
+		tmu: tmu at 1f80000 {

We sort the devices under simple-bus in order of unit-address. Please respect the order when adding new devices.

Shawn

Quoted 95 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +84 -0
+			compatible = "fsl,qoriq-tmu";
+			reg = <0x0 0x1f80000 0x0 0x10000>;
+			interrupts = <0 23 0x4>;
+			fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
+			fsl,tmu-calibration =
+				/* Calibration data group 1 */
+				<0x00000000 0x00000026
+				0x00000001 0x0000002d
+				0x00000002 0x00000032
+				0x00000003 0x00000039
+				0x00000004 0x0000003f
+				0x00000005 0x00000046
+				0x00000006 0x0000004d
+				0x00000007 0x00000054
+				0x00000008 0x0000005a
+				0x00000009 0x00000061
+				0x0000000a 0x0000006a
+				0x0000000b 0x00000071
+				/* Calibration data group 2 */
+				0x00010000 0x00000025
+				0x00010001 0x0000002c
+				0x00010002 0x00000035
+				0x00010003 0x0000003d
+				0x00010004 0x00000045
+				0x00010005 0x0000004e
+				0x00010006 0x00000057
+				0x00010007 0x00000061
+				0x00010008 0x0000006b
+				0x00010009 0x00000076
+				/* Calibration data group 3 */
+				0x00020000 0x00000029
+				0x00020001 0x00000033
+				0x00020002 0x0000003d
+				0x00020003 0x00000049
+				0x00020004 0x00000056
+				0x00020005 0x00000061
+				0x00020006 0x0000006d
+				/* Calibration data group 4 */
+				0x00030000 0x00000021
+				0x00030001 0x0000002a
+				0x00030002 0x0000003c
+				0x00030003 0x0000004e>;
+			little-endian;
+			#thermal-sensor-cells = <1>;
+		};
+
+		thermal-zones {
+			cpu_thermal: cpu-thermal {
+				polling-delay-passive = <1000>;
+				polling-delay = <5000>;
+				thermal-sensors = <&tmu 0>;
+
+				trips {
+					cpu_alert: cpu-alert {
+						temperature = <85000>;
+						hysteresis = <2000>;
+						type = "passive";
+					};
+
+					cpu_crit: cpu-crit {
+						temperature = <95000>;
+						hysteresis = <2000>;
+						type = "critical";
+					};
+				};
+
+				cooling-maps {
+					map0 {
+						trip = <&cpu_alert>;
+						cooling-device =
+							<&cpu0 THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>;
+					};
+
+					map1 {
+						trip = <&cpu_alert>;
+						cooling-device =
+							<&cpu4 THERMAL_NO_LIMIT
+							THERMAL_NO_LIMIT>;
+					};
+				};
+			};
+		};
+
 	};
 
 };
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2.1.0.27.g96db324


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author
#3 lore raw

PATCH 1/1 arm64: dts: ls1088a: Add TMU device tree support

OK, I thought it is in alphabet order. Will resend it.

Regards,
Andy

Quoted 158 lines

-----Original Message-----
From: Shawn Guo [mailto:shawnguo at kernel.org]
Sent: Friday, May 12, 2017 11:30 AM
To: Andy Tang <[email protected]>
Cc: mark.rutland at arm.com; devicetree at vger.kernel.org; catalin.marinas at arm.com; will.deacon at arm.com; robh+dt at kernel.org; linux-arm-kernel at lists.infradead.org
Subject: Re: [PATCH] arm64: dts: ls1088a: Add TMU device tree support

Quoted 38 lines · Yuantian Tang

Add nodes and properties for thermal management support.

---
 arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 89
++++++++++++++++++++++++++
 1 file changed, 89 insertions(+)
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +3 -0
index caecd14..53dc1c1 100644
@@ -44,6 +44,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "fsl,ls1088a";
@@ -61,6 +62,7 @@
 			compatible = "arm,cortex-a53";
 			reg = <0x0>;
 			clocks = <&clockgen 1 0>;
+			#cooling-cells = <2>;
 		};
 
 		cpu1: cpu at 1 {
@@ -89,6 +91,7 @@
 			compatible = "arm,cortex-a53";
 			reg = <0x100>;
 			clocks = <&clockgen 1 1>;
+			#cooling-cells = <2>;
 		};
 
 		cpu5: cpu at 101 {

arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi line 280

Quoted 5 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +2 -0
@@ -273,6 +276,92 @@
 			dma-coherent;
 			status = "disabled";
 		};
+
+		tmu: tmu at 1f80000 {

We sort the devices under simple-bus in order of unit-address. Please respect the order when adding new devices.

Shawn

Quoted 61 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +61 -0
+			compatible = "fsl,qoriq-tmu";
+			reg = <0x0 0x1f80000 0x0 0x10000>;
+			interrupts = <0 23 0x4>;
+			fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
+			fsl,tmu-calibration =
+				/* Calibration data group 1 */
+				<0x00000000 0x00000026
+				0x00000001 0x0000002d
+				0x00000002 0x00000032
+				0x00000003 0x00000039
+				0x00000004 0x0000003f
+				0x00000005 0x00000046
+				0x00000006 0x0000004d
+				0x00000007 0x00000054
+				0x00000008 0x0000005a
+				0x00000009 0x00000061
+				0x0000000a 0x0000006a
+				0x0000000b 0x00000071
+				/* Calibration data group 2 */
+				0x00010000 0x00000025
+				0x00010001 0x0000002c
+				0x00010002 0x00000035
+				0x00010003 0x0000003d
+				0x00010004 0x00000045
+				0x00010005 0x0000004e
+				0x00010006 0x00000057
+				0x00010007 0x00000061
+				0x00010008 0x0000006b
+				0x00010009 0x00000076
+				/* Calibration data group 3 */
+				0x00020000 0x00000029
+				0x00020001 0x00000033
+				0x00020002 0x0000003d
+				0x00020003 0x00000049
+				0x00020004 0x00000056
+				0x00020005 0x00000061
+				0x00020006 0x0000006d
+				/* Calibration data group 4 */
+				0x00030000 0x00000021
+				0x00030001 0x0000002a
+				0x00030002 0x0000003c
+				0x00030003 0x0000004e>;
+			little-endian;
+			#thermal-sensor-cells = <1>;
+		};
+
+		thermal-zones {
+			cpu_thermal: cpu-thermal {
+				polling-delay-passive = <1000>;
+				polling-delay = <5000>;
+				thermal-sensors = <&tmu 0>;
+
+				trips {
+					cpu_alert: cpu-alert {
+						temperature = <85000>;
+						hysteresis = <2000>;
+						type = "passive";
+					};
+
+					cpu_crit: cpu-crit {
+						temperature = <95000>;

arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi

Quoted 10 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +10 -0
+						hysteresis = <2000>;
+						type = "critical";
+					};
+				};
+
+				cooling-maps {
+					map0 {
+						trip = <&cpu_alert>;
+						cooling-device =
+							<&cpu0

THERMAL_NO_LIMIT

arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi line 352

Quoted 1 line
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +1 -0
+
	THERMAL_NO_LIMIT>;

arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi

Quoted 6 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +6 -0
+					};
+
+					map1 {
+						trip = <&cpu_alert>;
+						cooling-device =
+							<&cpu4

THERMAL_NO_LIMIT

arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi line 359

Quoted 1 line
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +1 -0
+
	THERMAL_NO_LIMIT>;
Quoted 16 lines
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +5 -1
+					};
+				};
+			};
+		};
+
 	};
 
 };
--

2.1.0.27.g96db324

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