video: Fix issues with edid parsing

index e08e420920..ab7069fdcd 100644
@@ -85,6 +85,7 @@ static void decode_timing(u8 *buf, struct display_timing *timing)
 	uint x_mm, y_mm;
 	unsigned int ha, hbl, hso, hspw, hborder;
 	unsigned int va, vbl, vso, vspw, vborder;
+	struct edid_detailed_timing *t = (struct edid_detailed_timing *)buf;
 
 	/* Edid contains pixel clock in terms of 10KHz */
 	set_entry(&timing->pixelclock, (buf[0] + (buf[1] << 8)) * 10000);

@@ -111,6 +112,19 @@ static void decode_timing(u8 *buf, struct display_timing *timing)
 	set_entry(&timing->vback_porch, vbl - vso - vspw);
 	set_entry(&timing->vsync_len, vspw);
 
+	timing->flags = 0;
+	if (EDID_DETAILED_TIMING_FLAG_HSYNC_POLARITY(*t))
+		timing->flags |= DISPLAY_FLAGS_HSYNC_HIGH;
+	else
+		timing->flags |= DISPLAY_FLAGS_HSYNC_LOW;
+	if (EDID_DETAILED_TIMING_FLAG_VSYNC_POLARITY(*t))
+		timing->flags |= DISPLAY_FLAGS_VSYNC_HIGH;
+	else
+		timing->flags |= DISPLAY_FLAGS_VSYNC_LOW;
+
+	if (EDID_DETAILED_TIMING_FLAG_INTERLACED(*t))
+		timing->flags = DISPLAY_FLAGS_INTERLACED;
+
 	debug("Detailed mode clock %u Hz, %d mm x %d mm\n"
 	      "               %04x %04x %04x %04x hborder %x\n"
 	      "               %04x %04x %04x %04x vborder %x\n",

index ab7069fdcd..19410aa4fc 100644
@@ -136,6 +136,39 @@ static void decode_timing(u8 *buf, struct display_timing *timing)
 	      va + vbl, vborder);
 }
 
+/**
+ * Check if HDMI vendor specific data block is present in CEA block
+ * @param info	CEA extension block
+ * @return true if block is found
+ */
+static bool cea_is_hdmi_vsdb_present(struct edid_cea861_info *info)
+{
+	u8 end, i = 0;
+
+	/* check for end of data block */
+	end = info->dtd_offset;
+	if (end == 0)
+		end = 127;
+	if (end < 4 || end > 127)
+		return false;
+	end -= 4;
+
+	while (i < end) {
+		/* Look for vendor specific data block of appropriate size */
+		if ((EDID_CEA861_DB_TYPE(*info, i) == EDID_CEA861_DB_VENDOR) &&
+		    (EDID_CEA861_DB_LEN(*info, i) >= 5)) {
+			u8 *db = &info->data[i + 1];
+			u32 oui = db[0] | (db[1] << 8) | (db[2] << 16);
+
+			if (oui == HDMI_IEEE_OUI)
+				return true;
+		}
+		i += EDID_CEA861_DB_LEN(*info, i) + 1;
+	}
+
+	return false;
+}
+
 int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 		    int *panel_bits_per_colourp)
 {

@@ -181,6 +214,15 @@ int edid_get_timing(u8 *buf, int buf_size, struct display_timing *timing,
 			((edid->video_input_definition & 0x70) >> 3) + 4;
 	}
 
+	timing->hdmi_monitor = false;
+	if (edid->extension_flag && (buf_size >= EDID_EXT_SIZE)) {
+		struct edid_cea861_info *info =
+			(struct edid_cea861_info *)(buf + sizeof(*edid));
+
+		if (info->extension_tag == EDID_CEA861_EXTENSION_TAG)
+			timing->hdmi_monitor = cea_is_hdmi_vsdb_present(info);
+	}
+
 	return 0;
 }
 

index 8b022fa98a..a9f2f3d3ab 100644
@@ -19,6 +19,9 @@
 #define EDID_SIZE	128
 #define EDID_EXT_SIZE	256
 
+/* OUI of HDMI vendor specific data block */
+#define HDMI_IEEE_OUI 0x000c03
+
 #define GET_BIT(_x, _pos) \
 	(((_x) >> (_pos)) & 1)
 #define GET_BITS(_x, _pos_msb, _pos_lsb) \

@@ -234,6 +237,13 @@ struct edid1_info {
 	unsigned char checksum;
 } __attribute__ ((__packed__));
 
+enum edid_cea861_db_types {
+	EDID_CEA861_DB_AUDIO = 0x01,
+	EDID_CEA861_DB_VIDEO = 0x02,
+	EDID_CEA861_DB_VENDOR = 0x03,
+	EDID_CEA861_DB_SPEAKER = 0x04,
+};
+
 struct edid_cea861_info {
 	unsigned char extension_tag;
 #define EDID_CEA861_EXTENSION_TAG	0x02

@@ -251,6 +261,10 @@ struct edid_cea861_info {
 #define EDID_CEA861_DTD_COUNT(_x) \
 	GET_BITS(((_x).dtd_count), 3, 0)
 	unsigned char data[124];
+#define EDID_CEA861_DB_TYPE(_x, offset) \
+	GET_BITS((_x).data[offset], 7, 5)
+#define EDID_CEA861_DB_LEN(_x, offset) \
+	GET_BITS((_x).data[offset], 4, 0)
 } __attribute__ ((__packed__));
 
 /**

index 2134701c54..340766da1b 100644
@@ -967,6 +967,7 @@ struct display_timing {
 	struct timing_entry vsync_len;		/* ver. sync len */
 
 	enum display_flags flags;		/* display flags */
+	bool hdmi_monitor;			/* is hdmi monitor? */
 };
 
 /**

index 8a53109823..6039d676c5 100644
@@ -414,13 +414,9 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 		   HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_HIGH :
 		   HDMI_FC_INVIDCONF_DE_IN_POLARITY_ACTIVE_LOW);
 
-	/*
-	 * TODO(sjg at chromium.org>: Need to check for HDMI / DVI
-	 * inv_val |= (edid->hdmi_monitor_detected ?
-	 *	   HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE :
-	 *	   HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE);
-	 */
-	inv_val |= HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE;
+	inv_val |= (edid->hdmi_monitor ?
+		   HDMI_FC_INVIDCONF_DVI_MODEZ_HDMI_MODE :
+		   HDMI_FC_INVIDCONF_DVI_MODEZ_DVI_MODE);
 
 	inv_val |= HDMI_FC_INVIDCONF_R_V_BLANK_IN_OSC_ACTIVE_LOW;
 

@@ -459,7 +455,7 @@ static void hdmi_av_composer(struct dw_hdmi *hdmi,
 }
 
 /* hdmi initialization step b.4 */
-static void hdmi_enable_video_path(struct dw_hdmi *hdmi)
+static void hdmi_enable_video_path(struct dw_hdmi *hdmi, bool audio)
 {
 	uint clkdis;
 

@@ -484,8 +480,10 @@ static void hdmi_enable_video_path(struct dw_hdmi *hdmi)
 	clkdis &= ~HDMI_MC_CLKDIS_TMDSCLK_DISABLE;
 	hdmi_write(hdmi, clkdis, HDMI_MC_CLKDIS);
 
-	clkdis &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE;
-	hdmi_write(hdmi, clkdis, HDMI_MC_CLKDIS);
+	if (audio) {
+		clkdis &= ~HDMI_MC_CLKDIS_AUDCLK_DISABLE;
+		hdmi_write(hdmi, clkdis, HDMI_MC_CLKDIS);
+	}
 }
 
 /* workaround to clear the overflow condition */

@@ -716,7 +714,8 @@ int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid)
 {
 	int ret;
 
-	debug("hdmi, mode info : clock %d hdis %d vdis %d\n",
+	debug("%s, mode info : clock %d hdis %d vdis %d\n",
+	      edid->hdmi_monitor ? "hdmi" : "dvi",
 	      edid->pixelclock.typ, edid->hactive.typ, edid->vactive.typ);
 
 	hdmi_av_composer(hdmi, edid);

@@ -725,11 +724,13 @@ int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid)
 	if (ret)
 		return ret;
 
-	hdmi_enable_video_path(hdmi);
+	hdmi_enable_video_path(hdmi, edid->hdmi_monitor);
 
-	hdmi_audio_fifo_reset(hdmi);
-	hdmi_audio_set_format(hdmi);
-	hdmi_audio_set_samplerate(hdmi, edid->pixelclock.typ);
+	if (edid->hdmi_monitor) {
+		hdmi_audio_fifo_reset(hdmi);
+		hdmi_audio_set_format(hdmi);
+		hdmi_audio_set_samplerate(hdmi, edid->pixelclock.typ);
+	}
 
 	hdmi_video_packetize(hdmi);
 	hdmi_video_sample(hdmi);