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clk: meson-gxbb: Add const to some parent name arrays

PATCH Applied Stephen Boyd 2 participants 3 messages Jun 2, 2017 – Jun 8, 2017

Subsystems (3)
Arm/Amlogic Meson SoC support Common clk Arm/Amlogic Meson SoC clock framework
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Stephen Boyd

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PATCH 1/1 clk: meson-gxbb: Add const to some parent name arrays

These can be marked as const * const.

Cc Neil Armstrong <[email protected]>
Cc Jerome Brunet <[email protected]>
Signed-off-by Stephen Boyd <[email protected]>
---
 drivers/clk/meson/gxbb.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
drivers/clk/meson/gxbb.c +3 -3
index 2919a0e044a5..36c0e455437e 100644
@@ -701,7 +701,7 @@ static struct clk_gate gxbb_sar_adc_clk = {
  */
 
 static u32 mux_table_mali_0_1[] = {0, 1, 2, 3, 4, 5, 6, 7};
-static const char *gxbb_mali_0_1_parent_names[] = {
+static const char * const gxbb_mali_0_1_parent_names[] = {
 	"xtal", "gp0_pll", "mpll2", "mpll1", "fclk_div7",
 	"fclk_div4", "fclk_div3", "fclk_div5"
 };

@@ -801,7 +801,7 @@ static struct clk_gate gxbb_mali_1 = {
 };
 
 static u32 mux_table_mali[] = {0, 1};
-static const char *gxbb_mali_parent_names[] = {
+static const char * const gxbb_mali_parent_names[] = {
 	"mali_0", "mali_1"
 };
 

@@ -953,7 +953,7 @@ static struct clk_gate gxbb_32k_clk = {
 	},
 };
 
-static const char *gxbb_32k_clk_parent_names[] = {
+static const char * const gxbb_32k_clk_parent_names[] = {
 	"xtal", "cts_slow_oscin", "fclk_div3", "fclk_div5"
 };
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