ARM: aspeed: zaius: Support new board FSI gpio pin mapping

PATCH In review Robert Lippert 3 participants 4 messages Jun 2, 2017 – Jun 6, 2017

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Device tree bindings Arm (32-bit) Arm sub-architectures Arm/Aspeed machine support

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Robert Lippert

author

2017-06-02 19:46 UTC #0 lore raw

PATCH 1/1 ARM: aspeed: zaius: Support new board FSI gpio pin mapping

FSI routing was broken on EVT boards and all boards were reworked to use the nearest available GPIO pins. Future boards have fixed the issue so need to use the original planned GPIOG ports.

Signed-off-by Robert Lippert <[email protected]>

---
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts |  8 ++++++--
 arch/arm/mach-aspeed/aspeed.c              | 30 ++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 2 deletions(-)

arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +6 -2

index b5c4c0fb2986..68baf3288263 100644
@@ -80,8 +80,12 @@
 
 		status = "okay";
 
-		clock-gpios = <&gpio ASPEED_GPIO(C, 3) GPIO_ACTIVE_HIGH>;
-		data-gpios = <&gpio ASPEED_GPIO(C, 2) GPIO_ACTIVE_HIGH>;
+		/*
+		 * These 2 GPIOs are set per board revision in aspeed.c.
+		 * These are the DVT and beyond values:
+		 * clock-gpios = <&gpio ASPEED_GPIO(G, 0) GPIO_ACTIVE_HIGH>;
+		 * data-gpios = <&gpio ASPEED_GPIO(G, 1) GPIO_ACTIVE_HIGH>;
+		 */
 		trans-gpios = <&gpio ASPEED_GPIO(O, 6) GPIO_ACTIVE_HIGH>;
 		enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 		mux-gpios = <&gpio ASPEED_GPIO(P, 6) GPIO_ACTIVE_HIGH>;

arch/arm/mach-aspeed/aspeed.c +30 -0

index 5c88286c96fd..1e080d8909f4 100644
@@ -8,6 +8,8 @@
  */
 
 #include <linux/init.h>
+#include <linux/gpio/machine.h>
+#include <dt-bindings/gpio/aspeed-gpio.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/io.h>

@@ -141,6 +143,34 @@ static void __init do_zaius_setup(void)
 	/* Read BOARD_REV[4:0] fuses from GPIOM[7:3] */
 	reg = readl(AST_IO(AST_BASE_GPIO | 0x78));
 	board_rev = (reg >> 3) & 0x1F;
+	printk(KERN_INFO "Zaius platform board revision: 0x%02x\n", board_rev);
+
+	/* EVT boards have different FSI pin mappings */
+	if (board_rev < 0x08) {
+		static struct gpiod_lookup_table fsi_evt_gpio_lookup = {
+			.dev_id = "fsi-master",
+			.table = {
+				GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(C, 3),
+					    "clock", GPIO_ACTIVE_HIGH),
+				GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(C, 2),
+					    "data", GPIO_ACTIVE_HIGH),
+				{ },
+			},
+		};
+		gpiod_add_lookup_table(&fsi_evt_gpio_lookup);
+	} else {
+		static struct gpiod_lookup_table fsi_gpio_lookup = {
+			.dev_id = "fsi-master",
+			.table = {
+				GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(G, 0),
+					    "clock", GPIO_ACTIVE_HIGH),
+				GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(G, 1),
+					    "data", GPIO_ACTIVE_HIGH),
+				{ },
+			},
+		};
+		gpiod_add_lookup_table(&fsi_gpio_lookup);
+	}
 
 	/* Assert MAC2 PHY hardware reset */
 	/* Set pin low */

Signature · 1 line

2.13.0.506.g27d5fe0cd-goog

Joel Stanley

maintainer

2017-06-05 04:46 UTC #1 lore raw

Quoted 3 lines · Robert Lippert

FSI routing was broken on EVT boards and all boards were reworked to use the nearest available GPIO pins. Future boards have fixed the issue so need to use the original planned GPIOG ports.

How long will we need to carry support for the EVT boards?

We had proposed using u-boot to fix up the device tree for these kind of changes. If you want to support the EVT long term, we should look in to implementing those changes in u-boot.

I have applied this to dev-4.10 so we can support your boards for the time being.

Cheers,

Joel

Quoted 77 lines

Signed-off-by Robert Lippert <[email protected]>

---
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts |  8 ++++++--
 arch/arm/mach-aspeed/aspeed.c              | 30 ++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 2 deletions(-)

arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +6 -2

index b5c4c0fb2986..68baf3288263 100644
@@ -80,8 +80,12 @@
 
                status = "okay";
 
-               clock-gpios = <&gpio ASPEED_GPIO(C, 3) GPIO_ACTIVE_HIGH>;
-               data-gpios = <&gpio ASPEED_GPIO(C, 2) GPIO_ACTIVE_HIGH>;
+               /*
+                * These 2 GPIOs are set per board revision in aspeed.c.
+                * These are the DVT and beyond values:
+                * clock-gpios = <&gpio ASPEED_GPIO(G, 0) GPIO_ACTIVE_HIGH>;
+                * data-gpios = <&gpio ASPEED_GPIO(G, 1) GPIO_ACTIVE_HIGH>;
+                */
                trans-gpios = <&gpio ASPEED_GPIO(O, 6) GPIO_ACTIVE_HIGH>;
                enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
                mux-gpios = <&gpio ASPEED_GPIO(P, 6) GPIO_ACTIVE_HIGH>;

arch/arm/mach-aspeed/aspeed.c +30 -1

index 5c88286c96fd..1e080d8909f4 100644
@@ -8,6 +8,8 @@
  */
 
 #include <linux/init.h>
+#include <linux/gpio/machine.h>
+#include <dt-bindings/gpio/aspeed-gpio.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/io.h>

@@ -141,6 +143,34 @@ static void __init do_zaius_setup(void)
        /* Read BOARD_REV[4:0] fuses from GPIOM[7:3] */
        reg = readl(AST_IO(AST_BASE_GPIO | 0x78));
        board_rev = (reg >> 3) & 0x1F;
+       printk(KERN_INFO "Zaius platform board revision: 0x%02x\n", board_rev);
+
+       /* EVT boards have different FSI pin mappings */
+       if (board_rev < 0x08) {
+               static struct gpiod_lookup_table fsi_evt_gpio_lookup = {
+                       .dev_id = "fsi-master",
+                       .table = {
+                               GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(C, 3),
+                                           "clock", GPIO_ACTIVE_HIGH),
+                               GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(C, 2),
+                                           "data", GPIO_ACTIVE_HIGH),
+                               { },
+                       },
+               };
+               gpiod_add_lookup_table(&fsi_evt_gpio_lookup);
+       } else {
+               static struct gpiod_lookup_table fsi_gpio_lookup = {
+                       .dev_id = "fsi-master",
+                       .table = {
+                               GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(G, 0),
+                                           "clock", GPIO_ACTIVE_HIGH),
+                               GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(G, 1),
+                                           "data", GPIO_ACTIVE_HIGH),
+                               { },
+                       },
+               };
+               gpiod_add_lookup_table(&fsi_gpio_lookup);
+       }
 
        /* Assert MAC2 PHY hardware reset */
        /* Set pin low */
--

2.13.0.506.g27d5fe0cd-goog

Rob Lippert

2017-06-05 19:43 UTC #2 lore raw

Quoted 6 lines · Joel Stanley

Quoted 3 lines · Robert Lippert
FSI routing was broken on EVT boards and all boards were reworked to use the nearest available GPIO pins. Future boards have fixed the issue so need to use the original planned GPIOG ports.
How long will we need to carry support for the EVT boards?

EVT boards should be scrapped within a few months (by end of year at the latest) at which point we can remove this code hack and uncomment the properties in the .dts file.

Quoted 4 lines

We had proposed using u-boot to fix up the device tree for these kind of changes. If you want to support the EVT long term, we should look in to implementing those changes in u-boot.

I looked at that briefly but it was significantly more complicated :)

Quoted 3 lines

I have applied this to dev-4.10 so we can support your boards for the time being.

Thanks!

-Rob

Quoted 82 lines

Cheers,

Joel

Quoted 77 lines

Signed-off-by Robert Lippert <[email protected]>

---
 arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts |  8 ++++++--
 arch/arm/mach-aspeed/aspeed.c              | 30 ++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 2 deletions(-)

arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts +6 -2

index b5c4c0fb2986..68baf3288263 100644
@@ -80,8 +80,12 @@
 
                status = "okay";
 
-               clock-gpios = <&gpio ASPEED_GPIO(C, 3) GPIO_ACTIVE_HIGH>;
-               data-gpios = <&gpio ASPEED_GPIO(C, 2) GPIO_ACTIVE_HIGH>;
+               /*
+                * These 2 GPIOs are set per board revision in aspeed.c.
+                * These are the DVT and beyond values:
+                * clock-gpios = <&gpio ASPEED_GPIO(G, 0) GPIO_ACTIVE_HIGH>;
+                * data-gpios = <&gpio ASPEED_GPIO(G, 1) GPIO_ACTIVE_HIGH>;
+                */
                trans-gpios = <&gpio ASPEED_GPIO(O, 6) GPIO_ACTIVE_HIGH>;
                enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
                mux-gpios = <&gpio ASPEED_GPIO(P, 6) GPIO_ACTIVE_HIGH>;

arch/arm/mach-aspeed/aspeed.c +30 -1

index 5c88286c96fd..1e080d8909f4 100644
@@ -8,6 +8,8 @@
  */
 
 #include <linux/init.h>
+#include <linux/gpio/machine.h>
+#include <dt-bindings/gpio/aspeed-gpio.h>
 #include <linux/of_irq.h>
 #include <linux/of_platform.h>
 #include <linux/io.h>

@@ -141,6 +143,34 @@ static void __init do_zaius_setup(void)
        /* Read BOARD_REV[4:0] fuses from GPIOM[7:3] */
        reg = readl(AST_IO(AST_BASE_GPIO | 0x78));
        board_rev = (reg >> 3) & 0x1F;
+       printk(KERN_INFO "Zaius platform board revision: 0x%02x\n", board_rev);
+
+       /* EVT boards have different FSI pin mappings */
+       if (board_rev < 0x08) {
+               static struct gpiod_lookup_table fsi_evt_gpio_lookup = {
+                       .dev_id = "fsi-master",
+                       .table = {
+                               GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(C, 3),
+                                           "clock", GPIO_ACTIVE_HIGH),
+                               GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(C, 2),
+                                           "data", GPIO_ACTIVE_HIGH),
+                               { },
+                       },
+               };
+               gpiod_add_lookup_table(&fsi_evt_gpio_lookup);
+       } else {
+               static struct gpiod_lookup_table fsi_gpio_lookup = {
+                       .dev_id = "fsi-master",
+                       .table = {
+                               GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(G, 0),
+                                           "clock", GPIO_ACTIVE_HIGH),
+                               GPIO_LOOKUP("1e780000.gpio", ASPEED_GPIO(G, 1),
+                                           "data", GPIO_ACTIVE_HIGH),
+                               { },
+                       },
+               };
+               gpiod_add_lookup_table(&fsi_gpio_lookup);
+       }
 
        /* Assert MAC2 PHY hardware reset */
        /* Set pin low */
--

2.13.0.506.g27d5fe0cd-goog

Joel Stanley

maintainer

2017-06-06 02:14 UTC #3 lore raw

Quoted 13 lines · Rob Lippert

Quoted 6 lines · Joel Stanley
Quoted 3 lines · Robert Lippert
FSI routing was broken on EVT boards and all boards were reworked to use the nearest available GPIO pins. Future boards have fixed the issue so need to use the original planned GPIOG ports.
How long will we need to carry support for the EVT boards?
EVT boards should be scrapped within a few months (by end of year at the latest) at which point we can remove this code hack and uncomment the properties in the .dts file.
Quoted 1 line

Quoted 5 lines

Quoted 3 lines
We had proposed using u-boot to fix up the device tree for these kind of changes. If you want to support the EVT long term, we should look in to implementing those changes in u-boot.
I looked at that briefly but it was significantly more complicated :)

Yeah agreed. Lets carry the hack for now, and it can be dropped in a future rebase.

Cheers,

Joel