ARM: dts: aspeed: quanta-q71l: Risers and i2c muxes.
Subsystems (2)
PATCH 3/4 ARM: dts: aspeed: quanta-q71l: Risers and i2c muxes.
Signed-off-by Patrick Venture <[email protected]>
--- arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 53 ++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+)
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts +53 -0
@@ -84,6 +84,30 @@ &i2c1 { status = "okay"; + /* Memory Riser 1/5 FRU */ + eeprom@50 { + compatible = "atmel,24c02"; + reg = <0x50>; + }; + + /* Memory Riser 2/6 FRU */ + eeprom@51 { + compatible = "atmel,24c02"; + reg = <0x51>; + }; + + /* Memory Riser 3/7 FRU */ + eeprom@52 { + compatible = "atmel,24c02"; + reg = <0x52>; + }; + + /* Memory Riser 4/8 FRU */ + eeprom@53 { + compatible = "atmel,24c02"; + reg = <0x53>; + }; + /* Baseboard FRU */ eeprom@54 { compatible = "atmel,24c64";
@@ -99,6 +123,34 @@ &i2c2 { status = "okay"; + + /* 0: PCIe Slot 2, + * Slot 3, + * Slot 6, + * Slot 7 + */ + i2c-switch@74 { + compatible = "pca9546"; + reg = <0x74>; + #address-cells = <1>; + #size-cells = <0>; + }; + + /* 0: PCIe Slot 1, + * Slot 4, + * Slot 5, + * Slot 8, + * Slot 9, + * Slot 10, + * SSD 1, + * SSD 2 + */ + i2cswitch@77 { + compatible = "pca9548"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x77>; + }; }; &i2c3 {
@@ -130,6 +182,7 @@ &i2c8 { status = "okay"; + /* BMC FRU */ eeprom@50 { compatible = "atmel,24c64"; reg = <0x50>;
Signature · 1 line
2.13.1.518.g3df882009-goog