advsync: Substitute 'Figure' for 'Table'
PATCH 1/1 advsync: Substitute 'Figure' for 'Table'
From b65cb246b772bf16020ef1f1dab55208a5444fcd Mon Sep 17 00:00:00 2001
From: Akira Yokosawa <[email protected]>
Date: Sat, 24 Jun 2017 00:04:14 +0900
Subject: [PATCH] advsync: Substitute 'Figure' for 'Table'
Commit 96ab6febd94c ("advsync: Convert memory-misordering table to herd7 litmus test") missed these substitutions.
--- advsync/memorybarriers.tex | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
advsync/memorybarriers.tex +2 -2
@@ -49,7 +49,7 @@ Unfortunately, these intuitions break down completely in face of code that makes direct use of explicit memory barriers for data structures in shared memory. For example, the litmus test in -Table~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test} +Figure~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test} appears to guarantee that the assertion never fires. After all, if \nbco{0:r2=0},\footnote{ That is, Thread~\co{P0()}'s instance of local variable \co{r2}
@@ -65,7 +65,7 @@ assertion. The example is symmetric, so similar hopeful reasoning might lead us to hope that \nbco{1:r2=0} guarantees that \nbco{0:r2=1}. Unfortunately, the lack of memory barriers in -Table~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test} +Figure~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test} dashes these hopes. Both the compiler and the CPU are within their rights to reorder the statements within both Thread~\co{P0()} and Thread~\co{P1()},
Signature · 1 line
2.7.4
Quoted 9 lines · Akira Yokosawa
Quoted 1 line
From
b65cb246b772bf16020ef1f1dab55208a5444fcdMon Sep 17 00:00:00 2001From: Akira Yokosawa <[email protected]>
Date: Sat, 24 Jun 2017 00:04:14 +0900
Subject: [PATCH] advsync: Substitute 'Figure' for 'Table'Commit
96ab6febd94c("advsync: Convert memory-misordering table to herd7 litmus test") missed these substitutions.Signed-off-by Akira Yokosawa <[email protected]>
I knew I was forgetting something! ;-)
Good catch, queued and pushed, thank you!
Thanx, Paul
Quoted 29 lines
--- advsync/memorybarriers.tex | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)advsync/memorybarriers.tex +2
-2@@ -49,7 +49,7 @@ Unfortunately, these intuitions break down completely in face of code that makes direct use of explicit memory barriers for data structures in shared memory. For example, the litmus test in -Table~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test} +Figure~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test} appears to guarantee that the assertion never fires. After all, if \nbco{0:r2=0},\footnote{ That is, Thread~\co{P0()}'s instance of local variable \co{r2}@@ -65,7 +65,7 @@ assertion. The example is symmetric, so similar hopeful reasoning might lead us to hope that \nbco{1:r2=0} guarantees that \nbco{0:r2=1}. Unfortunately, the lack of memory barriers in -Table~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test} +Figure~\ref{fig:advsync:Memory Misordering: Store-Buffering Litmus Test} dashes these hopes. Both the compiler and the CPU are within their rights to reorder the statements within both Thread~\co{P0()} and Thread~\co{P1()},Signature · 1 line
2.7.4