staging: sm750fb: refactor the clock frequency calculation method
PATCH 1/1 staging: sm750fb: refactor the clock frequency calculation method
speed up calculation by merging two divisions into one.
Signed-off-by Lynn Lei <[email protected]>
--- drivers/staging/sm750fb/ddk750_chip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/staging/sm750fb/ddk750_chip.c +1 -1
@@ -44,7 +44,7 @@ static unsigned int get_mxclk_freq(void)OD = (pll_reg &PLL_CTRL_OD_MASK ) >>PLL_CTRL_OD_SHIFT ;POD = (pll_reg &PLL_CTRL_POD_MASK ) >>PLL_CTRL_POD_SHIFT ; -return DEFAULT_INPUT_CLOCK *M /N / (1 <<OD ) / (1 <<POD ); +return DEFAULT_INPUT_CLOCK *M /N / (1 << (OD +POD )); }/*
Signature · 1 line
2.13.2
Greg KH
maintainerQuoted 1 line · Lynn Lei
speed up calculation by merging two divisions into one.
How much did you speed it up? Please provide proof of anything like this if you say it is a speed up.
Quoted 11 lines
Signed-off-by Lynn Lei <[email protected]>--- drivers/staging/sm750fb/ddk750_chip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)drivers/staging/sm750fb/ddk750_chip.c +0
-0
drivers/staging/sm750fb/ddk750_chip.c static unsigned int get_mxclk_freq(void) · line 47
Quoted 5 lines
drivers/staging/sm750fb/ddk750_chip.c +1
-1@@ -44,7 +44,7 @@ static unsigned int get_mxclk_freq(void)OD = (pll_reg &PLL_CTRL_OD_MASK ) >>PLL_CTRL_OD_SHIFT ;POD = (pll_reg &PLL_CTRL_POD_MASK ) >>PLL_CTRL_POD_SHIFT ; -return DEFAULT_INPUT_CLOCK *M /N / (1 <<OD ) / (1 <<POD ); +return DEFAULT_INPUT_CLOCK *M /N / (1 << (OD +POD ));
Are you sure that gcc didn't already do this for you? It's a constant number, I doubt this did anything at all.
thanks,
greg k-h