arch/mips: add option for toolchains supporting -mnan
PATCH 1/5 arch/mips: add option for toolchains supporting -mnan
-mnan option was added in gcc-4.9.0 so make sure that users cannot select the NaN mode when using toolchains that have a gcc older than 4.9.0, and also make sure that the -mnan option is not passed at all to the toolchain-wrapper and target cflags.
--- arch/Config.in.mips | 1 + toolchain/toolchain-common.in | 4 ++++ toolchain/toolchain-external/pkg-toolchain-external.mk | 2 ++ 3 files changed, 7 insertions(+)
arch/Config.in.mips +1 -0
@@ -169,6 +169,7 @@ config BR2_MIPS_NAN_2008 choice prompt "Target NaN" + depends on BR2_TOOLCHAIN_HAS_MNAN_OPTION depends on BR2_mips_32r5 || BR2_mips_64r5 default BR2_MIPS_ENABLE_NAN_2008 help
toolchain/toolchain-common.in +4 -0
@@ -342,6 +342,10 @@ config BR2_TOOLCHAIN_GCC_AT_LEAST default "4.4" if BR2_TOOLCHAIN_GCC_AT_LEAST_4_4 default "4.3" if BR2_TOOLCHAIN_GCC_AT_LEAST_4_3 +config BR2_TOOLCHAIN_HAS_MNAN_OPTION + bool + default y if BR2_TOOLCHAIN_GCC_AT_LEAST_4_9 + config BR2_TOOLCHAIN_HAS_SYNC_1 bool default y
toolchain/toolchain-external/pkg-toolchain-external.mk +2 -0
@@ -178,10 +178,12 @@ ifneq ($(CC_TARGET_ABI_),) TOOLCHAIN_EXTERNAL_CFLAGS += -mabi=$(CC_TARGET_ABI_) TOOLCHAIN_EXTERNAL_TOOLCHAIN_WRAPPER_ARGS += -DBR_ABI='"$(CC_TARGET_ABI_)"' endif +ifeq ($(BR2_TOOLCHAIN_HAS_MNAN_OPTION),y) ifneq ($(CC_TARGET_NAN_),) TOOLCHAIN_EXTERNAL_CFLAGS += -mnan=$(CC_TARGET_NAN_) TOOLCHAIN_EXTERNAL_TOOLCHAIN_WRAPPER_ARGS += -DBR_NAN='"$(CC_TARGET_NAN_)"' endif +endif ifneq ($(CC_TARGET_FP32_MODE_),) TOOLCHAIN_EXTERNAL_CFLAGS += -mfp$(CC_TARGET_FP32_MODE_) TOOLCHAIN_EXTERNAL_TOOLCHAIN_WRAPPER_ARGS += -DBR_FP32_MODE='"$(CC_TARGET_FP32_MODE_)"'
Signature · 1 line
2.13.0
PATCH 2/5 arch/mips: add option for toolchains supporting -mfpxx
-mfpxx option was added in gcc-5.1.0 so make sure that users cannot select the "xx" fp32 mode when using toolchains that have a gcc older than 5.1.0.
-mfp32 and -mfp64 were added in gcc-4.1.0, so given the older gcc version we support in Buildroot (in the GCC_AT_LEAST options) is 4.3 we don't need to do anything else for them.
--- arch/Config.in.mips | 3 ++- toolchain/toolchain-common.in | 4 ++++ 2 files changed, 6 insertions(+), 1 deletion(-)
arch/Config.in.mips +2 -1
@@ -137,7 +137,7 @@ config BR2_MIPS_SOFT_FLOAT choice prompt "FP mode" depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT - default BR2_MIPS_FP32_MODE_XX + default BR2_MIPS_FP32_MODE_XX if BR2_TOOLCHAIN_HAS_MFPXX_OPTION help MIPS32 supports different FP modes (32,xx,64). Information about FP modes can be found here:
@@ -149,6 +149,7 @@ config BR2_MIPS_FP32_MODE_32 depends on !BR2_MIPS_CPU_MIPS32R6 config BR2_MIPS_FP32_MODE_XX + depends on BR2_TOOLCHAIN_HAS_MFPXX_OPTION bool "xx" config BR2_MIPS_FP32_MODE_64
toolchain/toolchain-common.in +4 -0
@@ -346,6 +346,10 @@ config BR2_TOOLCHAIN_HAS_MNAN_OPTION bool default y if BR2_TOOLCHAIN_GCC_AT_LEAST_4_9 +config BR2_TOOLCHAIN_HAS_MFPXX_OPTION + bool + default y if BR2_TOOLCHAIN_GCC_AT_LEAST_5 + config BR2_TOOLCHAIN_HAS_SYNC_1 bool default y
Signature · 1 line
2.13.0
PATCH 2/5 arch/mips: add option for toolchains supporting -mfpxx
Hello,
arch/Config.in.mips config BR2_MIPS_FP32_MODE_32 · line 153
Quoted 3 lines · Vicente Olivert Riera
config
BR2_MIPS_FP32_MODE_XXarch/Config.in.mips +1
-0+ depends on BR2_TOOLCHAIN_HAS_MFPXX_OPTION bool "xx"
The "depends on" line should have been after the "bool" line, so I fixed that and applied. Thanks a lot!
Thomas
Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
PATCH 3/5 arch/mips: add DSP support
In reply to Vicente Olivert RieraThis patch adds support for the MIPS DSP ASE. They come in three versions, DSP (r1), DSPr2 and DSPr3. Each one of them is a superset of the other, so selecting DSPr2 will imply DSP (r1) as well, and selecting DSPr3 will imply both DSP (r1) and DSPr2 as well.
For generic target architecture variants we let the user choose between the different compatible versions. For well known cores the user can only choose the DSP version that specific core would implement, or none, since implementing the DSP module in a core may be optional.
DSP (r1) and DSPr2 are available since MIPS release version 2. DSPr3 is only available since MIPS release version 6.
--- arch/Config.in | 3 + arch/Config.in.mips | 71 ++++++++++++++++++++++ toolchain/toolchain-common.in | 3 + .../toolchain-external/pkg-toolchain-external.mk | 5 ++ toolchain/toolchain-wrapper.c | 3 + 5 files changed, 85 insertions(+)
arch/Config.in +3 -0
@@ -270,6 +270,9 @@ config BR2_GCC_TARGET_NAN config BR2_GCC_TARGET_FP32_MODE string +config BR2_GCC_TARGET_DSP + string + config BR2_GCC_TARGET_CPU string
arch/Config.in.mips +71 -0
124 lines not on this page · raw message
toolchain/toolchain-common.in +3 -0
@@ -350,6 +350,9 @@ config BR2_TOOLCHAIN_HAS_MFPXX_OPTION bool default y if BR2_TOOLCHAIN_GCC_AT_LEAST_5 +config BR2_TOOLCHAIN_HAS_MDSPR3_OPTION + bool + config BR2_TOOLCHAIN_HAS_SYNC_1 bool default y
toolchain/toolchain-external/pkg-toolchain-external.mk +5 -0
@@ -155,6 +155,7 @@ endif CC_TARGET_ARCH_ := $(call qstrip,$(BR2_GCC_TARGET_ARCH)) CC_TARGET_ABI_ := $(call qstrip,$(BR2_GCC_TARGET_ABI)) CC_TARGET_NAN_ := $(call qstrip,$(BR2_GCC_TARGET_NAN)) +CC_TARGET_DSP_ := $(call qstrip,$(BR2_GCC_TARGET_DSP)) CC_TARGET_FP32_MODE_ := $(call qstrip,$(BR2_GCC_TARGET_FP32_MODE)) CC_TARGET_FPU_ := $(call qstrip,$(BR2_GCC_TARGET_FPU)) CC_TARGET_FLOAT_ABI_ := $(call qstrip,$(BR2_GCC_TARGET_FLOAT_ABI))
@@ -184,6 +185,10 @@ TOOLCHAIN_EXTERNAL_CFLAGS += -mnan=$(CC_TARGET_NAN_) TOOLCHAIN_EXTERNAL_TOOLCHAIN_WRAPPER_ARGS += -DBR_NAN='"$(CC_TARGET_NAN_)"' endif endif +ifneq ($(CC_TARGET_DSP_),) +TOOLCHAIN_EXTERNAL_CFLAGS += -m$(CC_TARGET_DSP_) +TOOLCHAIN_EXTERNAL_TOOLCHAIN_WRAPPER_ARGS += -DBR_DSP='"$(CC_TARGET_DSP_)"' +endif ifneq ($(CC_TARGET_FP32_MODE_),) TOOLCHAIN_EXTERNAL_CFLAGS += -mfp$(CC_TARGET_FP32_MODE_) TOOLCHAIN_EXTERNAL_TOOLCHAIN_WRAPPER_ARGS += -DBR_FP32_MODE='"$(CC_TARGET_FP32_MODE_)"'
toolchain/toolchain-wrapper.c +3 -0
@@ -54,6 +54,9 @@ static char *predef_args[] = {#ifdef BR_NAN "-mnan=" BR_NAN,#endif +#ifdef BR_DSP + "-m" BR_DSP, +#endif #ifdef BR_FPU "-mfpu=" BR_FPU,#endif
Signature · 1 line
2.13.0
PATCH 3/5 arch/mips: add DSP support
Hi all,
Quoted 5 lines · Vicente Olivert Riera
This patch adds support for the MIPS DSP ASE. They come in three versions, DSP (r1), DSPr2 and DSPr3. Each one of them is a superset of the other, so selecting DSPr2 will imply DSP (r1) as well, and selecting DSPr3 will imply both DSP (r1) and DSPr2 as well.
Quoted 7 lines
For generic target architecture variants we let the user choose between the different compatible versions. For well known cores the user can only choose the DSP version that specific core would implement, or none, since implementing the DSP module in a core may be optional.
DSP (r1) and DSPr2 are available since MIPS release version 2. DSPr3 is only available since MIPS release version 6.
This and the following patches are pretty complicated. Given that interest in
MIPS in general seems to be declining, and given that Vicente is no longer contributing to Buildroot, we feel that there is a big risk that this stuff is just going to bitrot and little chance that anybody will actually ever use this.
Therefore, I've marked these patches as Rejected in patchwork.
If anybody feels they need this, feel free to resend. For your convenience,
here are the patchwork URLs:
http://patchwork.ozlabs.org/patch/792228/
http://patchwork.ozlabs.org/patch/792227/
http://patchwork.ozlabs.org/patch/792226/
Regards,
Arnout
Quoted 9 lines
Signed-off-by Vicente Olivert Riera <[email protected]>--- arch/Config.in | 3 + arch/Config.in.mips | 71 ++++++++++++++++++++++ toolchain/toolchain-common.in | 3 + .../toolchain-external/pkg-toolchain-external.mk | 5 ++ toolchain/toolchain-wrapper.c | 3 + 5 files changed, 85 insertions(+)
[snip]
Signature · 6 lines
Arnout Vandecappelle arnout at mind be Senior Embedded Software Architect +32-16-286500 Essensium/Mind http://www.mind.be G.Geenslaan 9, 3001 Leuven, Belgium BE 872 984 063 RPR Leuven LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle GPG fingerprint: 7493 020B C7E3 8618 8DEC 222C 82EB F404 F9AC 0DDF
PATCH 4/5 toolchains/mips: state that Codescape toolchains support -mdspr3
In reply to Vicente Olivert Riera-mdspr3 is not yet available in upstream gcc, but Codescape toolchains contain the necessary patches for supporting it.
--- .../toolchain-external/toolchain-external-codescape-img-mips/Config.in | 1 + .../toolchain-external/toolchain-external-codescape-mti-mips/Config.in | 1 + 2 files changed, 2 insertions(+)
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +1 -0
@@ -8,6 +8,7 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_7 select BR2_TOOLCHAIN_GCC_AT_LEAST_4_9 select BR2_TOOLCHAIN_HAS_FORTRAN + select BR2_TOOLCHAIN_HAS_MDSPR3_OPTION help Codescape IMG GNU Linux Toolchain 2016.05 for the MIPS architecture, from Imagination Technologies. It uses gcc
toolchain/toolchain-external/toolchain-external-codescape-mti-mips/Config.in +1 -0
@@ -9,6 +9,7 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS select BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_7 select BR2_TOOLCHAIN_GCC_AT_LEAST_4_9 select BR2_TOOLCHAIN_HAS_FORTRAN + select BR2_TOOLCHAIN_HAS_MDSPR3_OPTION help Codescape MTI GNU Linux Toolchain 2016.05 for the MIPS architecture, from Imagination Technologies. It uses gcc
Signature · 1 line
2.13.0
PATCH 5/5 arch/mips: add MSA support
In reply to Vicente Olivert RieraThis patch adds support for MIPS SIMD Architecture (MSA) extension. This feature is available since MIPS release version 5 and is mutually exclusive with the MIPS DSP extension.
--- arch/Config.in | 3 +++ arch/Config.in.mips | 26 ++++++++++++++++++++++ toolchain/toolchain-common.in | 4 ++++ .../toolchain-external/pkg-toolchain-external.mk | 7 ++++++ toolchain/toolchain-wrapper.c | 3 +++ 5 files changed, 43 insertions(+)
arch/Config.in +3 -0
@@ -273,6 +273,9 @@ config BR2_GCC_TARGET_FP32_MODE config BR2_GCC_TARGET_DSP string +config BR2_GCC_TARGET_MSA + string + config BR2_GCC_TARGET_CPU string
arch/Config.in.mips +26 -0
@@ -29,6 +29,8 @@ config BR2_MIPS_CPU_HAS_DSP_R2 bool config BR2_MIPS_CPU_HAS_DSP_R3 bool +config BR2_MIPS_CPU_HAS_MSA + bool # some cpu features are optional depending on the core config BR2_MIPS_CPU_MAYBE_HAS_DSP_R1
@@ -37,6 +39,8 @@ config BR2_MIPS_CPU_MAYBE_HAS_DSP_R2 bool config BR2_MIPS_CPU_MAYBE_HAS_DSP_R3 bool +config BR2_MIPS_CPU_MAYBE_HAS_MSA + bool choice prompt "Target Architecture Variant"
@@ -65,6 +69,7 @@ config BR2_mips_32r5 select BR2_MIPS_CPU_MIPS32R5 select BR2_MIPS_CPU_MAYBE_HAS_DSP_R1 select BR2_MIPS_CPU_MAYBE_HAS_DSP_R2 + select BR2_MIPS_CPU_MAYBE_HAS_MSA config BR2_mips_32r6 bool "Generic MIPS32R6" depends on !BR2_ARCH_IS_64
@@ -72,6 +77,7 @@ config BR2_mips_32r6 select BR2_MIPS_CPU_MAYBE_HAS_DSP_R1 select BR2_MIPS_CPU_MAYBE_HAS_DSP_R2 select BR2_MIPS_CPU_MAYBE_HAS_DSP_R3 + select BR2_MIPS_CPU_MAYBE_HAS_MSA config BR2_mips_interaptiv bool "interAptiv" depends on !BR2_ARCH_IS_64
@@ -93,6 +99,7 @@ config BR2_mips_p5600 depends on !BR2_ARCH_IS_64 select BR2_MIPS_CPU_MIPS32R5 select BR2_MIPS_NAN_2008 + select BR2_MIPS_CPU_MAYBE_HAS_MSA config BR2_mips_xburst bool "XBurst" depends on !BR2_ARCH_IS_64
@@ -122,6 +129,7 @@ config BR2_mips_64r5 select BR2_MIPS_CPU_MIPS64R5 select BR2_MIPS_CPU_MAYBE_HAS_DSP_R1 select BR2_MIPS_CPU_MAYBE_HAS_DSP_R2 + select BR2_MIPS_CPU_MAYBE_HAS_MSA config BR2_mips_64r6 bool "Generic MIPS64R6" depends on BR2_ARCH_IS_64
@@ -129,14 +137,17 @@ config BR2_mips_64r6 select BR2_MIPS_CPU_MAYBE_HAS_DSP_R1 select BR2_MIPS_CPU_MAYBE_HAS_DSP_R2 select BR2_MIPS_CPU_MAYBE_HAS_DSP_R3 + select BR2_MIPS_CPU_MAYBE_HAS_MSA config BR2_mips_i6400 bool "I6400" depends on BR2_ARCH_IS_64 select BR2_MIPS_CPU_MIPS64R6 + select BR2_MIPS_CPU_MAYBE_HAS_MSA config BR2_mips_p6600 bool "P6600" depends on BR2_ARCH_IS_64 select BR2_MIPS_CPU_MIPS64R6 + select BR2_MIPS_CPU_MAYBE_HAS_MSA endchoice
@@ -263,6 +274,21 @@ config BR2_GCC_TARGET_DSP default "dspr2" if BR2_MIPS_CPU_HAS_DSP_R2 default "dspr3" if BR2_MIPS_CPU_HAS_DSP_R3 +config BR2_MIPS_ENABLE_MSA + bool "Enable MSA extension support" + depends on BR2_TOOLCHAIN_HAS_MMSA_OPTION + depends on BR2_MIPS_CPU_MAYBE_HAS_MSA && BR2_MIPS_FP32_MODE_64 + depends on !(BR2_MIPS_CPU_HAS_DSP_R1 || BR2_MIPS_CPU_HAS_DSP_R2 || BR2_MIPS_CPU_HAS_DSP_R3) + select BR2_MIPS_CPU_HAS_MSA + help + For some CPU cores, the MSA extension is optional. + Select this option if you are certain your particular + implementation has MSA support and you want to use it. + +config BR2_GCC_TARGET_MSA + default "no-msa" if !BR2_MIPS_CPU_HAS_MSA + default "msa" if BR2_MIPS_CPU_HAS_MSA + config BR2_ARCH default "mips" if BR2_mips default "mipsel" if BR2_mipsel
toolchain/toolchain-common.in +4 -0
@@ -353,6 +353,10 @@ config BR2_TOOLCHAIN_HAS_MFPXX_OPTION config BR2_TOOLCHAIN_HAS_MDSPR3_OPTION bool +config BR2_TOOLCHAIN_HAS_MMSA_OPTION + bool + default y if BR2_TOOLCHAIN_GCC_AT_LEAST_7 + config BR2_TOOLCHAIN_HAS_SYNC_1 bool default y
toolchain/toolchain-external/pkg-toolchain-external.mk +7 -0
@@ -156,6 +156,7 @@ CC_TARGET_ARCH_ := $(call qstrip,$(BR2_GCC_TARGET_ARCH)) CC_TARGET_ABI_ := $(call qstrip,$(BR2_GCC_TARGET_ABI)) CC_TARGET_NAN_ := $(call qstrip,$(BR2_GCC_TARGET_NAN)) CC_TARGET_DSP_ := $(call qstrip,$(BR2_GCC_TARGET_DSP)) +CC_TARGET_MSA_ := $(call qstrip,$(BR2_GCC_TARGET_MSA)) CC_TARGET_FP32_MODE_ := $(call qstrip,$(BR2_GCC_TARGET_FP32_MODE)) CC_TARGET_FPU_ := $(call qstrip,$(BR2_GCC_TARGET_FPU)) CC_TARGET_FLOAT_ABI_ := $(call qstrip,$(BR2_GCC_TARGET_FLOAT_ABI))
@@ -189,6 +190,12 @@ ifneq ($(CC_TARGET_DSP_),) TOOLCHAIN_EXTERNAL_CFLAGS += -m$(CC_TARGET_DSP_) TOOLCHAIN_EXTERNAL_TOOLCHAIN_WRAPPER_ARGS += -DBR_DSP='"$(CC_TARGET_DSP_)"' endif +ifeq ($(BR2_TOOLCHAIN_HAS_MMSA_OPTION),y) +ifneq ($(CC_TARGET_MSA_),) +TOOLCHAIN_EXTERNAL_CFLAGS += -m$(CC_TARGET_MSA_) +TOOLCHAIN_EXTERNAL_TOOLCHAIN_WRAPPER_ARGS += -DBR_MSA='"$(CC_TARGET_MSA_)"' +endif +endif ifneq ($(CC_TARGET_FP32_MODE_),) TOOLCHAIN_EXTERNAL_CFLAGS += -mfp$(CC_TARGET_FP32_MODE_) TOOLCHAIN_EXTERNAL_TOOLCHAIN_WRAPPER_ARGS += -DBR_FP32_MODE='"$(CC_TARGET_FP32_MODE_)"'
toolchain/toolchain-wrapper.c +3 -0
@@ -57,6 +57,9 @@ static char *predef_args[] = {#ifdef BR_DSP "-m" BR_DSP,#endif +#ifdef BR_MSA + "-m" BR_MSA, +#endif #ifdef BR_FPU "-mfpu=" BR_FPU,#endif
Signature · 1 line
2.13.0
Thomas Petazzoni
AppliedPATCH 1/5 arch/mips: add option for toolchains supporting -mnan
In reply to Vicente Olivert RieraHello,
Quoted 11 lines · Vicente Olivert Riera
-mnan option was added in gcc-4.9.0 so make sure that users cannot select the NaN mode when using toolchains that have a gcc older than 4.9.0, and also make sure that the -mnan option is not passed at all to the toolchain-wrapper and target cflags.
Signed-off-by Vicente Olivert Riera <[email protected]>--- arch/Config.in.mips | 1 + toolchain/toolchain-common.in | 4 ++++ toolchain/toolchain-external/pkg-toolchain-external.mk | 2 ++ 3 files changed, 7 insertions(+)
Applied to master, thanks.
Thomas
Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com