ARM: dts: sun7i: Add I2S0 pinctrl settings

From: Marcus Cooper <[email protected]>

The A20 SoC has a couple of i2s blocks. This patch adds the pinctrl settings for block i2s0.

---
 arch/arm/boot/dts/sun7i-a20.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

index 96bee776e145..01f9ee329913 100644
@@ -1163,6 +1163,31 @@
 				function = "i2c3";
 			};
 
+			i2s0_mclk: i2s0 at 0 {
+				pins = "PB5";
+				function = "i2s0";
+			};
+
+			i2s0_bclk: i2s0 at 1 {
+				pins = "PB6";
+				function = "i2s0";
+			};
+
+			i2s0_lrclk: i2s0 at 2 {
+				pins = "PB7";
+				function = "i2s0";
+			};
+
+			i2s0_sdo0: i2s0 at 3 {
+				pins = "PB8";
+				function = "i2s0";
+			};
+
+			i2s0_sdi: i2s0 at 4 {
+				pins = "PB12";
+				function = "i2s0";
+			};
+
 			ir0_rx_pins_a: ir0 at 0 {
 				pins = "PB4";
 				function = "ir0";

2.13.3

Hi Marcus,

We're not adding pin groups that are not used by anyone. If you have a board using them, please send the DT for that board too.

Thanks!
Maxime

Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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No...I've only got an Olimex SOM EVB which exposes these pins on a GPIO header (like many of the dev boards). Just thought if we included them in the dtsi then adding overlays for i2s devices would be simplified.
BR,
CK