Skip to contentSkip to conversation

ARM: dts: imx6: RDU2: Ethernet switch and PHYs

PATCH New Andrew Lunn 4 participants 9 messages Jul 17, 2017 – Jul 25, 2017

Subsystems (2)
Device tree bindings Arm i.MX and Layerscape
lore
Share & tools
lore

Andrew Lunn

author
#0 lore raw

cover ARM: dts: imx6: RDU2: Ethernet switch and PHYs

This patchset extends the RDU2 to support its Ethernet switch, the PHYs within the switch, the switches EEPROM, and the Micrel PHY connected to the FEC.

Andrew Lunn (5):
ARM: dts: imx6: RDU2: Add Micrel PHY to FEC
ARM: dts: imx6: RDU2: Add DSA support for the Marvell 88E6352
ARM: dts: imx6: RDU2: Add Switch EEPROM
ARM: dts: imx6: RDU2: Add Switch interrupts
ARM: dts: imx6: RDU2: Add Micrel PHY interrupt

 arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 112 +++++++++++++++++++++++++++++++-
 1 file changed, 109 insertions(+), 3 deletions(-)
Signature · 1 line
2.13.2
author
#1 lore raw

PATCH 1/5 ARM: dts: imx6: RDU2: Add Micrel PHY to FEC

The FEC has a Micrel PHY connected to it. This PHY is managed using the bit-banging MDIO bus. Add this to the device tree.

Signed-off-by Andrew Lunn <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +5 -5
index 5d94b5ee6aa0..d7328e9166e9 100644
@@ -59,6 +59,10 @@
 		pinctrl-0 = <&pinctrl_mdio1>;
 		gpios = <&gpio6 5 GPIO_ACTIVE_HIGH
 		         &gpio6 4 GPIO_ACTIVE_HIGH>;
+
+		phy: ethernet-phy at 0 {
+			reg = <0>;
+		};
 	};
 
 	reg_28p0v: regulator-28p0v {

@@ -615,15 +619,11 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet>;
 	phy-mode = "rmii";
+	phy-handle = <&phy>;
 	phy-reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
 	phy-reset-duration = <100>;
 	phy-supply = <&reg_3p3v>;
 	status = "okay";
-
-	fixed-link {
-		speed = <100>;
-		full-duplex;
-	};
 };
 
 &usbh1 {
Signature · 1 line
2.13.2
author
#2 lore raw

PATCH 2/5 ARM: dts: imx6: RDU2: Add DSA support for the Marvell 88E6352

In reply to Andrew Lunn

The RDU2 has a Marvell 88E6352 switch. Both the FEC and the i210 Ethernet interfaces are connected to the switch. Make the FEC the DSA "CPU" port, and the i210 as a regular port on the switch.

Signed-off-by Andrew Lunn <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 50 +++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +50 -0
index d7328e9166e9..add53277379d 100644
@@ -624,6 +624,56 @@
 	phy-reset-duration = <100>;
 	phy-supply = <&reg_3p3v>;
 	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+
+		switch at 0 {
+			compatible = "marvell,mv88e6085";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+			dsa,member = <0 0>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port at 0 {
+					reg = <0>;
+					label = "gigabit_proc";
+				};
+
+				port at 1 {
+					reg = <1>;
+					label = "netaux";
+				};
+
+				port at 2 {
+					reg = <2>;
+					label = "cpu";
+					ethernet = <&fec>;
+
+					fixed-link {
+						speed = <100>;
+						full-duplex;
+					};
+				};
+
+				port at 3 {
+					reg = <3>;
+					label = "netright";
+				};
+
+				port at 4 {
+					reg = <4>;
+					label = "netleft";
+				};
+			};
+		};
+	};
 };
 
 &usbh1 {
Signature · 1 line
2.13.2
author
#3 lore raw

PATCH 3/5 ARM: dts: imx6: RDU2: Add Switch EEPROM

In reply to Andrew Lunn

The Marvell switch has an EEPROM connected to it. List the size in DT, in order to enable access to it via ethtool.

Signed-off-by Andrew Lunn <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 1 +
 1 file changed, 1 insertion(+)
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +1 -0
index add53277379d..d67bf81524a2 100644
@@ -636,6 +636,7 @@
 			#size-cells = <0>;
 			reg = <0>;
 			dsa,member = <0 0>;
+			eeprom-length = <512>;
 
 			ports {
 				#address-cells = <1>;
Signature · 1 line
2.13.2
author
#4 lore raw

PATCH 4/5 ARM: dts: imx6: RDU2: Add Switch interrupts

In reply to Andrew Lunn

The Marvell switch has its interrupt pin connected to a GPIO line. Wire this up in the device tree. This then allows us to use interrupts from the embedded Ethernet PHYs in the switch. Also wire them up in device tree.

Signed-off-by Andrew Lunn <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 53 ++++++++++++++++++++++++++++++++-
 1 file changed, 52 insertions(+), 1 deletion(-)
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +52 -1
index d67bf81524a2..83f311a51cca 100644
@@ -630,13 +630,19 @@
 		#size-cells = <0>;
 		status = "okay";
 
-		switch at 0 {
+		switch: switch at 0 {
 			compatible = "marvell,mv88e6085";
+			pinctrl-0 = <&pinctrl_switch_irq>;
+			pinctrl-names = "default";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0>;
 			dsa,member = <0 0>;
 			eeprom-length = <512>;
+			interrupt-parent = <&gpio6>;
+			interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
 
 			ports {
 				#address-cells = <1>;

@@ -645,11 +651,13 @@
 				port at 0 {
 					reg = <0>;
 					label = "gigabit_proc";
+					phy-handle = <&switchphy0>;
 				};
 
 				port at 1 {
 					reg = <1>;
 					label = "netaux";
+					phy-handle = <&switchphy1>;
 				};
 
 				port at 2 {

@@ -666,11 +674,48 @@
 				port at 3 {
 					reg = <3>;
 					label = "netright";
+					phy-handle = <&switchphy3>;
 				};
 
 				port at 4 {
 					reg = <4>;
 					label = "netleft";
+					phy-handle = <&switchphy4>;
+				};
+			};
+
+			mdio {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				switchphy0: switchphy at 0 {
+					reg = <0>;
+					interrupt-parent = <&switch>;
+					interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				switchphy1: switchphy at 1 {
+					reg = <1>;
+					interrupt-parent = <&switch>;
+					interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				switchphy2: switchphy at 2 {
+					reg = <2>;
+					interrupt-parent = <&switch>;
+					interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				switchphy3: switchphy at 3 {
+					reg = <3>;
+					interrupt-parent = <&switch>;
+					interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				switchphy4: switchphy at 4 {
+					reg = <4>;
+					interrupt-parent = <&switch>;
+					interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
 				};
 			};
 		};

@@ -891,6 +936,12 @@
 		>;
 	};
 
+	pinctrl_switch_irq: switchgrp {
+		fsl,pins = <
+			MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03	0x4001b000
+		>;
+	};
+
 	pinctrl_tc358767: tc358767grp {
 		fsl,pins = <
 			MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x10
Signature · 1 line
2.13.2
author
#5 lore raw

PATCH 5/5 ARM: dts: imx6: RDU2: Add Micrel PHY interrupt

In reply to Andrew Lunn

The Micrel PHY has its interrupt pin connected to a GPIO line. Wire this up in the device tree.

Signed-off-by Andrew Lunn <[email protected]>
---
 arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +4 -0
index 83f311a51cca..eeb7679fd348 100644
@@ -61,7 +61,11 @@
 		         &gpio6 4 GPIO_ACTIVE_HIGH>;
 
 		phy: ethernet-phy at 0 {
+			pinctrl-0 = <&pinctrl_rmii_phy_irq>;
+			pinctrl-names = "default";
 			reg = <0>;
+			interrupt-parent = <&gpio3>;
+			interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
 		};
 	};
Signature · 1 line
2.13.2
#6 lore raw

cover ARM: dts: imx6: RDU2: Ethernet switch and PHYs

In reply to Andrew Lunn

I tested the full series successfully on the RDU2 platform.

Tested-by Chris Healy <[email protected]>
Quoted 17 lines · Andrew Lunn

This patchset extends the RDU2 to support its Ethernet switch, the PHYs within the switch, the switches EEPROM, and the Micrel PHY connected to the FEC.

Andrew Lunn (5):
ARM: dts: imx6: RDU2: Add Micrel PHY to FEC
ARM: dts: imx6: RDU2: Add DSA support for the Marvell 88E6352
ARM: dts: imx6: RDU2: Add Switch EEPROM
ARM: dts: imx6: RDU2: Add Switch interrupts
ARM: dts: imx6: RDU2: Add Micrel PHY interrupt

 arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 112 +++++++++++++++++++++++++++++++-
 1 file changed, 109 insertions(+), 3 deletions(-)

--
2.13.2

reviewer
#7 lore raw

cover ARM: dts: imx6: RDU2: Ethernet switch and PHYs

In reply to Andrew Lunn
Quoted 10 lines · Andrew Lunn

This patchset extends the RDU2 to support its Ethernet switch, the PHYs within the switch, the switches EEPROM, and the Micrel PHY connected to the FEC.

Andrew Lunn (5):
ARM: dts: imx6: RDU2: Add Micrel PHY to FEC
ARM: dts: imx6: RDU2: Add DSA support for the Marvell 88E6352
ARM: dts: imx6: RDU2: Add Switch EEPROM
ARM: dts: imx6: RDU2: Add Switch interrupts
ARM: dts: imx6: RDU2: Add Micrel PHY interrupt

Series looks good:

Reviewed-by Fabio Estevam <[email protected]>
Applied
#8 lore raw

cover ARM: dts: imx6: RDU2: Ethernet switch and PHYs

In reply to Andrew Lunn
Quoted 10 lines · Andrew Lunn

This patchset extends the RDU2 to support its Ethernet switch, the PHYs within the switch, the switches EEPROM, and the Micrel PHY connected to the FEC.

Andrew Lunn (5):
ARM: dts: imx6: RDU2: Add Micrel PHY to FEC
ARM: dts: imx6: RDU2: Add DSA support for the Marvell 88E6352
ARM: dts: imx6: RDU2: Add Switch EEPROM
ARM: dts: imx6: RDU2: Add Switch interrupts
ARM: dts: imx6: RDU2: Add Micrel PHY interrupt

Applied all, thanks.