Add ZTE ZX PWM device driver support
Subsystems (2)
cover Add ZTE ZX PWM device driver support
From: Shawn Guo <[email protected]>
The series adds the dt-bindings document and device driver for PWM controller found on ZTE ZX family SoCs.
Shawn Guo (2):
dt-bindings: pwm: add bindings doc for ZTE ZX PWM controller
pwm: add ZTE ZX PWM device driver
Documentation/devicetree/bindings/pwm/pwm-zx.txt | 22 ++ drivers/pwm/Kconfig | 9 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-zx.c | 244 +++++++++++++++++++++++ 4 files changed, 276 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-zx.txt create mode 100644 drivers/pwm/pwm-zx.c
Signature · 1 line
1.9.1
PATCH 1/2 dt-bindings: pwm: add bindings doc for ZTE ZX PWM controller
From: Shawn Guo <[email protected]>
It adds bindings document for ZTE ZX PWM controller. The device has two clocks: PCLK and WCLK. The PCLK is for register access, and WCLK is the reference clock for calculating period and duty cycles. Also, the device supports polarity configuration, so #pwm-cells should be 3.
--- Documentation/devicetree/bindings/pwm/pwm-zx.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-zx.txt
Documentation/devicetree/bindings/pwm/pwm-zx.txt new file +22 -0
@@ -0,0 +1,22 @@ +ZTE ZX PWM controller + +Required properties: + - compatible: Should be "zte,zx296718-pwm". + - reg: Physical base address and length of the controller's registers. + - clocks : The phandle and specifier referencing the controller's clocks. + - clock-names: "pclk" for PCLK, "wclk" for WCLK to the PWM controller. The + PCLK is for register access, while WCLK is the reference clock for + calculating period and duty cycles. + - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of + the cells format. + +Example: + + pwm: pwm at 1439000 { + compatible = "zte,zx296718-pwm"; + reg = <0x1439000 0x1000>; + clocks = <&lsp1crm LSP1_PWM_PCLK>, + <&lsp1crm LSP1_PWM_WCLK>; + clock-names = "pclk", "wclk"; + #pwm-cells = <3>; + };
Signature · 1 line
1.9.1
Rob Herring
maintainerPATCH 1/2 dt-bindings: pwm: add bindings doc for ZTE ZX PWM controller
Quoted 8 lines · Shawn Guo
From: Shawn Guo <[email protected]>
It adds bindings document for ZTE ZX PWM controller. The device has two clocks: PCLK and WCLK. The PCLK is for register access, and WCLK is the reference clock for calculating period and duty cycles. Also, the device supports polarity configuration, so #pwm-cells should be 3.
Quoted 5 lines
Signed-off-by Shawn Guo <[email protected]>--- Documentation/devicetree/bindings/pwm/pwm-zx.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-zx.txt
PATCH 2/2 pwm: add ZTE ZX PWM device driver
In reply to Shawn GuoFrom: Shawn Guo <[email protected]>
It adds PWM device driver for ZTE ZX family SoCs. The PWM controller supports 4 devices with polarity configuration.
The driver has been tested with pwm-regulator support to scale core voltage via cpufreq.
--- drivers/pwm/Kconfig | 9 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-zx.c | 244 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 254 insertions(+) create mode 100644 drivers/pwm/pwm-zx.c
drivers/pwm/Kconfig +9 -0
@@ -500,4 +500,13 @@ config PWM_VT8500 To compile this driver as a module, choose M here: the module will be called pwm-vt8500. +config PWM_ZX + tristate "ZTE ZX PWM support" + depends on ARCH_ZX + help + Generic PWM framework driver for ZTE ZX family SoCs. + + To compile this driver as a module, choose M here: the module + will be called pwm-zx. + endif
drivers/pwm/Makefile +1 -0
@@ -49,3 +49,4 @@ obj-$(CONFIG_PWM_TIPWMSS) += pwm-tipwmss.o obj-$(CONFIG_PWM_TWL) += pwm-twl.o obj-$(CONFIG_PWM_TWL_LED) += pwm-twl-led.o obj-$(CONFIG_PWM_VT8500) += pwm-vt8500.o +obj-$(CONFIG_PWM_ZX) += pwm-zx.o
drivers/pwm/pwm-zx.c new file +244 -0
244 lines not on this page · raw message
Signature · 1 line
1.9.1
PATCH 2/2 pwm: add ZTE ZX PWM device driver
Quoted 8 lines · Shawn Guo
From: Shawn Guo <[email protected]>
It adds PWM device driver for ZTE ZX family SoCs. The PWM controller supports 4 devices with polarity configuration.
The driver has been tested with pwm-regulator support to scale core voltage via cpufreq.
Quoted 7 lines
Signed-off-by Shawn Guo <[email protected]>--- drivers/pwm/Kconfig | 9 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-zx.c | 244 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 254 insertions(+) create mode 100644 drivers/pwm/pwm-zx.c
Hi Shawn,
This is close to perfect. Two minor things, see below.
Quoted 60 lines
drivers/pwm/Kconfig +9
-0@@ -500,4 +500,13 @@ config PWM_VT8500 To compile this driver as a module, choose M here: the module will be called pwm-vt8500. +config PWM_ZX + tristate "ZTE ZX PWM support" + depends on ARCH_ZX + help + Generic PWM framework driver for ZTE ZX family SoCs. + + To compile this driver as a module, choose M here: the module + will be called pwm-zx. + endifdrivers/pwm/Makefile +1
-0@@ -49,3 +49,4 @@ obj-$(CONFIG_PWM_TIPWMSS) += pwm-tipwmss.o obj-$(CONFIG_PWM_TWL) += pwm-twl.o obj-$(CONFIG_PWM_TWL_LED) += pwm-twl-led.o obj-$(CONFIG_PWM_VT8500) += pwm-vt8500.o +obj-$(CONFIG_PWM_ZX) += pwm-zx.odrivers/pwm/pwm-zx.c new file +27
-0@@ -0,0 +1,244 @@ +/* +* Copyright (C) 2017 Sanechips Technology Co., Ltd. +* Copyright 2017 Linaro Ltd. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License version 2 as +* published by the Free Software Foundation. +*/ + +#include <linux/clk.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/pwm.h> +#include <linux/slab.h> + +#define ZX_PWM_MODE 0x0 +#define ZX_PWM_CLKDIV_MASK GENMASK(11, 2) +#define ZX_PWM_CLKDIV (x) (((x) << 8) & ZX_PWM_CLKDIV_MASK) +#define ZX_PWM_POLAR BIT(1) +#define ZX_PWM_EN BIT(0) +#define ZX_PWM_PERIOD 0x4 +#define ZX_PWM_DUTY 0x8 + +#define ZX_PWM_CLKDIV_MAX 1023
drivers/pwm/pwm-zx.c line 37
Quoted 10 lines
drivers/pwm/pwm-zx.c new file +10
-0+#define ZX_PWM_PERIOD_MAX 65535 + +struct zx_pwm_chip { +struct pwm_chip chip; +struct clk *pclk; +struct clk *wclk; +void __iomem *base; +}; + +#define to_zx_pwm_chip (_chip) container_of(_chip, struct zx_pwm_chip, chip)
Please use a static inline function for this. That way diagnostic messages from the compiler make more sense.
[...]
drivers/pwm/pwm-zx.c line 165
Quoted 7 lines
drivers/pwm/pwm-zx.c new file +7
-0+static const struct pwm_ops zx_pwm_ops = { + .config = zx_pwm_config, + .enable = zx_pwm_enable, + .disable = zx_pwm_disable, + .set_polarity = zx_pwm_set_polarity, + .owner =THIS_MODULE , +};
Please convert this to implement the atomic PWM callbacks (->apply() and ->get_state()).
Thanks,
Thierry
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PATCH 2/2 pwm: add ZTE ZX PWM device driver
Quoted 17 lines · Thierry Reding
Quoted 8 lines · Shawn Guo
From: Shawn Guo <[email protected]>
It adds PWM device driver for ZTE ZX family SoCs. The PWM controller supports 4 devices with polarity configuration.
The driver has been tested with pwm-regulator support to scale core voltage via cpufreq.
Quoted 7 lines
Signed-off-by Shawn Guo <[email protected]>--- drivers/pwm/Kconfig | 9 ++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-zx.c | 244 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 254 insertions(+) create mode 100644 drivers/pwm/pwm-zx.c
Quoted 3 lines
Hi Shawn,
This is close to perfect. Two minor things, see below.
Hi Thierry,
Thanks for helping review the patch. I just send out v2 to address your comments.
Shawn