ARM: dra7: Add support for dra76-evm

index f6eb51ee3c..fd33408622 100644
@@ -174,4 +174,5 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
 		int wp_gpio);
 
 void vmmc_pbias_config(uint voltage);
+void board_mmc_poweron_ldo(uint voltage);
 #endif /* OMAP_MMC_H_ */

index afe59e0b58..cb2a5ab7ea 100644
@@ -455,10 +455,14 @@ void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
 }
 
 #if defined(CONFIG_PALMAS_POWER)
+__weak void board_mmc_poweron_ldo(uint voltage)
+{
+	palmas_mmc1_poweron_ldo(voltage);
+}
+
 void vmmc_pbias_config(uint voltage)
 {
 	u32 value = 0;
-	struct vcores_data const *vcores = *omap_vcores;
 
 	value = readl((*ctrl)->control_pbias);
 	value &= ~SDCARD_PWRDNZ;

@@ -467,15 +471,7 @@ void vmmc_pbias_config(uint voltage)
 	value &= ~SDCARD_BIAS_PWRDNZ;
 	writel(value, (*ctrl)->control_pbias);
 
-	if (vcores->core.pmic->i2c_slave_addr == 0x60) {
-		if (voltage == LDO_VOLT_3V0)
-			voltage = 0x19;
-		else if (voltage == LDO_VOLT_1V8)
-			voltage = 0xa;
-		lp873x_mmc1_poweron_ldo(voltage);
-	} else {
-		palmas_mmc1_poweron_ldo(voltage);
-	}
+	board_mmc_poweron_ldo(voltage);
 
 	value = readl((*ctrl)->control_pbias);
 	value |= SDCARD_BIAS_PWRDNZ;

index 93d3d0b54e..6767fd2179 100644
@@ -710,6 +710,19 @@ int board_mmc_init(bd_t *bis)
 	omap_mmc_init(1, 0, 0, -1, -1);
 	return 0;
 }
+
+void board_mmc_poweron_ldo(uint voltage)
+{
+	if (board_is_dra71x_evm()) {
+		if (voltage == LDO_VOLT_3V0)
+			voltage = 0x19;
+		else if (voltage == LDO_VOLT_1V8)
+			voltage = 0xa;
+		lp873x_mmc1_poweron_ldo(voltage);
+	} else {
+		palmas_mmc1_poweron_ldo(voltage);
+	}
+}
 #endif
 
 #ifdef CONFIG_USB_DWC3

index cb2a5ab7ea..85d3518e94 100644
@@ -457,7 +457,7 @@ void v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
 #if defined(CONFIG_PALMAS_POWER)
 __weak void board_mmc_poweron_ldo(uint voltage)
 {
-	palmas_mmc1_poweron_ldo(voltage);
+	palmas_mmc1_poweron_ldo(LDO1_VOLTAGE, LDO1_CTRL, voltage);
 }
 
 void vmmc_pbias_config(uint voltage)

index 6767fd2179..1c0a1eb052 100644
@@ -720,7 +720,7 @@ void board_mmc_poweron_ldo(uint voltage)
 			voltage = 0xa;
 		lp873x_mmc1_poweron_ldo(voltage);
 	} else {
-		palmas_mmc1_poweron_ldo(voltage);
+		palmas_mmc1_poweron_ldo(LDO1_VOLTAGE, LDO1_CTRL, voltage);
 	}
 }
 #endif

index 4e9895987c..ddf777c26b 100644
@@ -42,24 +42,21 @@ int lp873x_mmc1_poweron_ldo(uint voltage)
 }
 #endif
 
-int palmas_mmc1_poweron_ldo(uint voltage)
+int palmas_mmc1_poweron_ldo(uint ldo_volt, uint ldo_ctrl, uint voltage)
 {
 	u8 val = 0;
 
 #if defined(CONFIG_DRA7XX)
 	int ret;
-	/*
-	 * Currently valid for the dra7xx_evm board:
-	 * Set TPS659038 LDO1 to 3.0 V or 1.8V
-	 */
-	ret = palmas_i2c_write_u8(TPS65903X_CHIP_P1, LDO1_VOLTAGE, voltage);
+
+	ret = palmas_i2c_write_u8(TPS65903X_CHIP_P1, ldo_volt, voltage);
 	if (ret) {
 		printf("tps65903x: could not set LDO1 voltage.\n");
 		return ret;
 	}
 	/* TURN ON LDO1 */
 	val = RSC_MODE_SLEEP | RSC_MODE_ACTIVE;
-	ret = palmas_i2c_write_u8(TPS65903X_CHIP_P1, LDO1_CTRL, val);
+	ret = palmas_i2c_write_u8(TPS65903X_CHIP_P1, ldo_ctrl, val);
 	if (ret) {
 		printf("tps65903x: could not turn on LDO1.\n");
 		return ret;

index d676617344..404c2b3ca7 100644
@@ -129,7 +129,7 @@ static inline int palmas_i2c_read_u8(u8 chip_no, u8 reg, u8 *val)
 }
 
 void palmas_init_settings(void);
-int palmas_mmc1_poweron_ldo(uint voltage);
+int palmas_mmc1_poweron_ldo(uint ldo_volt, uint ldo_ctrl, uint voltage);
 int lp873x_mmc1_poweron_ldo(uint voltage);
 int twl603x_mmc1_set_ldo9(u8 vsel);
 int twl603x_audio_power(u8 on);

index b047f0d650..87a3d23ecb 100644
@@ -58,6 +58,7 @@
 #define OMAP5430_CONTROL_ID_CODE_ES2_0          0x1B94202F
 #define OMAP5432_CONTROL_ID_CODE_ES1_0		0x0B99802F
 #define OMAP5432_CONTROL_ID_CODE_ES2_0          0x1B99802F
+#define DRA762_CONTROL_ID_CODE_ES1_0		0x0BB5002F
 #define DRA752_CONTROL_ID_CODE_ES1_0		0x0B99002F
 #define DRA752_CONTROL_ID_CODE_ES1_1		0x1B99002F
 #define DRA752_CONTROL_ID_CODE_ES2_0		0x2B99002F

index ef5c481349..e951b232d6 100644
@@ -722,6 +722,7 @@ static inline u8 is_omap54xx(void)
 
 #define DRA7XX		0x07000000
 #define DRA72X		0x07200000
+#define DRA76X		0x07600000
 
 static inline u8 is_dra7xx(void)
 {

@@ -734,6 +735,12 @@ static inline u8 is_dra72x(void)
 	extern u32 *const omap_si_rev;
 	return (*omap_si_rev & 0xFFF00000) == DRA72X;
 }
+
+static inline u8 is_dra76x(void)
+{
+	extern u32 *const omap_si_rev;
+	return (*omap_si_rev & 0xFFF00000) == DRA76X;
+}
 #endif
 
 /*

@@ -761,6 +768,7 @@ static inline u8 is_dra72x(void)
 #define OMAP5432_ES2_0  0x54320200
 
 /* DRA7XX */
+#define DRA762_ES1_0	0x07620100
 #define DRA752_ES1_0	0x07520100
 #define DRA752_ES1_1	0x07520110
 #define DRA752_ES2_0	0x07520200

index 4ad6b530d2..19a8d10cef 100644
@@ -113,6 +113,16 @@ static const struct dpll_params per_dpll_params_768mhz_dra7xx[NUM_SYS_CLKS] = {
 	{10, 0, 4, 1, 3, 4, 4, 2, -1, -1, -1, -1},		/* 38.4 MHz */
 };
 
+static const struct dpll_params per_dpll_params_768mhz_dra76x[NUM_SYS_CLKS] = {
+	{32, 0, 4, 1, 3, 4, 8, 2, -1, -1, -1, -1},		/* 12 MHz   */
+	{96, 4, 4, 1, 3, 4, 8, 2, -1, -1, -1, -1},		/* 20 MHz   */
+	{160, 6, 4, 1, 3, 4, 8, 2, -1, -1, -1, -1},		/* 16.8 MHz */
+	{20, 0, 4, 1, 3, 4, 8, 2, -1, -1, -1, -1},		/* 19.2 MHz */
+	{192, 12, 4, 1, 3, 4, 8, 2, -1, -1, -1, -1},		/* 26 MHz   */
+	{-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},	/* 27 MHz   */
+	{10, 0, 4, 1, 3, 4, 8, 2, -1, -1, -1, -1},		/* 38.4 MHz */
+};
+
 static const struct dpll_params iva_dpll_params_2330mhz[NUM_SYS_CLKS] = {
 	{1165, 11, -1, -1, 5, 6, -1, -1, -1, -1, -1, -1},	/* 12 MHz   */
 	{-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1},	/* 13 MHz   */

@@ -234,6 +244,17 @@ struct dplls omap5_dplls_es2 = {
 	.ddr = NULL
 };
 
+struct dplls dra76x_dplls = {
+	.mpu = mpu_dpll_params_1ghz,
+	.core = core_dpll_params_2128mhz_dra7xx,
+	.per = per_dpll_params_768mhz_dra76x,
+	.abe = abe_dpll_params_sysclk2_361267khz,
+	.iva = iva_dpll_params_2330mhz_dra7xx,
+	.usb = usb_dpll_params_1920mhz,
+	.ddr =	ddr_dpll_params_2664mhz,
+	.gmac = gmac_dpll_params_2000mhz,
+};
+
 struct dplls dra7xx_dplls = {
 	.mpu = mpu_dpll_params_1ghz,
 	.core = core_dpll_params_2128mhz_dra7xx,

@@ -709,6 +730,12 @@ void __weak hw_data_init(void)
 	*ctrl = &omap5_ctrl;
 	break;
 
+	case DRA762_ES1_0:
+	*prcm = &dra7xx_prcm;
+	*dplls_data = &dra76x_dplls;
+	*ctrl = &dra7xx_ctrl;
+	break;
+
 	case DRA752_ES1_0:
 	case DRA752_ES1_1:
 	case DRA752_ES2_0:

index 85d3518e94..c520a633c4 100644
@@ -362,6 +362,9 @@ void init_omap_revision(void)
 	case OMAP5432_CONTROL_ID_CODE_ES2_0:
 		*omap_si_rev = OMAP5432_ES2_0;
 		break;
+	case DRA762_CONTROL_ID_CODE_ES1_0:
+		*omap_si_rev = DRA762_ES1_0;
+		break;
 	case DRA752_CONTROL_ID_CODE_ES1_0:
 		*omap_si_rev = DRA752_ES1_0;
 		break;

index 1c0a1eb052..ee6d5251d5 100644
@@ -34,6 +34,7 @@
 #include "mux_data.h"
 #include "../common/board_detect.h"
 
+#define board_is_dra76x_evm()		board_ti_is("DRA76/7x")
 #define board_is_dra74x_evm()		board_ti_is("5777xCPU")
 #define board_is_dra72x_evm()		board_ti_is("DRA72x-T")
 #define board_is_dra71x_evm()		board_ti_is("DRA79x,D")

@@ -547,6 +548,8 @@ int board_late_init(void)
 			name = "dra71x";
 		else
 			name = "dra72x";
+	} else if (is_dra76x()) {
+		name = "dra76x";
 	} else {
 		name = "dra7xx";
 	}

@@ -595,6 +598,8 @@ void do_board_detect(void)
 		bname = "DRA72x EVM";
 	} else if (board_is_dra71x_evm()) {
 		bname = "DRA71x EVM";
+	} else if (board_is_dra76x_evm()) {
+		bname = "DRA76x EVM";
 	} else {
 		/* If EEPROM is not populated */
 		if (is_dra72x())

index dbe340d23e..ee2e78b99b 100644
@@ -340,6 +340,9 @@
 /* Offset is 0.73V for LP873x */
 #define LP873X_BUCK_BASE_VOLT_UV		730000
 
+/* Offset is 0.73V for LP87565 */
+#define LP87565_BUCK_BASE_VOLT_UV		730000
+
 /* TPS659038 */
 #define TPS659038_I2C_SLAVE_ADDR		0x58
 #define TPS659038_REG_ADDR_SMPS12		0x23

@@ -353,6 +356,7 @@
 #define TPS65917_REG_ADDR_SMPS1		0x23
 #define TPS65917_REG_ADDR_SMPS2		0x27
 #define TPS65917_REG_ADDR_SMPS3		0x2F
+#define TPS65917_REG_ADDR_SMPS4		0x33
 
 /* LP873X */
 #define LP873X_I2C_SLAVE_ADDR		0x60

@@ -360,6 +364,11 @@
 #define LP873X_REG_ADDR_BUCK1		0x7
 #define LP873X_REG_ADDR_LDO1		0xA
 
+/* LP87565 */
+#define LP87565_I2C_SLAVE_ADDR		0x61
+#define LP87565_REG_ADDR_BUCK01		0xA
+#define LP87565_REG_ADDR_BUCK23		0xE
+
 /* TPS */
 #define TPS62361_I2C_SLAVE_ADDR		0x60
 #define TPS62361_REG_ADDR_SET0		0x0

index e951b232d6..b34ad41325 100644
@@ -607,6 +607,7 @@ extern struct omap_sys_ctrl_regs const dra7xx_ctrl;
 
 extern struct pmic_data tps659038;
 extern struct pmic_data lp8733;
+extern struct pmic_data lp87565;
 
 void hw_data_init(void);
 

index 19a8d10cef..7aaf379357 100644
@@ -306,6 +306,22 @@ struct pmic_data tps659038 = {
 	.gpio_en = 0,
 };
 
+/* The LP87565*/
+struct pmic_data lp87565 = {
+	.base_offset = LP873X_BUCK_BASE_VOLT_UV,
+	.step = 5000, /* 5 mV represented in uV */
+	/*
+	 * Offset codes 0 - 0x13 Invalid.
+	 * Offset codes 0x14 0x17 give 10mV steps
+	 * Offset codes 0x17 through 0x9D give 5mV steps
+	 * So let us start with our operating range from .73V
+	 */
+	.start_code = 0x17,
+	.i2c_slave_addr = 0x60,
+	.pmic_bus_init  = gpi2c_init,
+	.pmic_write     = palmas_i2c_write_u8,
+};
+
 /* The LP8732 and LP8733 are software-compatible, use common struct */
 struct pmic_data lp8733 = {
 	.base_offset = LP873X_BUCK_BASE_VOLT_UV,

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index 7aaf379357..147eafa71e 100644
@@ -790,6 +790,7 @@ void get_ioregs(const struct ctrl_ioregs **regs)
 	case DRA752_ES1_0:
 	case DRA752_ES1_1:
 	case DRA752_ES2_0:
+	case DRA762_ES1_0:
 		*regs = &ioregs_dra7xx_es1;
 		break;
 	case DRA722_ES1_0:

index 7712923d85..67ff63b9f6 100644
@@ -480,6 +480,7 @@ void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
 		*regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz;
 		*size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz);
 		break;
+	case DRA762_ES1_0:
 	case DRA722_ES2_0:
 		*regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2;
 		*size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2);

@@ -709,6 +710,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations)
 		*iterations = sizeof(omap5_bug_00339_regs)/
 			     sizeof(omap5_bug_00339_regs[0]);
 		break;
+	case DRA762_ES1_0:
 	case DRA752_ES1_0:
 	case DRA752_ES1_1:
 	case DRA752_ES2_0:

85 lines not on this page · raw message

index 53226f3167..ad63abd759 100644
@@ -783,6 +783,12 @@ void recalibrate_iodelay(void)
 		iodelay = dra742_es1_1_iodelay_cfg_array;
 		niodelays = ARRAY_SIZE(dra742_es1_1_iodelay_cfg_array);
 		break;
+	case DRA762_ES1_0:
+		pads = dra76x_core_padconf_array;
+		npads = ARRAY_SIZE(dra76x_core_padconf_array);
+		iodelay = dra76x_es1_0_iodelay_cfg_array;
+		niodelays = ARRAY_SIZE(dra76x_es1_0_iodelay_cfg_array);
+		break;
 	default:
 	case DRA752_ES2_0:
 		pads = dra74x_core_padconf_array;

306 lines not on this page · raw message

index ad63abd759..87b7403070 100644
@@ -837,6 +837,8 @@ void board_mmc_poweron_ldo(uint voltage)
 		else if (voltage == LDO_VOLT_1V8)
 			voltage = 0xa;
 		lp873x_mmc1_poweron_ldo(voltage);
+	} else if (board_is_dra76x_evm()) {
+		palmas_mmc1_poweron_ldo(LDO4_VOLTAGE, LDO4_CTRL, voltage);
 	} else {
 		palmas_mmc1_poweron_ldo(LDO1_VOLTAGE, LDO1_CTRL, voltage);
 	}

index 404c2b3ca7..d366c98d22 100644
@@ -38,6 +38,10 @@
 #define LDO2_CTRL		0x52
 #define LDO2_VOLTAGE		0x53
 
+/* LDO2 control/voltage */
+#define LDO4_CTRL		0x5e
+#define LDO4_VOLTAGE		0x5f
+
 /* LDO9 control/voltage */
 #define LDO9_CTRL		0x60
 #define LDO9_VOLTAGE		0x61

index 1c3ae40a99..01f7f7a300 100644
@@ -44,6 +44,8 @@
 			"setenv fdtfile dra72-evm.dtb; fi;" \
 		"if test $board_name = dra71x; then " \
 			"setenv fdtfile dra71-evm.dtb; fi;" \
+		"if test $board_name = dra76x; then " \
+			"setenv fdtfile dra76-evm.dtb; fi;" \
 		"if test $board_name = beagle_x15; then " \
 			"setenv fdtfile am57xx-beagle-x15.dtb; fi;" \
 		"if test $board_name = beagle_x15_revb1; then " \

index 5c75e80915..18ec5df5a5 100644

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index 87b7403070..bd871fa749 100644
@@ -1115,7 +1115,9 @@ int board_fit_config_name_match(const char *name)
 		} else if (!strcmp(name, "dra72-evm")) {
 			return 0;
 		}
-	} else if (!is_dra72x() && !strcmp(name, "dra7-evm")) {
+	} else if (is_dra76x() && !strcmp(name, "dra76-evm")) {
+		return 0;
+	} else if (!is_dra72x() && !is_dra76x() && !strcmp(name, "dra7-evm")) {
 		return 0;
 	}