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clk: imx51: propagate rate across ipu_di*_sel

PATCH New Lucas Stach 5 participants 8 messages Aug 18, 2017 – Aug 31, 2017

Subsystems (3)
Arm i.MX and Layerscape Common clk NXP i.MX clock drivers
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Lucas Stach

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#0 lore raw

PATCH 1/1 clk: imx51: propagate rate across ipu_di*_sel

This propagates rate requests from the display interface to the divider or PLL output, allowing to hit the required display rate in many more cases.

Signed-off-by Lucas Stach <[email protected]>
---
 drivers/clk/imx/clk-imx51-imx53.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
drivers/clk/imx/clk-imx51-imx53.c +4 -4
index 1e3c9ea5f9dc..7bcaf270db11 100644
@@ -416,10 +416,10 @@ static void __init mx51_clocks_init(struct device_node *np)
 
 	clk[IMX5_CLK_LP_APM]		= imx_clk_mux("lp_apm", MXC_CCM_CCSR, 9, 1,
 						lp_apm_sel, ARRAY_SIZE(lp_apm_sel));
-	clk[IMX5_CLK_IPU_DI0_SEL]	= imx_clk_mux("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,
-						mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel));
-	clk[IMX5_CLK_IPU_DI1_SEL]	= imx_clk_mux("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,
-						mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel));
+	clk[IMX5_CLK_IPU_DI0_SEL]	= imx_clk_mux_flags("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,
+						mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel), CLK_SET_RATE_PARENT);
+	clk[IMX5_CLK_IPU_DI1_SEL]	= imx_clk_mux_flags("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,
+						mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel), CLK_SET_RATE_PARENT);
 	clk[IMX5_CLK_TVE_EXT_SEL]	= imx_clk_mux_flags("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1,
 						mx51_tve_ext_sel, ARRAY_SIZE(mx51_tve_ext_sel), CLK_SET_RATE_PARENT);
 	clk[IMX5_CLK_TVE_SEL]		= imx_clk_mux("tve_sel", MXC_CCM_CSCMR1, 7, 1,
Signature · 1 line
2.11.0
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#1 lore raw

PATCH 1/1 clk: imx51: propagate rate across ipu_di*_sel

Quoted 5 lines · Lucas Stach

This propagates rate requests from the display interface to the divider or PLL output, allowing to hit the required display rate in many more cases.

Signed-off-by Lucas Stach <[email protected]>

Looks good:

Reviewed-by Fabio Estevam <[email protected]>
Quoted 13 lines
---
 drivers/clk/imx/clk-imx51-imx53.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)
drivers/clk/imx/clk-imx51-imx53.c +0 -1
index 1e3c9ea5f9dc..7bcaf270db11 100644
@@ -416,10 +416,10 @@ static void __init mx51_clocks_init(struct device_node *np)
 
        clk[IMX5_CLK_LP_APM]            = imx_clk_mux("lp_apm", MXC_CCM_CCSR, 9, 1,
                                                lp_apm_sel, ARRAY_SIZE(lp_apm_sel));
-       clk[IMX5_CLK_IPU_DI0_SEL]       = imx_clk_mux("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,

drivers/clk/imx/clk-imx51-imx53.c static void __init mx51_clocks_init(struct device_node *np) · line 425

Quoted 10 lines
drivers/clk/imx/clk-imx51-imx53.c +4 -3
-                                               mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel));
-       clk[IMX5_CLK_IPU_DI1_SEL]       = imx_clk_mux("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,
-                                               mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel));
+       clk[IMX5_CLK_IPU_DI0_SEL]       = imx_clk_mux_flags("ipu_di0_sel", MXC_CCM_CSCMR2, 26, 3,
+                                               mx51_ipu_di0_sel, ARRAY_SIZE(mx51_ipu_di0_sel), CLK_SET_RATE_PARENT);
+       clk[IMX5_CLK_IPU_DI1_SEL]       = imx_clk_mux_flags("ipu_di1_sel", MXC_CCM_CSCMR2, 29, 3,
+                                               mx51_ipu_di1_sel, ARRAY_SIZE(mx51_ipu_di1_sel), CLK_SET_RATE_PARENT);
        clk[IMX5_CLK_TVE_EXT_SEL]       = imx_clk_mux_flags("tve_ext_sel", MXC_CCM_CSCMR1, 6, 1,
                                                mx51_tve_ext_sel, ARRAY_SIZE(mx51_tve_ext_sel), CLK_SET_RATE_PARENT);
        clk[IMX5_CLK_TVE_SEL]           = imx_clk_mux("tve_sel", MXC_CCM_CSCMR1, 7, 1,

Wladimir,

Could you please test it and see if it fixes the DVI output issue you reported earlier?
https://lists.freedesktop.org/archives/dri-devel/2017-April/138155.html

Thanks

#2 lore raw

PATCH 1/1 clk: imx51: propagate rate across ipu_di*_sel

Hello Fabio,

Quoted 6 lines · Fabio Estevam

On Fri, Aug 18, 2017 at 1:30 PM, Lucas Stach <[email protected]> wrote:
Wladimir,

Could you please test it and see if it fixes the DVI output issue you reported earlier?
https://lists.freedesktop.org/archives/dri-devel/2017-April/138155.html

I'm trying to, but getting a non-clock-related problem on the i.mx51 babbage board with current kernel preventing the display from coming up at all:

    [    0.824712] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
    [    0.831411] [drm] No driver support for vblank timestamp query.
    [    0.837632] imx-drm display-subsystem: bound imx-ipuv3-crtc.0 (ops ipu_crtc_ops)
    [    0.845214] imx-drm display-subsystem: bound imx-ipuv3-crtc.1 (ops ipu_crtc_ops)
    [    0.852720] imx-drm display-subsystem: failed to bind display at di0 (ops imx_pd_ops): -19
    [    0.860994] imx-drm display-subsystem: master bind failed: -19

Will try to debug this later.

Regards,
Wladimir

#3 lore raw

PATCH 1/1 clk: imx51: propagate rate across ipu_di*_sel

Quoted 9 lines

I'm trying to, but getting a non-clock-related problem on the i.mx51 babbage board with current kernel preventing the display from coming up at all:

    [    0.824712] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
    [    0.831411] [drm] No driver support for vblank timestamp query.
    [    0.837632] imx-drm display-subsystem: bound imx-ipuv3-crtc.0 (ops ipu_crtc_ops)
    [    0.845214] imx-drm display-subsystem: bound imx-ipuv3-crtc.1 (ops ipu_crtc_ops)
    [    0.852720] imx-drm display-subsystem: failed to bind display at di0 (ops imx_pd_ops): -19
    [    0.860994] imx-drm display-subsystem: master bind failed: -19

I believe this should be fixed by

commit 799ee2970485dc206c3bf347d6e6827c04d5e4f9

Author: Philipp Zabel <[email protected]>
Date:   Mon Jun 12 17:54:29 2017 +0200

drm/imx: parallel-display: Accept drm_of_find_panel_or_bridge failure

Nikita

#4 lore raw

PATCH 1/1 clk: imx51: propagate rate across ipu_di*_sel

Hello Nikita, Fabio,

Quoted 10 lines · Nikita Yushchenko
Quoted 9 lines

I'm trying to, but getting a non-clock-related problem on the i.mx51 babbage board with current kernel preventing the display from coming up at all:

    [    0.824712] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
    [    0.831411] [drm] No driver support for vblank timestamp query.
    [    0.837632] imx-drm display-subsystem: bound imx-ipuv3-crtc.0 (ops ipu_crtc_ops)
    [    0.845214] imx-drm display-subsystem: bound imx-ipuv3-crtc.1 (ops ipu_crtc_ops)
    [    0.852720] imx-drm display-subsystem: failed to bind display at di0 (ops imx_pd_ops): -19
    [    0.860994] imx-drm display-subsystem: master bind failed: -19
Quoted 7 lines

I believe this should be fixed by

commit 799ee2970485dc206c3bf347d6e6827c04d5e4f9

Author: Philipp Zabel <[email protected]>
Date:   Mon Jun 12 17:54:29 2017 +0200

drm/imx: parallel-display: Accept drm_of_find_panel_or_bridge failure

Thanks,
With that patch and Lucas' patch series applied, I can confirm to have working a console on DVI!

Regards,
Wladimir

reviewer
#5 lore raw

PATCH 1/1 clk: imx51: propagate rate across ipu_di*_sel

Hi Wladimir,

Quoted 2 lines · Wladimir J. van der Laan

Thanks,
With that patch and Lucas' patch series applied, I can confirm to have working a console on DVI!

Excellent! Maybe you could reply with your Tested-by tag then?

#6 lore raw

PATCH 1/1 clk: imx51: propagate rate across ipu_di*_sel

Quoted 9 lines · Fabio Estevam

Hi Wladimir,

Quoted 2 lines · Wladimir J. van der Laan

Thanks,
With that patch and Lucas' patch series applied, I can confirm to have working a console on DVI!

Excellent! Maybe you could reply with your Tested-by tag then?

Sure!

Tested-by Wladimir J. van der Laan <[email protected]>

Regards,
Wladimir

Applied
#7 lore raw

PATCH 1/1 clk: imx51: propagate rate across ipu_di*_sel

In reply to Lucas Stach
Quoted 6 lines · Lucas Stach

This propagates rate requests from the display interface to the divider or PLL output, allowing to hit the required display rate in many more cases.

Signed-off-by Lucas Stach <[email protected]>

---

Applied to clk-next

Signature · 2 lines
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