Skip to contentSkip to conversation

Add USB2.0 Host support

PATCH New Biju Das 2 participants 7 messages Aug 30, 2017 – Sep 1, 2017 Device tree bindings

lore
Share & tools
lore

Biju Das

author
#0 lore raw

cover Add USB2.0 Host support

Hello,

This series aims to add USB2.0 Host support on iWave RZ/G1M(r8a7743) based board.

This series has been tested against renesas-dev tag 20170830-v4.13-rc7

This patch has documentation dependency on below patches
* PCI: rcar: Add r8a7743/5 support
https://patchwork.kernel.org/patch/9919697/
* phy: rcar-gen2: Add r8a7743/5 support
https://patchwork.kernel.org/patch/9919727/

Biju Das (5):
ARM: dts: r8a7743: Add internal PCI bridge nodes
ARM: dts: r8a7743: Add USB PHY DT support
ARM: dts: r8a7743: Link PCI USB devices to USB PHY
ARM: dts: iwg20d-q7: Enable internal PCI
ARM: dts: iwg20d-q7: Enable USB PHY

 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 26 ++++++++++
 arch/arm/boot/dts/r8a7743.dtsi          | 92 +++++++++++++++++++++++++++++++++
 2 files changed, 118 insertions(+)
Signature · 1 line
1.9.1
author
#1 lore raw

PATCH 1/5 ARM: dts: r8a7743: Add internal PCI bridge nodes

Add device nodes for the r8a7743 internal PCI bridge devices.

Signed-off-by Biju Das <[email protected]>
---
 arch/arm/boot/dts/r8a7743.dtsi | 46 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +46 -0
index 6dd9b0b..3f1faad 100644
@@ -821,6 +821,52 @@
 			resets = <&cpg 311>;
 			status = "disabled";
 		};
+
+		pci0: pci at ee090000 {
+			compatible = "renesas,pci-r8a7743",
+				     "renesas,pci-rcar-gen2";
+			device_type = "pci";
+			reg = <0 0xee090000 0 0xc00>,
+			      <0 0xee080000 0 0x1100>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+			resets = <&cpg 703>;
+			status = "disabled";
+
+			bus-range = <0 0>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
+			interrupt-map-mask = <0xff00 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+					 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
+					 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		pci1: pci at ee0d0000 {
+			compatible = "renesas,pci-r8a7743",
+				     "renesas,pci-rcar-gen2";
+			device_type = "pci";
+			reg = <0 0xee0d0000 0 0xc00>,
+			      <0 0xee0c0000 0 0x1100>;
+			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+			resets = <&cpg 703>;
+			status = "disabled";
+
+			bus-range = <1 1>;
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
+			interrupt-map-mask = <0xff00 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+					 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
+					 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};
 
 	/* External root clock */
Signature · 1 line
1.9.1
author
#2 lore raw

PATCH 2/5 ARM: dts: r8a7743: Add USB PHY DT support

In reply to Biju Das

Define the r8a7743 generic part of the USB PHY device node.

Signed-off-by Biju Das <[email protected]>
---
 arch/arm/boot/dts/r8a7743.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +22 -0
index 3f1faad..a81d70e 100644
@@ -822,6 +822,28 @@
 			status = "disabled";
 		};
 
+		usbphy: usb-phy at e6590100 {
+			compatible = "renesas,usb-phy-r8a7743",
+				     "renesas,rcar-gen2-usb-phy";
+			reg = <0 0xe6590100 0 0x100>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			clocks = <&cpg CPG_MOD 704>;
+			clock-names = "usbhs";
+			power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+			resets = <&cpg 704>;
+			status = "disabled";
+
+			usb0: usb-channel at 0 {
+				reg = <0>;
+				#phy-cells = <1>;
+			};
+			usb2: usb-channel at 2 {
+				reg = <2>;
+				#phy-cells = <1>;
+			};
+		};
+
 		pci0: pci at ee090000 {
 			compatible = "renesas,pci-r8a7743",
 				     "renesas,pci-rcar-gen2";
Signature · 1 line
1.9.1
author
#3 lore raw

PATCH 3/5 ARM: dts: r8a7743: Link PCI USB devices to USB PHY

In reply to Biju Das

Describe the PCI USB devices that are behind the PCI bridges, adding necessary links to the USB PHY device.

Signed-off-by Biju Das <[email protected]>
---
 arch/arm/boot/dts/r8a7743.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
arch/arm/boot/dts/r8a7743.dtsi +24 -0
index a81d70e..665a515 100644
@@ -865,6 +865,18 @@
 			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 					 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 					 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+
+			usb at 1,0 {
+				reg = <0x800 0 0 0 0>;
+				phys = <&usb0 0>;
+				phy-names = "usb";
+			};
+
+			usb at 2,0 {
+				reg = <0x1000 0 0 0 0>;
+				phys = <&usb0 0>;
+				phy-names = "usb";
+			};
 		};
 
 		pci1: pci at ee0d0000 {

@@ -888,6 +900,18 @@
 			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 					 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 					 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+
+			usb at 1,0 {
+				reg = <0x10800 0 0 0 0>;
+				phys = <&usb2 0>;
+				phy-names = "usb";
+			};
+
+			usb at 2,0 {
+				reg = <0x11000 0 0 0 0>;
+				phys = <&usb2 0>;
+				phy-names = "usb";
+			};
 		};
 	};
Signature · 1 line
1.9.1
author
#4 lore raw

PATCH 4/5 ARM: dts: iwg20d-q7: Enable internal PCI

In reply to Biju Das

Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to them.

Signed-off-by Biju Das <[email protected]>
---
 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts +22 -0
index 2b58b53..63166f9 100644
@@ -76,6 +76,16 @@
 		function = "sdhi1";
 		power-source = <1800>;
 	};
+
+	usb0_pins: usb0 {
+		groups = "usb0";
+		function = "usb0";
+	};
+
+	usb1_pins: usb1 {
+		groups = "usb1";
+		function = "usb1";
+	};
 };
 
 &scif0 {

@@ -125,3 +135,15 @@
 		reg = <0x68>;
 	};
 };
+
+&pci0 {
+	status = "okay";
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+};
+
+&pci1 {
+	status = "okay";
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
+};
Signature · 1 line
1.9.1
author
#5 lore raw

PATCH 5/5 ARM: dts: iwg20d-q7: Enable USB PHY

In reply to Biju Das
Signed-off-by Biju Das <[email protected]>
---
 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 4 ++++
 1 file changed, 4 insertions(+)
arch/arm/boot/dts/r8a7743-iwg20d-q7.dts +4 -0
index 63166f9..0136864 100644
@@ -147,3 +147,7 @@
 	pinctrl-0 = <&usb1_pins>;
 	pinctrl-names = "default";
 };
+
+&usbphy {
+	status = "okay";
+};
Signature · 1 line
1.9.1
#6 lore raw

cover Add USB2.0 Host support

In reply to Biju Das
Quoted 5 lines · Biju Das

Hello,

This series aims to add USB2.0 Host support on iWave RZ/G1M(r8a7743) based board.

Quoted 7 lines

This series has been tested against renesas-dev tag 20170830-v4.13-rc7

This patch has documentation dependency on below patches
* PCI: rcar: Add r8a7743/5 support
https://patchwork.kernel.org/patch/9919697/
* phy: rcar-gen2: Add r8a7743/5 support
https://patchwork.kernel.org/patch/9919727/

Thanks for the testing and dependency information.

I see that the PCI dependency has been accepted by Bjorn Helgaas. And the phy dependency is both trivial and has been acked by Rob Herring so it seems very likely to be accepted.

On the strength of the above I have accepted this series for v4.15.

Quoted 15 lines

Biju Das (5):
ARM: dts: r8a7743: Add internal PCI bridge nodes
ARM: dts: r8a7743: Add USB PHY DT support
ARM: dts: r8a7743: Link PCI USB devices to USB PHY
ARM: dts: iwg20d-q7: Enable internal PCI
ARM: dts: iwg20d-q7: Enable USB PHY

 arch/arm/boot/dts/r8a7743-iwg20d-q7.dts | 26 ++++++++++
 arch/arm/boot/dts/r8a7743.dtsi          | 92 +++++++++++++++++++++++++++++++++
 2 files changed, 118 insertions(+)
Signature · 1 line
1.9.1