Skip to contentSkip to conversation

arch: not all have support in the internal backend

PATCH New Yann E. MORIN 4 participants 51 messages Sep 3, 2017 – Nov 26, 2017

lore
Share & tools
lore
#0 lore raw

v2 cover arch: not all have support in the internal backend

Hello All!

Not all architectures we support have support in upstream gcc, glibc, binutils, and/or linux. In some cases, only a few specific cores do not have that support.

Furthermore, some architecture, specific cores, or core behaviour/setup (like the MIPS NaN support) got support in a specific gcc version.

Currently, we have to account for this in at least three locations:
- the toolchain backend choice (internal or externsal)
- the gcc version choice
- each external toolchain

This series is a first step, to introduce the possibility for each architecture, or specific core thereof, to specify that it lacks support in our internal backend.

The case for the gcc version will be handled in a follow-up series, while the MIPS NaN fixes will ber in their own further follow-up. They can be seen there:
https://git.buildroot.org/~ymorin/git/buildroot/log/?h=yem/arch-min-gcc-version
https://git.buildroot.org/~ymorin/git/buildroot/log/?h=yem/arch-mips-cleanups

Changes v1 -> v2:
- fix improper variable due to incorrect rebase (Thomas)
- use better variable name (Thomas)
- introduce an intermediate kconfig symbol for positive logic (Thomas)
- eventually drop the unsuported bfin cores (Thomas)

Regards,
Yann E. MORIN.

The following changes since commit f1212fd9cc627851d3679a83cee88cd9f3e58f8c

libcgi: add patch to not require C++ support (2017-09-02 23:54:54 +0200)

are available in the git repository at:

git://git.buildroot.org/~ymorin/git/buildroot.git

for you to fetch changes up to 0335a8a1164bfeb7c006c7d248d8f1923069c98f

arc/bfin: remove 60x cores (2017-09-03 11:09:53 +0200)

----------------------------------------------------------------
Yann E. MORIN (5):
arch: add option to disable internal toolchain backend arch/csky: internal backend not suitable arch/mips: internal backend not suitable for some cores arch/bfin: internal backend not suitable for some cores arc/bfin: remove 60x cores

 arch/Config.in      | 11 +++++++++++
 arch/Config.in.bfin |  8 --------
 arch/Config.in.mips |  2 ++
 toolchain/Config.in |  8 +-------
 4 files changed, 14 insertions(+), 15 deletions(-)
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#1 lore raw

PATCH v2 1/5 arch: add option to disable internal toolchain backend

Some architectures or specific cores do not have support in upstream gcc. Currently, they are individually listed as exclusions in the toolchain choice.

This poses a maintainance burden, as the knowledge about what gcc version supports what architecture is split across many places: the toolchain choice, the gcc version choice, the external toolchains.

As a first step, add a blind option that architectures or individual cores may select to indicate they lack support in our internal backend.

Actual use of the option will come in followup patches.

Cc Thomas Petazzoni <[email protected]>
Cc Arnout Vandecappelle <[email protected]>

---
Changes v1 ->v2:
- introduce an extra kconfig symbol for positive logic (Thomas)

---
 arch/Config.in      | 10 ++++++++++
 toolchain/Config.in |  1 +
 2 files changed, 11 insertions(+)
arch/Config.in +10 -0
index f385745e47..caf5a318ab 100644
@@ -250,6 +250,16 @@ config BR2_xtensa
 
 endchoice
 
+# For some architectures or specific cores, our internal toolchain
+# backend is not suitable (like, missing support in upstream gcc, or
+# no ChipCo fork exists...)
+config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
+	bool
+
+config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
+	bool
+	default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
+
 # The following string values are defined by the individual
 # Config.in.$ARCH files
 config BR2_ARCH
toolchain/Config.in +1 -0
index 584d053058..8866b7da75 100644
@@ -43,6 +43,7 @@ choice
 config BR2_TOOLCHAIN_BUILDROOT
 	bool "Buildroot toolchain"
 	select BR2_TOOLCHAIN_HAS_SHADOW_PASSWORDS
+	depends on BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
 	depends on !BR2_bf606
 	depends on !BR2_bf607
 	depends on !BR2_bf608
Signature · 1 line
2.11.0
#2 lore raw

PATCH v2 2/5 arch/csky: internal backend not suitable

In reply to Yann E. MORIN

Upstream gcc does not have support for C-Sky, and we do not have a vendor tree for it either (yet?).

Use the newly-introduced symbol to state so, rather than have the exclusion in the toolchain choice.

Cc Thomas Petazzoni <[email protected]>
Cc Arnout Vandecappelle <[email protected]>
---
 arch/Config.in      | 1 +
 toolchain/Config.in | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)
arch/Config.in +1 -0
index caf5a318ab..c10bf16809 100644
@@ -87,6 +87,7 @@ config BR2_bfin
 
 config BR2_csky
 	bool "csky"
+	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 	select BR2_ARCH_HAS_MMU_MANDATORY
 	help
 	  csky is processor IP from china.
toolchain/Config.in +0 -1
index 8866b7da75..890b874e38 100644
@@ -48,7 +48,6 @@ config BR2_TOOLCHAIN_BUILDROOT
 	depends on !BR2_bf607
 	depends on !BR2_bf608
 	depends on !BR2_bf609
-	depends on !BR2_csky
 	depends on !BR2_mips_m6250
 	depends on !BR2_mips_p6600
 
Signature · 1 line
2.11.0
#3 lore raw

PATCH v2 3/5 arch/mips: internal backend not suitable for some cores

In reply to Yann E. MORIN

Some cores are not supported by upstream gcc.

Use the newly-introduced symbol to state so, rather than have the exclusion in the toolchain choice.

Cc Thomas Petazzoni <[email protected]>
Cc Arnout Vandecappelle <[email protected]>
---
 arch/Config.in.mips | 2 ++
 toolchain/Config.in | 2 --
 2 files changed, 2 insertions(+), 2 deletions(-)
arch/Config.in.mips +2 -0
index 89e6effee9..1cce1710da 100644
@@ -61,6 +61,7 @@ config BR2_mips_m5150
 config BR2_mips_m6250
 	bool "M6250"
 	depends on !BR2_ARCH_IS_64
+	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 	select BR2_MIPS_CPU_MIPS32R6
 config BR2_mips_p5600
 	bool "P5600"
@@ -103,6 +104,7 @@ config BR2_mips_i6400
 config BR2_mips_p6600
 	bool "P6600"
 	depends on BR2_ARCH_IS_64
+	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 	select BR2_MIPS_CPU_MIPS64R6
 endchoice
 
toolchain/Config.in +0 -2
index 890b874e38..7780633665 100644
@@ -48,8 +48,6 @@ config BR2_TOOLCHAIN_BUILDROOT
 	depends on !BR2_bf607
 	depends on !BR2_bf608
 	depends on !BR2_bf609
-	depends on !BR2_mips_m6250
-	depends on !BR2_mips_p6600
 
 config BR2_TOOLCHAIN_EXTERNAL
 	bool "External toolchain"
Signature · 1 line
2.11.0
#4 lore raw

PATCH v2 4/5 arch/bfin: internal backend not suitable for some cores

In reply to Yann E. MORIN

Some cores are not supported by upstream gcc.

Use the newly-introduced symbol to state so, rather than have the exclusion in the toolchain choice.

Cc Thomas Petazzoni <[email protected]>
Cc Arnout Vandecappelle <[email protected]>
---
 arch/Config.in.bfin | 4 ++++
 toolchain/Config.in | 4 ----
 2 files changed, 4 insertions(+), 4 deletions(-)
arch/Config.in.bfin +4 -0
index 90e4ab97b0..9ad2dd7ef4 100644
@@ -6,12 +6,16 @@ choice
 	  Specify target CPU
 config BR2_bf606
 	bool "bf606"
+	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 config BR2_bf607
 	bool "bf607"
+	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 config BR2_bf608
 	bool "bf608"
+	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 config BR2_bf609
 	bool "bf609"
+	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 config BR2_bf512
 	bool "bf512"
 config BR2_bf514
toolchain/Config.in +0 -4
index 7780633665..bf1166b601 100644
@@ -44,10 +44,6 @@ config BR2_TOOLCHAIN_BUILDROOT
 	bool "Buildroot toolchain"
 	select BR2_TOOLCHAIN_HAS_SHADOW_PASSWORDS
 	depends on BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
-	depends on !BR2_bf606
-	depends on !BR2_bf607
-	depends on !BR2_bf608
-	depends on !BR2_bf609
 
 config BR2_TOOLCHAIN_EXTERNAL
 	bool "External toolchain"
Signature · 1 line
2.11.0
#5 lore raw

PATCH v2 5/5 arc/bfin: remove 60x cores

In reply to Yann E. MORIN

Those cores are not supported in upstream gcc, not even in master.

The only toolchain that supported those core was the 2014R1 ADI rebuilt toolchain, but we removed it in 311bc13 (toolchain: kill ADI Blackfin toolchain) because there was too many issues with it. ADI has not released any newer toolchain since then.

There is little hope for those cores now, so remove them.

---
 arch/Config.in.bfin | 12 ------------
 1 file changed, 12 deletions(-)
arch/Config.in.bfin +0 -12
index 9ad2dd7ef4..bd9589c71d 100644
@@ -4,18 +4,6 @@ choice
 	default BR2_bf532
 	help
 	  Specify target CPU
-config BR2_bf606
-	bool "bf606"
-	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
-config BR2_bf607
-	bool "bf607"
-	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
-config BR2_bf608
-	bool "bf608"
-	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
-config BR2_bf609
-	bool "bf609"
-	select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 config BR2_bf512
 	bool "bf512"
 config BR2_bf514
Signature · 1 line
2.11.0
#6 lore raw

cover arch: some require a minimal gcc version

In reply to Yann E. MORIN

Hello All!

Not all architectures we support have support in upstream gcc, glibc, binutils, and/or linux. In some cases, only a few specific cores do not have that support.

Furthermore, some architecture, or specific cores, got support in a specific gcc version.

Currently, we have to account for this in at least three locations:
- the toolchain backend choice (internal or externsal)
- the gcc version choice
- each external toolchain

While a previous series handled the case for the internal backend, this second series caters to the minimal required gcc version.

New blind options are added, that archicetures or individual cores may select, to indicate they were introduced, or started to be supported in a specific gcc version.

The gcc version choice, as well as external toolchains, are then converted from ad-hoc (and sometimes incorrect) architecture dependencies, over to use these new required gcc version depednencies.

Note: the custom external toolchain is also converted, but this may cause a regression, in case a user has a custom toolchain with support for a specific arch or core back-ported. See the corresponding commit log for more details. In case this regression is deemed too important, we can simply drop the patch on the floor, in which case we could have the inverse situation, where a user uses a too old external toolchain in which the specific arch/core has not been back-ported, thus causing build failures.

Regards,
Yann E. MORIN.

The following changes since commit 0335a8a1164bfeb7c006c7d248d8f1923069c98f

arc/bfin: remove 60x cores (2017-09-03 11:09:53 +0200)

are available in the git repository at:

git://git.buildroot.org/~ymorin/git/buildroot.git

for you to fetch changes up to 41eeac74f986790fe26f03ebf05322120d2c04da

package/gcc: slight cleanup and reorg in remaining arch depends (2017-09-03 11:14:53 +0200)

----------------------------------------------------------------
Yann E. MORIN (8):
arch: introduce minimal required gcc version
package/gcc: hide versions too old for the current arch toolchain/external-custom: hide versions too old for the current arch toolchain/external: hide versions too old for the current arch arch/bfin: needs gcc >= 6
arch/mips: some variants need different gcc versions arch/arm: some variants need different gcc versions package/gcc: slight cleanup and reorg in remaining arch depends

 arch/Config.in                                     | 22 ++++++++++++++++
 arch/Config.in.arm                                 |  6 +++++
 arch/Config.in.mips                                |  7 ++++++
 package/gcc/Config.in.host                         | 29 +++++++---------------
 .../Config.in                                      |  1 +
 .../Config.in                                      |  1 +
 .../Config.in                                      |  1 +
 .../Config.in                                      |  1 +
 .../toolchain-external-codesourcery-arm/Config.in  |  6 ++---
 .../toolchain-external-codesourcery-mips/Config.in |  2 ++
 .../Config.in                                      |  1 +
 .../toolchain-external-custom/Config.in.options    | 15 +++++++++++
 .../toolchain-external-linaro-aarch64/Config.in    |  1 +
 .../toolchain-external-linaro-arm/Config.in        |  2 ++
 .../toolchain-external-linaro-armeb/Config.in      |  2 ++
 .../toolchain-external-synopsys-arc/Config.in      |  1 +
 16 files changed, 74 insertions(+), 24 deletions(-)
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#7 lore raw

PATCH 1/8 arch: introduce minimal required gcc version

Some CPU variants require that a recent-enough gcc be selected. For example, ARM's cortex-a35 requires gcc-5, while cortex-a73 requires gcc-7. Same goes for other architectures, of course.

Currently, we hard-code every such conditions in the gcc version choice, as well as in the individual external toolchains.

However, as we add even more CPU variants, the conditions are getting more and more complex to write and maintain.

Introduce new symbols, that architectures can select if they have a specific requirement on the gcc version. gcc and external toolchains can then properly depend on those symbols.

The burden of maintaining the requirements on the gcc version now falls down to the architeture, instead of being split up in gcc and all the external toolchains.

As the oldest gcc version to handle, we can either choose gcc-4.9, as the odlest version we support in our internal toolchain, or choose gcc-4.8, as the oldest external toolchain we support (except for the custom ones, but they'll be handled specifically in upcoming changes). We choose to go back up to gcc-4.8.

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/Config.in +21 -0
index c10bf16809..607da36c1d 100644
@@ -261,6 +261,27 @@ config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
 	bool
 	default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 
+# The following symbols are selected by the individual
+# Config.in.$ARCH files
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
+	bool
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+
 # The following string values are defined by the individual
 # Config.in.$ARCH files
 config BR2_ARCH
Signature · 1 line
2.11.0
#8 lore raw

PATCH 1/8 arch: introduce minimal required gcc version

Yann, All,

Le 03/09/2017 ? 11:44, Yann E. MORIN a ?crit?:

Quoted 35 lines

Some CPU variants require that a recent-enough gcc be selected. For example, ARM's cortex-a35 requires gcc-5, while cortex-a73 requires gcc-7. Same goes for other architectures, of course.

Currently, we hard-code every such conditions in the gcc version choice, as well as in the individual external toolchains.

However, as we add even more CPU variants, the conditions are getting more and more complex to write and maintain.

Introduce new symbols, that architectures can select if they have a specific requirement on the gcc version. gcc and external toolchains can then properly depend on those symbols.

The burden of maintaining the requirements on the gcc version now falls down to the architeture, instead of being split up in gcc and all the external toolchains.

As the oldest gcc version to handle, we can either choose gcc-4.9, as the odlest version we support in our internal toolchain, or choose gcc-4.8, as the oldest external toolchain we support (except for the custom ones, but they'll be handled specifically in upcoming changes). We choose to go back up to gcc-4.8.

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/Config.in +0 -0
index c10bf16809..607da36c1d 100644

arch/Config.in config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT · line 265

Quoted 5 lines
arch/Config.in +2 -0
@@ -261,6 +261,27 @@ config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
 	bool
 	default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 
+# The following symbols are selected by the individual
+# Config.in.$ARCH files

I believe something is missing from this patch.

Best regards,
Romain

Quoted 23 lines
arch/Config.in +19 -0
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
+	bool
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+
 # The following string values are defined by the individual
 # Config.in.$ARCH files
 config BR2_ARCH
#9 lore raw

PATCH 1/8 arch: introduce minimal required gcc version

Romain, All,

On 2017-10-07 11:59 +0200, Romain Naour spake thusly:

Quoted 39 lines

Le 03/09/2017 ? 11:44, Yann E. MORIN a ?crit?:

Quoted 38 lines

Some CPU variants require that a recent-enough gcc be selected. For example, ARM's cortex-a35 requires gcc-5, while cortex-a73 requires gcc-7. Same goes for other architectures, of course.

Currently, we hard-code every such conditions in the gcc version choice, as well as in the individual external toolchains.

However, as we add even more CPU variants, the conditions are getting more and more complex to write and maintain.

Introduce new symbols, that architectures can select if they have a specific requirement on the gcc version. gcc and external toolchains can then properly depend on those symbols.

The burden of maintaining the requirements on the gcc version now falls down to the architeture, instead of being split up in gcc and all the external toolchains.

As the oldest gcc version to handle, we can either choose gcc-4.9, as the odlest version we support in our internal toolchain, or choose gcc-4.8, as the oldest external toolchain we support (except for the custom ones, but they'll be handled specifically in upcoming changes). We choose to go back up to gcc-4.8.

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
arch/Config.in +0 -0
index c10bf16809..607da36c1d 100644
@@ -261,6 +261,27 @@ config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
 	bool
 	default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
 
Quoted 4 lines

arch/Config.in config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT · line 265

Quoted 2 lines
arch/Config.in +2 -0
+# The following symbols are selected by the individual
+# Config.in.$ARCH files

I believe something is missing from this patch.

Nope, this patch only adds the symbols. The follow-up patches convert the individual architectures, one by one, over to using them.

Regards,
Yann E. MORIN.

Quoted 27 lines

Best regards,
Romain

Quoted 23 lines
arch/Config.in +19 -0
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
+	bool
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+
+config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+
 # The following string values are defined by the individual
 # Config.in.$ARCH files
 config BR2_ARCH
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#10 lore raw

PATCH 2/8 package/gcc: hide versions too old for the current arch

In reply to Yann E. MORIN

Begin the conversion from hard-coded dependencies on architectures, to architecture-specified version requirement, using the newly introduced BR2_ARCH_NEEDS_GCC_AT_LEAST_XXX symbols.

Hard-coded dependencies will be removed progressively, as archs are individually coonverted over to using the new symbols.

We do not change the architecture-specific versions for arc and openrisc, because there is no point in doing so for those, as they use special, non-upstream versions anyway.

Cc Thomas Petazzoni <[email protected]>
Cc Arnout Vandecappelle <[email protected]>
---
 package/gcc/Config.in.host | 3 +++
 1 file changed, 3 insertions(+)
package/gcc/Config.in.host +3 -0
index ec7b6924ee..69bebc1f9e 100644
@@ -22,6 +22,7 @@ config BR2_GCC_VERSION_OR1K
 
 config BR2_GCC_VERSION_4_9_X
 	bool "gcc 4.9.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	# Broken or unsupported architectures
 	depends on !BR2_arc && !BR2_bfin && !BR2_or1k
 	# Broken or unsupported ARM cores
@@ -43,6 +44,7 @@ config BR2_GCC_VERSION_4_9_X
 
 config BR2_GCC_VERSION_5_X
 	bool "gcc 5.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	# Broken or unsupported architectures
 	depends on !BR2_arc && !BR2_bfin && !BR2_or1k
 	# Broken or unsupported ARM cores
@@ -57,6 +59,7 @@ config BR2_GCC_VERSION_5_X
 
 config BR2_GCC_VERSION_6_X
 	bool "gcc 6.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	# Broken or unsupported architectures
 	depends on !BR2_arc
 	depends on !BR2_or1k
Signature · 1 line
2.11.0
#11 lore raw

PATCH 3/8 toolchain/external-custom: hide versions too old for the current arch

In reply to Yann E. MORIN

When an architecture expresses a requirement on the gcc version, limit the version choice in the custom external toolchain.

The ratioanle being that there is no point in offering that version to the user if we know before-hand that the gcc version will not work for that architecture.

All versions below the minimum we support is just made conditional to that minimum as well, including the "older" entry.

However, this means that the "older" entry is no longer available when the architecture requires a minimum gcc version. A user who wants to use a toolchain with a gcc older than the minimum will have no choice but to realise the toolchain is not suitable (or lie and we would catch that when checking the gcc version anyway).

Cc Thomas Petazzoni <[email protected]>

---
Note: this implies that it is no longer possible to use a custom external toolchain in which a specific core has been back-ported Thus, this patch may cause regressions in very specific and rare corner cases. Do we want to support those cases? If yes, then we should drop this patch.

---
 .../toolchain-external-custom/Config.in.options           | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
toolchain/toolchain-external/toolchain-external-custom/Config.in.options +15 -0
index ae343ddad5..eb7c30f171 100644
@@ -18,6 +18,11 @@ config BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX
 
 choice
 	bool "External toolchain gcc version"
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_7   if BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_6   if BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_5   if BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_4_9 if BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_4_8 if BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	default BR2_TOOLCHAIN_EXTERNAL_GCC_4_3
 	help
 	  Set to the gcc version that is used by your external
@@ -29,42 +34,52 @@ config BR2_TOOLCHAIN_EXTERNAL_GCC_7
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_6
 	bool "6.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_6
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_5
 	bool "5.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_5
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_9
 	bool "4.9.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_8
 	bool "4.8.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_8
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_7
 	bool "4.7.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_7
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_6
 	bool "4.6.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_6
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_5
 	bool "4.5.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_5
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_4
 	bool "4.4.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_4
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_3
 	bool "4.3.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_3
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_OLD
 	bool "older"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	help
 	  Use this option if your GCC version is older than any of the
 	  above.
Signature · 1 line
2.11.0
#12 lore raw

PATCH 3/8 toolchain/external-custom: hide versions too old for the current arch

Hi Yann, All

Le 03/09/2017 ? 11:44, Yann E. MORIN a ?crit?:

Quoted 4 lines

When an architecture expresses a requirement on the gcc version, limit the version choice in the custom external toolchain.

The ratioanle being that there is no point in offering that version to

rationale

Quoted 10 lines

the user if we know before-hand that the gcc version will not work for that architecture.

All versions below the minimum we support is just made conditional to that minimum as well, including the "older" entry.

However, this means that the "older" entry is no longer available when the architecture requires a minimum gcc version. A user who wants to use a toolchain with a gcc older than the minimum will have no choice but to realise the toolchain is not suitable (or lie and we would catch that

realize

Quoted 11 lines

when checking the gcc version anyway).

Cc Thomas Petazzoni <[email protected]>

---
Note: this implies that it is no longer possible to use a custom external toolchain in which a specific core has been back-ported Thus, this patch may cause regressions in very specific and rare corner cases. Do we want to support those cases? If yes, then we should drop this patch.

This can be a problem for Linaro toolchains [1] where the GCC support for some new cpu are backported. (Ok this example is moot since Buildroot doesn't support these cpu).

Also since BR2_TOOLCHAIN_EXTERNAL_GCC_XXX is an user choice, we can print a warning instead of completely disabling the gcc version ?

Best regards,
Romain

[1] https://releases.linaro.org/components/toolchain/binaries/5.4-2017.05/

Quoted 74 lines
---
 .../toolchain-external-custom/Config.in.options           | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
toolchain/toolchain-external/toolchain-external-custom/Config.in.options +15 -0
index ae343ddad5..eb7c30f171 100644
@@ -18,6 +18,11 @@ config BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX
 
 choice
 	bool "External toolchain gcc version"
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_7   if BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_6   if BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_5   if BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_4_9 if BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_4_8 if BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	default BR2_TOOLCHAIN_EXTERNAL_GCC_4_3
 	help
 	  Set to the gcc version that is used by your external
@@ -29,42 +34,52 @@ config BR2_TOOLCHAIN_EXTERNAL_GCC_7
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_6
 	bool "6.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_6
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_5
 	bool "5.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_5
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_9
 	bool "4.9.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_8
 	bool "4.8.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_8
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_7
 	bool "4.7.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_7
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_6
 	bool "4.6.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_6
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_5
 	bool "4.5.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_5
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_4
 	bool "4.4.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_4
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_3
 	bool "4.3.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_3
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_OLD
 	bool "older"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	help
 	  Use this option if your GCC version is older than any of the
 	  above.
#13 lore raw

PATCH 3/8 toolchain/external-custom: hide versions too old for the current arch

Romain, All,

On 2017-10-07 11:27 +0200, Romain Naour spake thusly:

Quoted 1 line

Le 03/09/2017 ? 11:44, Yann E. MORIN a ?crit?:

[--SNIP--]

Quoted 9 lines
Quoted 5 lines

Note: this implies that it is no longer possible to use a custom external toolchain in which a specific core has been back-ported Thus, this patch may cause regressions in very specific and rare corner cases. Do we want to support those cases? If yes, then we should drop this patch.

This can be a problem for Linaro toolchains [1] where the GCC support for some new cpu are backported. (Ok this example is moot since Buildroot doesn't support these cpu).

On the other hand, we could get a non-working configuration for other external toolchains.

And that is not nice to let the user generate a configuration we know if invalid.

Quoted 2 lines

Also since BR2_TOOLCHAIN_EXTERNAL_GCC_XXX is an user choice, we can print a warning instead of completely disabling the gcc version ?

I'll see if I can do something about that.

Regards,
Yann E. MORIN.

Quoted 80 lines

Best regards,
Romain

[1] https://releases.linaro.org/components/toolchain/binaries/5.4-2017.05/

Quoted 74 lines
---
 .../toolchain-external-custom/Config.in.options           | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
toolchain/toolchain-external/toolchain-external-custom/Config.in.options +15 -0
index ae343ddad5..eb7c30f171 100644
@@ -18,6 +18,11 @@ config BR2_TOOLCHAIN_EXTERNAL_CUSTOM_PREFIX
 
 choice
 	bool "External toolchain gcc version"
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_7   if BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_6   if BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_5   if BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_4_9 if BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
+	default BR2_TOOLCHAIN_EXTERNAL_GCC_4_8 if BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	default BR2_TOOLCHAIN_EXTERNAL_GCC_4_3
 	help
 	  Set to the gcc version that is used by your external
@@ -29,42 +34,52 @@ config BR2_TOOLCHAIN_EXTERNAL_GCC_7
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_6
 	bool "6.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_6
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_5
 	bool "5.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_5
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_9
 	bool "4.9.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_8
 	bool "4.8.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_8
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_7
 	bool "4.7.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_7
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_6
 	bool "4.6.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_6
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_5
 	bool "4.5.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_5
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_4
 	bool "4.4.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_4
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_4_3
 	bool "4.3.x"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_3
 
 config BR2_TOOLCHAIN_EXTERNAL_GCC_OLD
 	bool "older"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
 	help
 	  Use this option if your GCC version is older than any of the
 	  above.
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#14 lore raw

PATCH 4/8 toolchain/external: hide versions too old for the current arch

In reply to Yann E. MORIN

Hide the toolchains if the arch requires a gcc version more recent than the one they provide.

Cc Thomas Petazzoni <[email protected]>
---
 .../toolchain-external/toolchain-external-codescape-img-mips/Config.in  | 1 +
 .../toolchain-external/toolchain-external-codescape-mti-mips/Config.in  | 1 +
 .../toolchain-external-codesourcery-aarch64/Config.in                   | 1 +
 .../toolchain-external/toolchain-external-codesourcery-amd64/Config.in  | 1 +
 .../toolchain-external/toolchain-external-codesourcery-arm/Config.in    | 2 ++
 .../toolchain-external/toolchain-external-codesourcery-mips/Config.in   | 2 ++
 .../toolchain-external/toolchain-external-codesourcery-niosII/Config.in | 1 +
 .../toolchain-external/toolchain-external-linaro-aarch64/Config.in      | 1 +
 toolchain/toolchain-external/toolchain-external-linaro-arm/Config.in    | 2 ++
 toolchain/toolchain-external/toolchain-external-linaro-armeb/Config.in  | 2 ++
 toolchain/toolchain-external/toolchain-external-synopsys-arc/Config.in  | 1 +
 11 files changed, 15 insertions(+)
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +1 -0
index e29c4dcb87..8b2eab0ad2 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS
 	bool "Codescape IMG GNU Linux Toolchain 2016.05"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_MIPS_CPU_MIPS32R6 || (BR2_MIPS_CPU_MIPS64R6 && !BR2_MIPS_SOFT_FLOAT)
 	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
toolchain/toolchain-external/toolchain-external-codescape-mti-mips/Config.in +1 -0
index efe6f8527e..db191fd1be 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS
 	bool "Codescape MTI GNU Linux Toolchain 2016.05"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_MIPS_CPU_MIPS32R2 || (BR2_MIPS_CPU_MIPS64R2 && !BR2_MIPS_SOFT_FLOAT) || \
 		BR2_MIPS_CPU_MIPS32R5 || (BR2_MIPS_CPU_MIPS64R5 && !BR2_MIPS_SOFT_FLOAT)
toolchain/toolchain-external/toolchain-external-codesourcery-aarch64/Config.in +1 -0
index 66a032e9ac..24cbcffa29 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_AARCH64
 	bool "CodeSourcery AArch64 2014.11"
 	depends on BR2_aarch64
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	# a57/a53 and a72/a53 appeared in gcc-6 or were broken before
 	depends on !BR2_cortex_a57_a53 && !BR2_cortex_a72_a53
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
toolchain/toolchain-external/toolchain-external-codesourcery-amd64/Config.in +1 -0
index 101e227af9..50c5a20019 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_AMD64
 	bool "Sourcery CodeBench AMD64 2016.11"
 	depends on BR2_x86_64
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on !BR2_STATIC_LIBS
 	depends on BR2_x86_jaguar || BR2_x86_steamroller
toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in +2 -0
index e1a7891007..b91daa5c81 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_ARM
 	bool "Sourcery CodeBench ARM 2014.05"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	# a15/a7 appeared in gcc-4.9, a17/a7 in gcc-5, a57/a53 and a72/a53
 	# in gcc-6, or they each were broken earlier than that.
 	depends on !BR2_cortex_a15_a7 && !BR2_cortex_a17_a7
@@ -35,5 +36,6 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_ARM
 
 comment "Sourcery CodeBench toolchains available for the EABI ABI"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	depends on !BR2_ARM_EABI
 	depends on !BR2_STATIC_LIBS
toolchain/toolchain-external/toolchain-external-codesourcery-mips/Config.in +2 -0
index 6a13ae6cd6..734f0e4c7c 100644
@@ -2,6 +2,7 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_MIPS
 	bool "Sourcery CodeBench MIPS 2016.05"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
 	depends on BR2_MIPS_CPU_MIPS32R2 || BR2_MIPS_CPU_MIPS64R2
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	# Unsupported MIPS cores
 	depends on !BR2_mips_interaptiv
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
@@ -89,5 +90,6 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_MIPS
 	      Select BR2_SOFT_FLOAT
 
 comment "Sourcery CodeBench toolchains are only available for MIPS/MIPS64 o32 and n64"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	depends on BR2_MIPS_NABI32
 	depends on !BR2_STATIC_LIBS
toolchain/toolchain-external/toolchain-external-codesourcery-niosII/Config.in +1 -0
index 341bc2ab44..7563995eb6 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_NIOSII
 	bool "Sourcery CodeBench Nios-II 2017.05"
 	depends on BR2_nios2
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on !BR2_STATIC_LIBS
 	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
toolchain/toolchain-external/toolchain-external-linaro-aarch64/Config.in +1 -0
index caa5ed340a..71ae73adb8 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_LINARO_AARCH64
 	bool "Linaro AArch64 2017.02"
 	depends on BR2_aarch64
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on !BR2_STATIC_LIBS
 	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
toolchain/toolchain-external/toolchain-external-linaro-arm/Config.in +2 -0
index f538eb7eb3..f5bbbaaad8 100644
@@ -1,11 +1,13 @@
 comment "Linaro toolchains available for Cortex-A + EABIhf"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on !BR2_ARM_CPU_ARMV7A || !BR2_ARM_EABIHF
 	depends on !BR2_STATIC_LIBS
 
 config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARM
 	bool "Linaro ARM 2017.02"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_ARM_EABIHF
toolchain/toolchain-external/toolchain-external-linaro-armeb/Config.in +2 -0
index 14c7481f81..64e97eeea7 100644
@@ -1,11 +1,13 @@
 comment "Linaro toolchains available for Cortex-A + EABIhf"
 	depends on BR2_armeb
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on !BR2_ARM_CPU_ARMV7A || !BR2_ARM_EABIHF
 	depends on !BR2_STATIC_LIBS
 
 config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARMEB
 	bool "Linaro armeb 2017.02"
 	depends on BR2_armeb
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_ARM_EABIHF
toolchain/toolchain-external/toolchain-external-synopsys-arc/Config.in +1 -0
index f438ea765d..8e4344a83d 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_SYNOPSYS_ARC
 	bool "Synopsys ARC 2016.09 toolchain"
 	depends on BR2_arc
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64"
 	select BR2_TOOLCHAIN_EXTERNAL_UCLIBC
 	select BR2_INSTALL_LIBSTDCPP
Signature · 1 line
2.11.0
#15 lore raw

PATCH 4/8 toolchain/external: hide versions too old for the current arch

Yann, All,

This patch needs to be rebased on master after the last linaro toolchain version bump (sorry ;-) )

Le 03/09/2017 ? 11:44, Yann E. MORIN a ?crit?:

Quoted 24 lines

Hide the toolchains if the arch requires a gcc version more recent than the one they provide.

Cc Thomas Petazzoni <[email protected]>
---
 .../toolchain-external/toolchain-external-codescape-img-mips/Config.in  | 1 +
 .../toolchain-external/toolchain-external-codescape-mti-mips/Config.in  | 1 +
 .../toolchain-external-codesourcery-aarch64/Config.in                   | 1 +
 .../toolchain-external/toolchain-external-codesourcery-amd64/Config.in  | 1 +
 .../toolchain-external/toolchain-external-codesourcery-arm/Config.in    | 2 ++
 .../toolchain-external/toolchain-external-codesourcery-mips/Config.in   | 2 ++
 .../toolchain-external/toolchain-external-codesourcery-niosII/Config.in | 1 +
 .../toolchain-external/toolchain-external-linaro-aarch64/Config.in      | 1 +
 toolchain/toolchain-external/toolchain-external-linaro-arm/Config.in    | 2 ++
 toolchain/toolchain-external/toolchain-external-linaro-armeb/Config.in  | 2 ++
 toolchain/toolchain-external/toolchain-external-synopsys-arc/Config.in  | 1 +
 11 files changed, 15 insertions(+)
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +0 -0
index e29c4dcb87..8b2eab0ad2 100644

toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in line 3

Quoted 3 lines
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +0 -0
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS
 	bool "Codescape IMG GNU Linux Toolchain 2016.05"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el

Having

toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in line 4

Quoted 1 line
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +1 -0
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5

and
select BR2_TOOLCHAIN_GCC_AT_LEAST_4_9

looks redundant...

Also where BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 is selected when you use a packaged toolchain ?
With the complete series applied I can't select a packaged external toolchain.

Try with to select the Linaro toolchain with this defconfig:

BR2_arm=y
BR2_cortex_a9=y
BR2_ARM_ENABLE_NEON=y
BR2_ARM_ENABLE_VFP=y
BR2_TOOLCHAIN_EXTERNAL=y

Best regards,
Romain

Quoted 150 lines
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +0 -0
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_MIPS_CPU_MIPS32R6 || (BR2_MIPS_CPU_MIPS64R6 && !BR2_MIPS_SOFT_FLOAT)
 	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
toolchain/toolchain-external/toolchain-external-codescape-mti-mips/Config.in +1 -0
index efe6f8527e..db191fd1be 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS
 	bool "Codescape MTI GNU Linux Toolchain 2016.05"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_MIPS_CPU_MIPS32R2 || (BR2_MIPS_CPU_MIPS64R2 && !BR2_MIPS_SOFT_FLOAT) || \
 		BR2_MIPS_CPU_MIPS32R5 || (BR2_MIPS_CPU_MIPS64R5 && !BR2_MIPS_SOFT_FLOAT)
toolchain/toolchain-external/toolchain-external-codesourcery-aarch64/Config.in +1 -0
index 66a032e9ac..24cbcffa29 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_AARCH64
 	bool "CodeSourcery AArch64 2014.11"
 	depends on BR2_aarch64
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	# a57/a53 and a72/a53 appeared in gcc-6 or were broken before
 	depends on !BR2_cortex_a57_a53 && !BR2_cortex_a72_a53
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
toolchain/toolchain-external/toolchain-external-codesourcery-amd64/Config.in +1 -0
index 101e227af9..50c5a20019 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_AMD64
 	bool "Sourcery CodeBench AMD64 2016.11"
 	depends on BR2_x86_64
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on !BR2_STATIC_LIBS
 	depends on BR2_x86_jaguar || BR2_x86_steamroller
toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in +2 -0
index e1a7891007..b91daa5c81 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_ARM
 	bool "Sourcery CodeBench ARM 2014.05"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	# a15/a7 appeared in gcc-4.9, a17/a7 in gcc-5, a57/a53 and a72/a53
 	# in gcc-6, or they each were broken earlier than that.
 	depends on !BR2_cortex_a15_a7 && !BR2_cortex_a17_a7
@@ -35,5 +36,6 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_ARM
 
 comment "Sourcery CodeBench toolchains available for the EABI ABI"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	depends on !BR2_ARM_EABI
 	depends on !BR2_STATIC_LIBS
toolchain/toolchain-external/toolchain-external-codesourcery-mips/Config.in +2 -0
index 6a13ae6cd6..734f0e4c7c 100644
@@ -2,6 +2,7 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_MIPS
 	bool "Sourcery CodeBench MIPS 2016.05"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
 	depends on BR2_MIPS_CPU_MIPS32R2 || BR2_MIPS_CPU_MIPS64R2
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	# Unsupported MIPS cores
 	depends on !BR2_mips_interaptiv
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
@@ -89,5 +90,6 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_MIPS
 	      Select BR2_SOFT_FLOAT
 
 comment "Sourcery CodeBench toolchains are only available for MIPS/MIPS64 o32 and n64"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	depends on BR2_MIPS_NABI32
 	depends on !BR2_STATIC_LIBS
toolchain/toolchain-external/toolchain-external-codesourcery-niosII/Config.in +1 -0
index 341bc2ab44..7563995eb6 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_NIOSII
 	bool "Sourcery CodeBench Nios-II 2017.05"
 	depends on BR2_nios2
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on !BR2_STATIC_LIBS
 	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
toolchain/toolchain-external/toolchain-external-linaro-aarch64/Config.in +1 -0
index caa5ed340a..71ae73adb8 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_LINARO_AARCH64
 	bool "Linaro AArch64 2017.02"
 	depends on BR2_aarch64
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on !BR2_STATIC_LIBS
 	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
toolchain/toolchain-external/toolchain-external-linaro-arm/Config.in +2 -0
index f538eb7eb3..f5bbbaaad8 100644
@@ -1,11 +1,13 @@
 comment "Linaro toolchains available for Cortex-A + EABIhf"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on !BR2_ARM_CPU_ARMV7A || !BR2_ARM_EABIHF
 	depends on !BR2_STATIC_LIBS
 
 config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARM
 	bool "Linaro ARM 2017.02"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_ARM_EABIHF
toolchain/toolchain-external/toolchain-external-linaro-armeb/Config.in +2 -0
index 14c7481f81..64e97eeea7 100644
@@ -1,11 +1,13 @@
 comment "Linaro toolchains available for Cortex-A + EABIhf"
 	depends on BR2_armeb
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on !BR2_ARM_CPU_ARMV7A || !BR2_ARM_EABIHF
 	depends on !BR2_STATIC_LIBS
 
 config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARMEB
 	bool "Linaro armeb 2017.02"
 	depends on BR2_armeb
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_ARM_EABIHF
toolchain/toolchain-external/toolchain-external-synopsys-arc/Config.in +1 -0
index f438ea765d..8e4344a83d 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_SYNOPSYS_ARC
 	bool "Synopsys ARC 2016.09 toolchain"
 	depends on BR2_arc
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64"
 	select BR2_TOOLCHAIN_EXTERNAL_UCLIBC
 	select BR2_INSTALL_LIBSTDCPP
#16 lore raw

PATCH 4/8 toolchain/external: hide versions too old for the current arch

Romain, All,

On 2017-10-07 11:57 +0200, Romain Naour spake thusly:

Quoted 34 lines

This patch needs to be rebased on master after the last linaro toolchain version bump (sorry ;-) )

Le 03/09/2017 ? 11:44, Yann E. MORIN a ?crit?:

Quoted 24 lines

Hide the toolchains if the arch requires a gcc version more recent than the one they provide.

Cc Thomas Petazzoni <[email protected]>
---
 .../toolchain-external/toolchain-external-codescape-img-mips/Config.in  | 1 +
 .../toolchain-external/toolchain-external-codescape-mti-mips/Config.in  | 1 +
 .../toolchain-external-codesourcery-aarch64/Config.in                   | 1 +
 .../toolchain-external/toolchain-external-codesourcery-amd64/Config.in  | 1 +
 .../toolchain-external/toolchain-external-codesourcery-arm/Config.in    | 2 ++
 .../toolchain-external/toolchain-external-codesourcery-mips/Config.in   | 2 ++
 .../toolchain-external/toolchain-external-codesourcery-niosII/Config.in | 1 +
 .../toolchain-external/toolchain-external-linaro-aarch64/Config.in      | 1 +
 toolchain/toolchain-external/toolchain-external-linaro-arm/Config.in    | 2 ++
 toolchain/toolchain-external/toolchain-external-linaro-armeb/Config.in  | 2 ++
 toolchain/toolchain-external/toolchain-external-synopsys-arc/Config.in  | 1 +
 11 files changed, 15 insertions(+)
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +0 -0
index e29c4dcb87..8b2eab0ad2 100644

toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in line 3

Quoted 3 lines
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +0 -0
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS
 	bool "Codescape IMG GNU Linux Toolchain 2016.05"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el

Having

Quoted 6 lines

toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in line 4

Quoted 1 line
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +1 -0
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5

and
select BR2_TOOLCHAIN_GCC_AT_LEAST_4_9

looks redundant...

It might, but this serves two different purposes.

Quoted 2 lines

Also where BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 is selected when you use a packaged toolchain ?

The architectures do. Either the full arch, or individual cores.

Quoted 9 lines

With the complete series applied I can't select a packaged external toolchain.

Try with to select the Linaro toolchain with this defconfig:

BR2_arm=y
BR2_cortex_a9=y
BR2_ARM_ENABLE_NEON=y
BR2_ARM_ENABLE_VFP=y
BR2_TOOLCHAIN_EXTERNAL=y

Weird, it works for me:

    $ make defconfig BR2_DEFCONFIG=$(pwd)/kubu.defconfig
    $ grep LINARO .config
    BR2_TOOLCHAIN_EXTERNAL_LINARO_ARM=y

Regards,
Yann E. MORIN.

Quoted 154 lines

Best regards,
Romain

Quoted 150 lines
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +0 -0
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_MIPS_CPU_MIPS32R6 || (BR2_MIPS_CPU_MIPS64R6 && !BR2_MIPS_SOFT_FLOAT)
 	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
toolchain/toolchain-external/toolchain-external-codescape-mti-mips/Config.in +1 -0
index efe6f8527e..db191fd1be 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_MTI_MIPS
 	bool "Codescape MTI GNU Linux Toolchain 2016.05"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_MIPS_CPU_MIPS32R2 || (BR2_MIPS_CPU_MIPS64R2 && !BR2_MIPS_SOFT_FLOAT) || \
 		BR2_MIPS_CPU_MIPS32R5 || (BR2_MIPS_CPU_MIPS64R5 && !BR2_MIPS_SOFT_FLOAT)
toolchain/toolchain-external/toolchain-external-codesourcery-aarch64/Config.in +1 -0
index 66a032e9ac..24cbcffa29 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_AARCH64
 	bool "CodeSourcery AArch64 2014.11"
 	depends on BR2_aarch64
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	# a57/a53 and a72/a53 appeared in gcc-6 or were broken before
 	depends on !BR2_cortex_a57_a53 && !BR2_cortex_a72_a53
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
toolchain/toolchain-external/toolchain-external-codesourcery-amd64/Config.in +1 -0
index 101e227af9..50c5a20019 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_AMD64
 	bool "Sourcery CodeBench AMD64 2016.11"
 	depends on BR2_x86_64
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on !BR2_STATIC_LIBS
 	depends on BR2_x86_jaguar || BR2_x86_steamroller
toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in +2 -0
index e1a7891007..b91daa5c81 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_ARM
 	bool "Sourcery CodeBench ARM 2014.05"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	# a15/a7 appeared in gcc-4.9, a17/a7 in gcc-5, a57/a53 and a72/a53
 	# in gcc-6, or they each were broken earlier than that.
 	depends on !BR2_cortex_a15_a7 && !BR2_cortex_a17_a7
@@ -35,5 +36,6 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_ARM
 
 comment "Sourcery CodeBench toolchains available for the EABI ABI"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	depends on !BR2_ARM_EABI
 	depends on !BR2_STATIC_LIBS
toolchain/toolchain-external/toolchain-external-codesourcery-mips/Config.in +2 -0
index 6a13ae6cd6..734f0e4c7c 100644
@@ -2,6 +2,7 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_MIPS
 	bool "Sourcery CodeBench MIPS 2016.05"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
 	depends on BR2_MIPS_CPU_MIPS32R2 || BR2_MIPS_CPU_MIPS64R2
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	# Unsupported MIPS cores
 	depends on !BR2_mips_interaptiv
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
@@ -89,5 +90,6 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_MIPS
 	      Select BR2_SOFT_FLOAT
 
 comment "Sourcery CodeBench toolchains are only available for MIPS/MIPS64 o32 and n64"
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	depends on BR2_MIPS_NABI32
 	depends on !BR2_STATIC_LIBS
toolchain/toolchain-external/toolchain-external-codesourcery-niosII/Config.in +1 -0
index 341bc2ab44..7563995eb6 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_NIOSII
 	bool "Sourcery CodeBench Nios-II 2017.05"
 	depends on BR2_nios2
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on !BR2_STATIC_LIBS
 	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
toolchain/toolchain-external/toolchain-external-linaro-aarch64/Config.in +1 -0
index caa5ed340a..71ae73adb8 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_LINARO_AARCH64
 	bool "Linaro AArch64 2017.02"
 	depends on BR2_aarch64
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on !BR2_STATIC_LIBS
 	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
toolchain/toolchain-external/toolchain-external-linaro-arm/Config.in +2 -0
index f538eb7eb3..f5bbbaaad8 100644
@@ -1,11 +1,13 @@
 comment "Linaro toolchains available for Cortex-A + EABIhf"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on !BR2_ARM_CPU_ARMV7A || !BR2_ARM_EABIHF
 	depends on !BR2_STATIC_LIBS
 
 config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARM
 	bool "Linaro ARM 2017.02"
 	depends on BR2_arm
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_ARM_EABIHF
toolchain/toolchain-external/toolchain-external-linaro-armeb/Config.in +2 -0
index 14c7481f81..64e97eeea7 100644
@@ -1,11 +1,13 @@
 comment "Linaro toolchains available for Cortex-A + EABIhf"
 	depends on BR2_armeb
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on !BR2_ARM_CPU_ARMV7A || !BR2_ARM_EABIHF
 	depends on !BR2_STATIC_LIBS
 
 config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARMEB
 	bool "Linaro armeb 2017.02"
 	depends on BR2_armeb
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_ARM_EABIHF
toolchain/toolchain-external/toolchain-external-synopsys-arc/Config.in +1 -0
index f438ea765d..8e4344a83d 100644
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_SYNOPSYS_ARC
 	bool "Synopsys ARC 2016.09 toolchain"
 	depends on BR2_arc
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 	depends on BR2_HOSTARCH = "x86_64"
 	select BR2_TOOLCHAIN_EXTERNAL_UCLIBC
 	select BR2_INSTALL_LIBSTDCPP
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#17 lore raw

PATCH 4/8 toolchain/external: hide versions too old for the current arch

Hi Yann, all,

Le 07/10/2017 ? 14:15, Yann E. MORIN a ?crit?:

Quoted 37 lines

Romain, All,

On 2017-10-07 11:57 +0200, Romain Naour spake thusly:

Quoted 34 lines

This patch needs to be rebased on master after the last linaro toolchain version bump (sorry ;-) )

Le 03/09/2017 ? 11:44, Yann E. MORIN a ?crit?:

Quoted 24 lines

Hide the toolchains if the arch requires a gcc version more recent than the one they provide.

Cc Thomas Petazzoni <[email protected]>
---
 .../toolchain-external/toolchain-external-codescape-img-mips/Config.in  | 1 +
 .../toolchain-external/toolchain-external-codescape-mti-mips/Config.in  | 1 +
 .../toolchain-external-codesourcery-aarch64/Config.in                   | 1 +
 .../toolchain-external/toolchain-external-codesourcery-amd64/Config.in  | 1 +
 .../toolchain-external/toolchain-external-codesourcery-arm/Config.in    | 2 ++
 .../toolchain-external/toolchain-external-codesourcery-mips/Config.in   | 2 ++
 .../toolchain-external/toolchain-external-codesourcery-niosII/Config.in | 1 +
 .../toolchain-external/toolchain-external-linaro-aarch64/Config.in      | 1 +
 toolchain/toolchain-external/toolchain-external-linaro-arm/Config.in    | 2 ++
 toolchain/toolchain-external/toolchain-external-linaro-armeb/Config.in  | 2 ++
 toolchain/toolchain-external/toolchain-external-synopsys-arc/Config.in  | 1 +
 11 files changed, 15 insertions(+)
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +0 -0
index e29c4dcb87..8b2eab0ad2 100644

toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in line 3

Quoted 3 lines
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +0 -0
@@ -1,6 +1,7 @@
 config BR2_TOOLCHAIN_EXTERNAL_CODESCAPE_IMG_MIPS
 	bool "Codescape IMG GNU Linux Toolchain 2016.05"
 	depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el

Having

Quoted 8 lines
Quoted 6 lines

toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in line 4

Quoted 1 line
toolchain/toolchain-external/toolchain-external-codescape-img-mips/Config.in +1 -0
+	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5

and
select BR2_TOOLCHAIN_GCC_AT_LEAST_4_9

looks redundant...

It might, but this serves two different purposes.

Yes, I understand that.

Quoted 16 lines
Quoted 3 lines

Also where BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 is selected when you use a packaged toolchain ?

The architectures do. Either the full arch, or individual cores.

Quoted 9 lines

With the complete series applied I can't select a packaged external toolchain.

Try with to select the Linaro toolchain with this defconfig:

BR2_arm=y
BR2_cortex_a9=y
BR2_ARM_ENABLE_NEON=y
BR2_ARM_ENABLE_VFP=y
BR2_TOOLCHAIN_EXTERNAL=y

Quoted 5 lines

Weird, it works for me:

    $ make defconfig BR2_DEFCONFIG=$(pwd)/kubu.defconfig
    $ grep LINARO .config
    BR2_TOOLCHAIN_EXTERNAL_LINARO_ARM=y

I made a mistake while applying the patch locally and resolve the conflict due to the Linaro toolchain bump.

The '!' was missing before "BR2_ARCH_NEEDS_GCC_AT_LEAST_7"... That's why I wasn't able to select the toolchain.

Sorry for the noise.

Best regards,
Romain

Quoted 7 lines

Regards,
Yann E. MORIN.

Quoted 3 lines

Best regards,
Romain

#18 lore raw

PATCH 5/8 arch/bfin: needs gcc >= 6

In reply to Yann E. MORIN
Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in             | 1 +
 package/gcc/Config.in.host | 4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)
arch/Config.in +1 -0
index 607da36c1d..d3f63da34f 100644
@@ -79,6 +79,7 @@ config BR2_aarch64_be
 config BR2_bfin
 	bool "Blackfin"
 	select BR2_ARCH_HAS_FDPIC_SUPPORT
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	help
 	  The Blackfin is a family of 16 or 32-bit microprocessors developed,
 	  manufactured and marketed by Analog Devices.
package/gcc/Config.in.host +2 -2
index 69bebc1f9e..df836d96e4 100644
@@ -24,7 +24,7 @@ config BR2_GCC_VERSION_4_9_X
 	bool "gcc 4.9.x"
 	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	# Broken or unsupported architectures
-	depends on !BR2_arc && !BR2_bfin && !BR2_or1k
+	depends on !BR2_arc && !BR2_or1k
 	# Broken or unsupported ARM cores
 	depends on !BR2_cortex_a17 && !BR2_cortex_a17_a7
 	depends on !BR2_cortex_a72 && !BR2_cortex_a72_a53
@@ -46,7 +46,7 @@ config BR2_GCC_VERSION_5_X
 	bool "gcc 5.x"
 	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	# Broken or unsupported architectures
-	depends on !BR2_arc && !BR2_bfin && !BR2_or1k
+	depends on !BR2_arc && !BR2_or1k
 	# Broken or unsupported ARM cores
 	depends on !BR2_cortex_a57_a53 && !BR2_cortex_a72_a53
 	# musl ppc64 unsupported
Signature · 1 line
2.11.0
#19 lore raw

PATCH 6/8 arch/mips: some variants need different gcc versions

In reply to Yann E. MORIN

We use the conditions currently expressed in the gcc version choice.

We leave the msul vs mips64 conditions in gcc, because the "fault" really is on gcc, which does not recognise the mips64+musl tuples, so the fix lie with gcc, and the current conditions are fitting.

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.mips        | 7 +++++++
 package/gcc/Config.in.host | 8 --------
 2 files changed, 7 insertions(+), 8 deletions(-)
arch/Config.in.mips +7 -0
index 1cce1710da..c08b2a2968 100644
@@ -7,9 +7,11 @@ config BR2_MIPS_CPU_MIPS32R2
 	select BR2_MIPS_NAN_LEGACY
 config BR2_MIPS_CPU_MIPS32R5
 	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_MIPS_CPU_MIPS32R6
 	bool
 	select BR2_MIPS_NAN_2008
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_MIPS_CPU_MIPS64
 	bool
 	select BR2_MIPS_NAN_LEGACY
@@ -18,9 +20,11 @@ config BR2_MIPS_CPU_MIPS64R2
 	select BR2_MIPS_NAN_LEGACY
 config BR2_MIPS_CPU_MIPS64R5
 	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_MIPS_CPU_MIPS64R6
 	bool
 	select BR2_MIPS_NAN_2008
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 
 choice
 	prompt "Target Architecture Variant"
@@ -53,11 +57,13 @@ config BR2_mips_interaptiv
 	bool "interAptiv"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R2
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_mips_m5150
 	bool "M5150"
 	depends on !BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS32R5
 	select BR2_MIPS_NAN_2008
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_mips_m6250
 	bool "M6250"
 	depends on !BR2_ARCH_IS_64
@@ -101,6 +107,7 @@ config BR2_mips_i6400
 	bool "I6400"
 	depends on BR2_ARCH_IS_64
 	select BR2_MIPS_CPU_MIPS64R6
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_mips_p6600
 	bool "P6600"
 	depends on BR2_ARCH_IS_64
package/gcc/Config.in.host +0 -8
index df836d96e4..8c07c29c2d 100644
@@ -28,12 +28,6 @@ config BR2_GCC_VERSION_4_9_X
 	# Broken or unsupported ARM cores
 	depends on !BR2_cortex_a17 && !BR2_cortex_a17_a7
 	depends on !BR2_cortex_a72 && !BR2_cortex_a72_a53
-	# Unsupported MIPS cores
-	depends on !BR2_mips_interaptiv
-	# Unsupported for MIPS R5
-	depends on !BR2_MIPS_CPU_MIPS32R5 && !BR2_MIPS_CPU_MIPS64R5
-	# Unsupported for MIPS R6
-	depends on !BR2_MIPS_CPU_MIPS32R6 && !BR2_MIPS_CPU_MIPS64R6
 	# musl microblaze unsupported
 	depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_microblazeel || BR2_microblazebe))
 	# musl ppc64 unsupported
@@ -51,8 +45,6 @@ config BR2_GCC_VERSION_5_X
 	depends on !BR2_cortex_a57_a53 && !BR2_cortex_a72_a53
 	# musl ppc64 unsupported
 	depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64le))
-	# Unsupported MIPS cores
-	depends on !BR2_mips_interaptiv && !BR2_mips_m5150 && !BR2_mips_i6400
 	# musl mips64 unsupported
 	depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_5
Signature · 1 line
2.11.0
#20 lore raw

PATCH 7/8 arch/arm: some variants need different gcc versions

In reply to Yann E. MORIN

Take the conditions currently specified in the gcc version choice.

Also, the conditions explained in the commit log for 78c2a9f7 were not all properly applied, especially the a57-a53 combo needs gcc-6, but 78c2a9f7 forgot to add the condition to gcc-4.9.

gcc-4.9 was excluded for cortex-a17 and a72, but the CodeSourcery external toolchain, which uses 4.8, was not excluded for those two cores. Now it is.

Remove the arch condition from gcc and the external toolchains.

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm                                                  | 6 ++++++
 package/gcc/Config.in.host                                          | 5 -----
 .../toolchain-external-codesourcery-arm/Config.in                   | 4 ----
 3 files changed, 6 insertions(+), 9 deletions(-)
arch/Config.in.arm +6 -0
index 09916df7ad..b58be6bce0 100644
@@ -190,6 +190,7 @@ config BR2_cortex_a15_a7
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a17
 	bool "cortex-A17"
@@ -199,6 +200,7 @@ config BR2_cortex_a17
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a17_a7
 	bool "cortex-A17/A7 big.LITTLE"
@@ -208,6 +210,7 @@ config BR2_cortex_a17_a7
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a53
 	bool "cortex-A53"
@@ -233,6 +236,7 @@ config BR2_cortex_a57_a53
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a72
 	bool "cortex-A72"
 	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
@@ -241,6 +245,7 @@ config BR2_cortex_a72
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_cortex_a72_a53
 	bool "cortex-A72/A53 big.LITTLE"
 	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
@@ -249,6 +254,7 @@ config BR2_cortex_a72_a53
 	select BR2_ARM_CPU_HAS_FP_ARMV8
 	select BR2_ARM_CPU_ARMV8
 	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_m3
 	bool "cortex-M3"
 	select BR2_ARM_CPU_HAS_THUMB2
package/gcc/Config.in.host +0 -5
index 8c07c29c2d..d8479008d8 100644
@@ -25,9 +25,6 @@ config BR2_GCC_VERSION_4_9_X
 	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	# Broken or unsupported architectures
 	depends on !BR2_arc && !BR2_or1k
-	# Broken or unsupported ARM cores
-	depends on !BR2_cortex_a17 && !BR2_cortex_a17_a7
-	depends on !BR2_cortex_a72 && !BR2_cortex_a72_a53
 	# musl microblaze unsupported
 	depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_microblazeel || BR2_microblazebe))
 	# musl ppc64 unsupported
@@ -41,8 +38,6 @@ config BR2_GCC_VERSION_5_X
 	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	# Broken or unsupported architectures
 	depends on !BR2_arc && !BR2_or1k
-	# Broken or unsupported ARM cores
-	depends on !BR2_cortex_a57_a53 && !BR2_cortex_a72_a53
 	# musl ppc64 unsupported
 	depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64le))
 	# musl mips64 unsupported
toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in +0 -4
index b91daa5c81..60d86c33d5 100644
@@ -2,10 +2,6 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_ARM
 	bool "Sourcery CodeBench ARM 2014.05"
 	depends on BR2_arm
 	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-	# a15/a7 appeared in gcc-4.9, a17/a7 in gcc-5, a57/a53 and a72/a53
-	# in gcc-6, or they each were broken earlier than that.
-	depends on !BR2_cortex_a15_a7 && !BR2_cortex_a17_a7
-	depends on !BR2_cortex_a57_53 && !BR2_cortex_a72_53
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_ARM_EABI
 	# Unsupported ARM cores
Signature · 1 line
2.11.0
#21 lore raw

PATCH 8/8 package/gcc: slight cleanup and reorg in remaining arch depends

In reply to Yann E. MORIN
Cc Thomas Petazzoni <[email protected]>
---
 package/gcc/Config.in.host | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)
package/gcc/Config.in.host +6 -7
index d8479008d8..4ceb5b18c7 100644
@@ -24,12 +24,11 @@ config BR2_GCC_VERSION_4_9_X
 	bool "gcc 4.9.x"
 	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	# Broken or unsupported architectures
-	depends on !BR2_arc && !BR2_or1k
-	# musl microblaze unsupported
+	depends on !BR2_arc
+	depends on !BR2_or1k
+	# musl on microblaze, ppc64 and mips64 unsupported
 	depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_microblazeel || BR2_microblazebe))
-	# musl ppc64 unsupported
 	depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64le))
-	# musl mips64 unsupported
 	depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
 
@@ -37,10 +36,10 @@ config BR2_GCC_VERSION_5_X
 	bool "gcc 5.x"
 	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 	# Broken or unsupported architectures
-	depends on !BR2_arc && !BR2_or1k
-	# musl ppc64 unsupported
+	depends on !BR2_arc
+	depends on !BR2_or1k
+	# musl on ppc64 and mips64 unsupported
 	depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_powerpc64 || BR2_powerpc64le))
-	# musl mips64 unsupported
 	depends on !(BR2_TOOLCHAIN_USES_MUSL && (BR2_mips64 || BR2_mips64el))
 	select BR2_TOOLCHAIN_GCC_AT_LEAST_5
 
Signature · 1 line
2.11.0
#22 lore raw

cover arch: fix MIPS NaN and floating-point handling

In reply to Yann E. MORIN

Hello All!

Not all architectures we support have support in upstream gcc, glibc, binutils, and/or linux. In some cases, only a few specific cores do not have that support.

Furthermore, some architecture, specific cores, or core behaviour/setup (like the MIPS NaN support) got support in a specific gcc version.

Currently, we have to account for this in at least four locations:
- the architecture
- the toolchain backend choice (internal or externsal)
- the gcc version choice
- each external toolchain

This third series fixes the way we handle NaN and floating point in the MIPS case.

Currently, they both depend on the gcc version. However, this is opposite what we usually do in Buildroot: we let the user select their hardware settings, and then limit the software list according to that which suports the user's hardware.

So, now that we have a mean for architectures to specify the minimum gcc version they require, we use that to limit the gcc version depending on the NaN and FP settings the user did set.

And this concludes this three-series series (a meta-series, made up of three series. It's series all the way down! Muahaha! ;-) )

Regards,
Yann E. MORIN.

The following changes since commit 41eeac74f986790fe26f03ebf05322120d2c04da

package/gcc: slight cleanup and reorg in remaining arch depends (2017-09-03 11:14:53 +0200)

are available in the git repository at:

git://git.buildroot.org/~ymorin/git/buildroot.git

for you to fetch changes up to a191b26508b5cddafe1059f13fcd2aa4b2ebd689

toolchain/buildroot: glibc requires header >= 4.5 with NaN-2008 (2017-09-03 11:49:02 +0200)

----------------------------------------------------------------
Yann E. MORIN (3):
arch/mips: inverse the NaN logic
arch/mips: inverse the mfpxx logic toolchain/buildroot: glibc requires header >= 4.5 with NaN-2008

 arch/Config.in.mips                     | 6 +++---
 package/gcc/gcc.mk                      | 2 ++
 toolchain/toolchain-buildroot/Config.in | 1 +
 toolchain/toolchain-common.in           | 4 ----
 4 files changed, 6 insertions(+), 7 deletions(-)
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#23 lore raw

PATCH 1/3 arch/mips: inverse the NaN logic

Currentlym the possibility to choose the NaN encoding is conditional to having a sufficiently recent gcc version.

Which means that the architecture selection depends on the gcc version.

But that's opposite to what we've always done in Buildroot: the software versions are conditional to the architecture options. There is nothing we can do about the hardware: it is there, we can't change it, while we can restrict ourselves to using software that is working on said hardware.

Thus, we inverse the logic, to move the condition onto the software
side: whenever NaN-2008 are selected, we restrict the toolchain selection to at least a gcc-4.9.

But now, the option with the NaN type is always set, so we must enclose the code in gcc.mk inside a HAS_NAN_OPTION condition, as is already done for the external toolchain case.

Cc Thomas Petazzoni <[email protected]>
Cc Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips | 2 +-
 package/gcc/gcc.mk  | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)
arch/Config.in.mips +1 -1
index c08b2a2968..13d1a477e6 100644
@@ -176,10 +176,10 @@ config BR2_MIPS_NAN_LEGACY
 
 config BR2_MIPS_NAN_2008
 	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 
 choice
 	prompt "Target NaN"
-	depends on BR2_TOOLCHAIN_HAS_MNAN_OPTION
 	depends on BR2_mips_32r5 || BR2_mips_64r5
 	default BR2_MIPS_ENABLE_NAN_2008
 	help
package/gcc/gcc.mk +2 -0
index 49ccccf56f..d45b6d7a06 100644
@@ -207,9 +207,11 @@ endif
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_ABI)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-abi=$(BR2_GCC_TARGET_ABI)
 endif
+ifeq ($(BR2_TOOLCHAIN_HAS_MNAN_OPTION),y)
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_NAN)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-nan=$(BR2_GCC_TARGET_NAN)
 endif
+endif
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_FP32_MODE)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-fp-32=$(BR2_GCC_TARGET_FP32_MODE)
 endif
Signature · 1 line
2.11.0
#24 lore raw

PATCH 1/3 arch/mips: inverse the NaN logic

Yann, All,

Le 03/09/2017 ? 11:53, Yann E. MORIN a ?crit?:

Quoted 32 lines

Currentlym the possibility to choose the NaN encoding is conditional to having a sufficiently recent gcc version.

Which means that the architecture selection depends on the gcc version.

But that's opposite to what we've always done in Buildroot: the software versions are conditional to the architecture options. There is nothing we can do about the hardware: it is there, we can't change it, while we can restrict ourselves to using software that is working on said hardware.

Thus, we inverse the logic, to move the condition onto the software
side: whenever NaN-2008 are selected, we restrict the toolchain selection to at least a gcc-4.9.

But now, the option with the NaN type is always set, so we must enclose the code in gcc.mk inside a HAS_NAN_OPTION condition, as is already done for the external toolchain case.

Cc Thomas Petazzoni <[email protected]>
Cc Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips | 2 +-
 package/gcc/gcc.mk  | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)
arch/Config.in.mips +0 -0
index c08b2a2968..13d1a477e6 100644

arch/Config.in.mips config BR2_MIPS_NAN_LEGACY · line 179

Quoted 4 lines
arch/Config.in.mips +1 -0
@@ -176,10 +176,10 @@ config BR2_MIPS_NAN_LEGACY
 
 config BR2_MIPS_NAN_2008
 	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9

This series require the previous series "arch: some require a minimal gcc version" adding this option.

Best regards,
Romain

Quoted 24 lines
arch/Config.in.mips +0 -1
 choice
 	prompt "Target NaN"
-	depends on BR2_TOOLCHAIN_HAS_MNAN_OPTION
 	depends on BR2_mips_32r5 || BR2_mips_64r5
 	default BR2_MIPS_ENABLE_NAN_2008
 	help
package/gcc/gcc.mk +2 -0
index 49ccccf56f..d45b6d7a06 100644
@@ -207,9 +207,11 @@ endif
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_ABI)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-abi=$(BR2_GCC_TARGET_ABI)
 endif
+ifeq ($(BR2_TOOLCHAIN_HAS_MNAN_OPTION),y)
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_NAN)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-nan=$(BR2_GCC_TARGET_NAN)
 endif
+endif
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_FP32_MODE)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-fp-32=$(BR2_GCC_TARGET_FP32_MODE)
 endif
#25 lore raw

PATCH 1/3 arch/mips: inverse the NaN logic

Romain, All,

On 2017-10-07 12:18 +0200, Romain Naour spake thusly:

Quoted 34 lines

Le 03/09/2017 ? 11:53, Yann E. MORIN a ?crit?:

Quoted 33 lines

Currentlym the possibility to choose the NaN encoding is conditional to having a sufficiently recent gcc version.

Which means that the architecture selection depends on the gcc version.

But that's opposite to what we've always done in Buildroot: the software versions are conditional to the architecture options. There is nothing we can do about the hardware: it is there, we can't change it, while we can restrict ourselves to using software that is working on said hardware.

Thus, we inverse the logic, to move the condition onto the software
side: whenever NaN-2008 are selected, we restrict the toolchain selection to at least a gcc-4.9.

But now, the option with the NaN type is always set, so we must enclose the code in gcc.mk inside a HAS_NAN_OPTION condition, as is already done for the external toolchain case.

Cc Thomas Petazzoni <[email protected]>
Cc Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips | 2 +-
 package/gcc/gcc.mk  | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)
arch/Config.in.mips +0 -0
index c08b2a2968..13d1a477e6 100644
@@ -176,10 +176,10 @@ config BR2_MIPS_NAN_LEGACY
 
Quoted 6 lines

arch/Config.in.mips config BR2_MIPS_NAN_LEGACY · line 179

Quoted 3 lines
arch/Config.in.mips +1 -0
 config BR2_MIPS_NAN_2008
 	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9

This series require the previous series "arch: some require a minimal gcc version" adding this option.

Yes, that's why the four series were replies one to the previous, so that they are correctly threaded in your MUA. As long as you use a decent MUA, that is. ;-]

Regards,
Yann E. MORIN.

Quoted 28 lines

Best regards,
Romain

Quoted 24 lines
arch/Config.in.mips +0 -1
 choice
 	prompt "Target NaN"
-	depends on BR2_TOOLCHAIN_HAS_MNAN_OPTION
 	depends on BR2_mips_32r5 || BR2_mips_64r5
 	default BR2_MIPS_ENABLE_NAN_2008
 	help
package/gcc/gcc.mk +2 -0
index 49ccccf56f..d45b6d7a06 100644
@@ -207,9 +207,11 @@ endif
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_ABI)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-abi=$(BR2_GCC_TARGET_ABI)
 endif
+ifeq ($(BR2_TOOLCHAIN_HAS_MNAN_OPTION),y)
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_NAN)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-nan=$(BR2_GCC_TARGET_NAN)
 endif
+endif
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_FP32_MODE)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-fp-32=$(BR2_GCC_TARGET_FP32_MODE)
 endif
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#26 lore raw

PATCH 1/3 arch/mips: inverse the NaN logic

Yann, All,

Le 07/10/2017 ? 14:22, Yann E. MORIN a ?crit?:

Quoted 44 lines

Romain, All,

On 2017-10-07 12:18 +0200, Romain Naour spake thusly:

Quoted 34 lines

Le 03/09/2017 ? 11:53, Yann E. MORIN a ?crit?:

Quoted 33 lines

Currentlym the possibility to choose the NaN encoding is conditional to having a sufficiently recent gcc version.

Which means that the architecture selection depends on the gcc version.

But that's opposite to what we've always done in Buildroot: the software versions are conditional to the architecture options. There is nothing we can do about the hardware: it is there, we can't change it, while we can restrict ourselves to using software that is working on said hardware.

Thus, we inverse the logic, to move the condition onto the software
side: whenever NaN-2008 are selected, we restrict the toolchain selection to at least a gcc-4.9.

But now, the option with the NaN type is always set, so we must enclose the code in gcc.mk inside a HAS_NAN_OPTION condition, as is already done for the external toolchain case.

Cc Thomas Petazzoni <[email protected]>
Cc Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips | 2 +-
 package/gcc/gcc.mk  | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)
arch/Config.in.mips +0 -0
index c08b2a2968..13d1a477e6 100644
@@ -176,10 +176,10 @@ config BR2_MIPS_NAN_LEGACY
 
Quoted 6 lines

arch/Config.in.mips config BR2_MIPS_NAN_LEGACY · line 179

Quoted 3 lines
arch/Config.in.mips +1 -0
 config BR2_MIPS_NAN_2008
 	bool
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9

This series require the previous series "arch: some require a minimal gcc version" adding this option.

Quoted 3 lines

Yes, that's why the four series were replies one to the previous, so that they are correctly threaded in your MUA. As long as you use a decent MUA, that is. ;-]

I'm only looking at the patchwork web interface and git pwc :p

Best regards,
Romain

Quoted 33 lines

Regards,
Yann E. MORIN.

Quoted 28 lines

Best regards,
Romain

Quoted 24 lines
arch/Config.in.mips +0 -1
 choice
 	prompt "Target NaN"
-	depends on BR2_TOOLCHAIN_HAS_MNAN_OPTION
 	depends on BR2_mips_32r5 || BR2_mips_64r5
 	default BR2_MIPS_ENABLE_NAN_2008
 	help
package/gcc/gcc.mk +2 -0
index 49ccccf56f..d45b6d7a06 100644
@@ -207,9 +207,11 @@ endif
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_ABI)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-abi=$(BR2_GCC_TARGET_ABI)
 endif
+ifeq ($(BR2_TOOLCHAIN_HAS_MNAN_OPTION),y)
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_NAN)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-nan=$(BR2_GCC_TARGET_NAN)
 endif
+endif
 ifneq ($(call qstrip,$(BR2_GCC_TARGET_FP32_MODE)),)
 HOST_GCC_COMMON_CONF_OPTS += --with-fp-32=$(BR2_GCC_TARGET_FP32_MODE)
 endif
#27 lore raw

PATCH 2/3 arch/mips: inverse the mfpxx logic

In reply to Yann E. MORIN

Currently, the possibility to choose the floating point mode (32, xx or
64) is conditional on having a sufficiently recent gcc version.

Which means that the architecture selection depends on the gcc version.

But that's opposite to what we've always done in Buildroot: the software versions are conditional to the architecture options. There is nothing we can do about the hardware: it is there, we can't change it, while we can restrict ourselves to using software that is working on said hardware.

Thus, we inverse the logic, to move the condition onto the software
side: whenever mfpxx is selected, we restrict the toolchain selection to at least a gcc-5.

And now, the blind BR2_TOOLCHAIN_HAS_MFPXX_OPTION symbol is no longer needed, so we get rid of it.

Cc Thomas Petazzoni <[email protected]>
Cc Vicente Olivert Riera <[email protected]>
---
 arch/Config.in.mips           | 4 ++--
 toolchain/toolchain-common.in | 4 ----
 2 files changed, 2 insertions(+), 6 deletions(-)
arch/Config.in.mips +2 -2
index 13d1a477e6..f8e57bab33 100644
@@ -146,7 +146,7 @@ config BR2_MIPS_SOFT_FLOAT
 choice
 	prompt "FP mode"
 	depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT
-	default BR2_MIPS_FP32_MODE_XX if BR2_TOOLCHAIN_HAS_MFPXX_OPTION
+	default BR2_MIPS_FP32_MODE_XX
 	help
 	  MIPS32 supports different FP modes (32,xx,64). Information about FP
 	  modes can be found here:
@@ -159,7 +159,7 @@ config BR2_MIPS_FP32_MODE_32
 
 config BR2_MIPS_FP32_MODE_XX
 	bool "xx"
-	depends on BR2_TOOLCHAIN_HAS_MFPXX_OPTION
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 
 config BR2_MIPS_FP32_MODE_64
 	bool "64"
toolchain/toolchain-common.in +0 -4
index dd192b9ba4..0002682e12 100644
@@ -346,10 +346,6 @@ config BR2_TOOLCHAIN_HAS_MNAN_OPTION
 	bool
 	default y if BR2_TOOLCHAIN_GCC_AT_LEAST_4_9
 
-config BR2_TOOLCHAIN_HAS_MFPXX_OPTION
-	bool
-	default y if BR2_TOOLCHAIN_GCC_AT_LEAST_5
-
 config BR2_TOOLCHAIN_HAS_SYNC_1
 	bool
 	default y
Signature · 1 line
2.11.0
#28 lore raw

PATCH 3/3 toolchain/buildroot: glibc requires header >= 4.5 with NaN-2008

In reply to Yann E. MORIN
Cc Thomas Petazzoni <[email protected]>
Cc Romain Naour <[email protected]>
Cc Vicente Olivert Riera <[email protected]>
---
 toolchain/toolchain-buildroot/Config.in | 1 +
 1 file changed, 1 insertion(+)
toolchain/toolchain-buildroot/Config.in +1 -0
index f47001fcf6..94bf1d7a09 100644
@@ -51,6 +51,7 @@ config BR2_TOOLCHAIN_BUILDROOT_GLIBC
 	depends on BR2_USE_MMU
 	depends on !BR2_STATIC_LIBS
 	depends on BR2_TOOLCHAIN_HEADERS_AT_LEAST_3_2
+	depends on BR2_TOOLCHAIN_HEADERS_AT_LEAST_4_5 || !BR2_MIPS_NAN_2008
 	depends on !BR2_powerpc_SPE
 	select BR2_TOOLCHAIN_USES_GLIBC
 	# our glibc.mk enables RPC support
Signature · 1 line
2.11.0
#29 lore raw

[Buildroot] [pull request] arch/arm: add some new armv8a cores

In reply to Yann E. MORIN

Hello All!

This series adds all the armv8a cores currently known to any released version of gcc.

First, we do a bit of cleanups in the existing menu: re-order the cores, simplify hiding non-64-bit cores, rename armv8 to armv8a.

Second, as all armv8a cores are guaranteed by the ISA to have a VFPv4, we disallow building a soft-float toolchain on those cores when in 64-bit mode.

Now we add a bunch of armv8a cores, cortex and non-cortex alike, with a few armv8.1a variants as well.

It is to be noted that we do have at least one armv8a core that is in fact 32-bit only, while we also do have a few armv8a cores that are 64-bit only (or at least gcc does not recognises them in arm mode).

Eventually, we add a build-only test for all those toolchains, to check that at least the toolchains do build. This final commit is not meant to be applied, it adds way too many tests.

This series relies on the previous architecture series I've recently sent:

    http://lists.busybox.net/pipermail/buildroot/2017-September/201403.html
    http://lists.busybox.net/pipermail/buildroot/2017-September/201409.html

Regards,
Yann E. MORIN.

PS. I've sent this series as a real pull-request, just to see how the new patchwork handles it: currently, series are sorted by the first patch, and patchwork misses the cover-letter. Let's see if a cover-letter that is a pull-request gets noticed.

The following changes since commit 41eeac74f986790fe26f03ebf05322120d2c04da

package/gcc: slight cleanup and reorg in remaining arch depends (2017-09-03 11:14:53 +0200)

are available in the git repository at:

git://git.buildroot.org/~ymorin/git/buildroot.git

for you to fetch changes up to a876f6b64754ba3b96492c57b18654f8ec465ca0

[DON'T COMMIT] tests for all new arm cores (2017-09-03 15:02:47 +0200)

----------------------------------------------------------------
Yann E. MORIN (9):
arch/arm: re-order cores choice arch/arm: simplify hiding non 64-bit cores arch/arm: armv8 is really armv8a arch/arm: do not allow soft-float for armv8a arch/arm: add cortex-A32
arch/arm: add some armv8a cortex variants arch/arm: add some non-cortex armv8a cores arch/arm: add armv8.1a cores
[DON'T COMMIT] tests for all new arm cores

 arch/Config.in.arm                                 | 297 ++++++++++++++++-----
 package/pkg-cmake.mk                               |   2 +-
 .../tests/toolchain/test_internal_aarch64_all.py   | 162 +++++++++++
 .../tests/toolchain/test_internal_arm_all.py       |  95 +++++++
 .../toolchain-external-codesourcery-arm/Config.in  |   2 +-
 .../toolchain-external-linaro-arm/Config.in        |   2 +-
 .../toolchain-external-linaro-armeb/Config.in      |   2 +-
 7 files changed, 489 insertions(+), 73 deletions(-)
 create mode 100644 support/testing/tests/toolchain/test_internal_aarch64_all.py
 create mode 100644 support/testing/tests/toolchain/test_internal_arm_all.py
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#30 lore raw

PATCH 1/9 arch/arm: re-order cores choice

Currently, the logic for ordering the ARM cores in the choice is all but obvious. ;-)

Reorder the choice by architecture generation, starting with armv4, ending with armv8.

Add a comment before each generation, just for ease of use. Add a separate comment for armv7a and armv7m.

Finally, order cores alphabetically inside the same generation (except for armv7m cores, listed after all armv7a cores.)

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm | 116 +++++++++++++++++++++++++++++++----------------------
 1 file changed, 69 insertions(+), 47 deletions(-)
arch/Config.in.arm +69 -47
index b58be6bce0..66dce3a562 100644
@@ -68,6 +68,8 @@ choice
 	help
 	  Specific CPU variant to use
 
+comment "armv4 cores"
+	depends on !BR2_ARCH_IS_64
 config BR2_arm920t
 	bool "arm920t"
 	select BR2_ARM_CPU_HAS_ARM
@@ -82,6 +84,21 @@ config BR2_arm922t
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	depends on !BR2_ARCH_IS_64
+config BR2_fa526
+	bool "fa526/626"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
+config BR2_strongarm
+	bool "strongarm sa110/sa1100"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_ARMV4
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
+
+comment "armv5 cores"
+	depends on !BR2_ARCH_IS_64
 config BR2_arm926t
 	bool "arm926t"
 	select BR2_ARM_CPU_HAS_ARM
@@ -90,6 +107,22 @@ config BR2_arm926t
 	select BR2_ARM_CPU_ARMV5
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	depends on !BR2_ARCH_IS_64
+config BR2_iwmmxt
+	bool "iwmmxt"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_ARMV5
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
+config BR2_xscale
+	bool "xscale"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_HAS_THUMB
+	select BR2_ARM_CPU_ARMV5
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
+
+comment "armv6 cores"
+	depends on !BR2_ARCH_IS_64
 config BR2_arm1136j_s
 	bool "arm1136j-s"
 	select BR2_ARM_CPU_HAS_ARM
@@ -128,6 +161,9 @@ config BR2_arm11mpcore
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	depends on !BR2_ARCH_IS_64
+
+comment "armv7a cores"
+	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a5
 	bool "cortex-A5"
 	select BR2_ARM_CPU_HAS_ARM
@@ -212,6 +248,28 @@ config BR2_cortex_a17_a7
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 	depends on !BR2_ARCH_IS_64
+config BR2_pj4
+	bool "pj4"
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_HAS_VFPV3
+	select BR2_ARM_CPU_ARMV7A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	depends on !BR2_ARCH_IS_64
+
+comment "armv7m cores"
+	depends on !BR2_ARCH_IS_64
+config BR2_cortex_m3
+	bool "cortex-M3"
+	select BR2_ARM_CPU_HAS_THUMB2
+	select BR2_ARM_CPU_ARMV7M
+	depends on !BR2_ARCH_IS_64
+config BR2_cortex_m4
+	bool "cortex-M4"
+	select BR2_ARM_CPU_HAS_THUMB2
+	select BR2_ARM_CPU_ARMV7M
+	depends on !BR2_ARCH_IS_64
+
+comment "armv8 cores"
 config BR2_cortex_a53
 	bool "cortex-A53"
 	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
@@ -255,48 +313,6 @@ config BR2_cortex_a72_a53
 	select BR2_ARM_CPU_ARMV8
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
-config BR2_cortex_m3
-	bool "cortex-M3"
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7M
-	depends on !BR2_ARCH_IS_64
-config BR2_cortex_m4
-	bool "cortex-M4"
-	select BR2_ARM_CPU_HAS_THUMB2
-	select BR2_ARM_CPU_ARMV7M
-	depends on !BR2_ARCH_IS_64
-config BR2_fa526
-	bool "fa526/626"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV4
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
-config BR2_pj4
-	bool "pj4"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_VFPV3
-	select BR2_ARM_CPU_ARMV7A
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
-config BR2_strongarm
-	bool "strongarm sa110/sa1100"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV4
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
-config BR2_xscale
-	bool "xscale"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_HAS_THUMB
-	select BR2_ARM_CPU_ARMV5
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
-config BR2_iwmmxt
-	bool "iwmmxt"
-	select BR2_ARM_CPU_HAS_ARM
-	select BR2_ARM_CPU_ARMV5
-	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 endchoice
 
 config BR2_ARM_ENABLE_NEON
@@ -551,15 +567,23 @@ config BR2_ENDIAN
 	default "BIG"	 if (BR2_armeb || BR2_aarch64_be)
 
 config BR2_GCC_TARGET_CPU
+	# armv4
 	default "arm920t"	if BR2_arm920t
 	default "arm922t"	if BR2_arm922t
+	default "fa526"		if BR2_fa526
+	default "strongarm"	if BR2_strongarm
+	# armv5
 	default "arm926ej-s"	if BR2_arm926t
+	default "iwmmxt"	if BR2_iwmmxt
+	default "xscale"	if BR2_xscale
+	# armv6
 	default "arm1136j-s"	if BR2_arm1136j_s
 	default "arm1136jf-s"	if BR2_arm1136jf_s
 	default "arm1176jz-s"	if BR2_arm1176jz_s
 	default "arm1176jzf-s"	if BR2_arm1176jzf_s
 	default "mpcore"	if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2
 	default "mpcorenovfp"	if BR2_arm11mpcore
+	# armv7a
 	default "cortex-a5"	if BR2_cortex_a5
 	default "cortex-a7"	if BR2_cortex_a7
 	default "cortex-a8"	if BR2_cortex_a8
@@ -569,13 +593,11 @@ config BR2_GCC_TARGET_CPU
 	default "cortex-a15.cortex-a7"	if BR2_cortex_a15_a7
 	default "cortex-a17"	if BR2_cortex_a17
 	default "cortex-a17.cortex-a7"	if BR2_cortex_a17_a7
+	default "marvell-pj4"	if BR2_pj4
+	# armv7m
 	default "cortex-m3"	if BR2_cortex_m3
 	default "cortex-m4"	if BR2_cortex_m4
-	default "fa526"		if BR2_fa526
-	default "marvell-pj4"	if BR2_pj4
-	default "strongarm"	if BR2_strongarm
-	default "xscale"	if BR2_xscale
-	default "iwmmxt"	if BR2_iwmmxt
+	# armv8
 	default "cortex-a53"	if BR2_cortex_a53
 	default "cortex-a57"	if BR2_cortex_a57
 	default "cortex-a57.cortex-a53"	if BR2_cortex_a57_a53
Signature · 1 line
2.11.0
#31 lore raw

PATCH 2/9 arch/arm: simplify hiding non 64-bit cores

In reply to Yann E. MORIN

Now that the cores are all oredered correctly, we can just enclose all the non 64-bit cores inside a big if-block, rather than have each of them have the dependency.

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm | 31 ++-----------------------------
 1 file changed, 2 insertions(+), 29 deletions(-)
arch/Config.in.arm +2 -29
index 66dce3a562..c2b7931528 100644
@@ -68,37 +68,32 @@ choice
 	help
 	  Specific CPU variant to use
 
+if !BR2_ARCH_IS_64
 comment "armv4 cores"
-	depends on !BR2_ARCH_IS_64
 config BR2_arm920t
 	bool "arm920t"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm922t
 	bool "arm922t"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_fa526
 	bool "fa526/626"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_strongarm
 	bool "strongarm sa110/sa1100"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV4
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 
 comment "armv5 cores"
-	depends on !BR2_ARCH_IS_64
 config BR2_arm926t
 	bool "arm926t"
 	select BR2_ARM_CPU_HAS_ARM
@@ -106,30 +101,25 @@ config BR2_arm926t
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_iwmmxt
 	bool "iwmmxt"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_ARMV5
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_xscale
 	bool "xscale"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV5
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 
 comment "armv6 cores"
-	depends on !BR2_ARCH_IS_64
 config BR2_arm1136j_s
 	bool "arm1136j-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm1136jf_s
 	bool "arm1136jf-s"
 	select BR2_ARM_CPU_HAS_ARM
@@ -137,14 +127,12 @@ config BR2_arm1136jf_s
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm1176jz_s
 	bool "arm1176jz-s"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm1176jzf_s
 	bool "arm1176jzf-s"
 	select BR2_ARM_CPU_HAS_ARM
@@ -152,7 +140,6 @@ config BR2_arm1176jzf_s
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_arm11mpcore
 	bool "mpcore"
 	select BR2_ARM_CPU_HAS_ARM
@@ -160,10 +147,8 @@ config BR2_arm11mpcore
 	select BR2_ARM_CPU_HAS_THUMB
 	select BR2_ARM_CPU_ARMV6
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 
 comment "armv7a cores"
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a5
 	bool "cortex-A5"
 	select BR2_ARM_CPU_HAS_ARM
@@ -172,7 +157,6 @@ config BR2_cortex_a5
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a7
 	bool "cortex-A7"
 	select BR2_ARM_CPU_HAS_ARM
@@ -181,7 +165,6 @@ config BR2_cortex_a7
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a8
 	bool "cortex-A8"
 	select BR2_ARM_CPU_HAS_ARM
@@ -190,7 +173,6 @@ config BR2_cortex_a8
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a9
 	bool "cortex-A9"
 	select BR2_ARM_CPU_HAS_ARM
@@ -199,7 +181,6 @@ config BR2_cortex_a9
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a12
 	bool "cortex-A12"
 	select BR2_ARM_CPU_HAS_ARM
@@ -208,7 +189,6 @@ config BR2_cortex_a12
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a15
 	bool "cortex-A15"
 	select BR2_ARM_CPU_HAS_ARM
@@ -217,7 +197,6 @@ config BR2_cortex_a15
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a15_a7
 	bool "cortex-A15/A7 big.LITTLE"
 	select BR2_ARM_CPU_HAS_ARM
@@ -227,7 +206,6 @@ config BR2_cortex_a15_a7
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a17
 	bool "cortex-A17"
 	select BR2_ARM_CPU_HAS_ARM
@@ -237,7 +215,6 @@ config BR2_cortex_a17
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_a17_a7
 	bool "cortex-A17/A7 big.LITTLE"
 	select BR2_ARM_CPU_HAS_ARM
@@ -247,27 +224,23 @@ config BR2_cortex_a17_a7
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
-	depends on !BR2_ARCH_IS_64
 config BR2_pj4
 	bool "pj4"
 	select BR2_ARM_CPU_HAS_ARM
 	select BR2_ARM_CPU_HAS_VFPV3
 	select BR2_ARM_CPU_ARMV7A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
-	depends on !BR2_ARCH_IS_64
 
 comment "armv7m cores"
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_m3
 	bool "cortex-M3"
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7M
-	depends on !BR2_ARCH_IS_64
 config BR2_cortex_m4
 	bool "cortex-M4"
 	select BR2_ARM_CPU_HAS_THUMB2
 	select BR2_ARM_CPU_ARMV7M
-	depends on !BR2_ARCH_IS_64
+endif # !BR2_ARCH_IS_64
 
 comment "armv8 cores"
 config BR2_cortex_a53
Signature · 1 line
2.11.0
#32 lore raw

PATCH 3/9 arch/arm: armv8 is really armv8a

In reply to Yann E. MORIN

For armv8, there are different profiles: A, M and R, like there is for armv7.

So, rename our internal symbol to mirror what we do for armv7.

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm                                         | 14 +++++++-------
 package/pkg-cmake.mk                                       |  2 +-
 .../toolchain-external-codesourcery-arm/Config.in          |  2 +-
 .../toolchain-external-linaro-arm/Config.in                |  2 +-
 .../toolchain-external-linaro-armeb/Config.in              |  2 +-
 5 files changed, 11 insertions(+), 11 deletions(-)
arch/Config.in.arm +7 -7
index c2b7931528..d110d52e2d 100644
@@ -59,7 +59,7 @@ config BR2_ARM_CPU_ARMV7A
 config BR2_ARM_CPU_ARMV7M
 	bool
 
-config BR2_ARM_CPU_ARMV8
+config BR2_ARM_CPU_ARMV8A
 	bool
 
 choice
@@ -249,7 +249,7 @@ config BR2_cortex_a53
 	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8
+	select BR2_ARM_CPU_ARMV8A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a57
 	bool "cortex-A57"
@@ -257,7 +257,7 @@ config BR2_cortex_a57
 	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8
+	select BR2_ARM_CPU_ARMV8A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 config BR2_cortex_a57_a53
 	bool "cortex-A57/A53 big.LITTLE"
@@ -265,7 +265,7 @@ config BR2_cortex_a57_a53
 	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8
+	select BR2_ARM_CPU_ARMV8A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a72
@@ -274,7 +274,7 @@ config BR2_cortex_a72
 	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8
+	select BR2_ARM_CPU_ARMV8A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 config BR2_cortex_a72_a53
@@ -283,7 +283,7 @@ config BR2_cortex_a72_a53
 	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
 	select BR2_ARM_CPU_HAS_FP_ARMV8
-	select BR2_ARM_CPU_ARMV8
+	select BR2_ARM_CPU_ARMV8A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 endchoice
@@ -570,7 +570,7 @@ config BR2_GCC_TARGET_CPU
 	# armv7m
 	default "cortex-m3"	if BR2_cortex_m3
 	default "cortex-m4"	if BR2_cortex_m4
-	# armv8
+	# armv8a
 	default "cortex-a53"	if BR2_cortex_a53
 	default "cortex-a57"	if BR2_cortex_a57
 	default "cortex-a57.cortex-a53"	if BR2_cortex_a57_a53
package/pkg-cmake.mk +1 -1
index db78d897d8..6739704e3c 100644
@@ -224,7 +224,7 @@ else ifeq ($(BR2_ARM_CPU_ARMV6),y)
 CMAKE_SYSTEM_PROCESSOR_ARM_VARIANT = armv6
 else ifeq ($(BR2_ARM_CPU_ARMV7A),y)
 CMAKE_SYSTEM_PROCESSOR_ARM_VARIANT = armv7
-else ifeq ($(BR2_ARM_CPU_ARMV8),y)
+else ifeq ($(BR2_ARM_CPU_ARMV8A),y)
 CMAKE_SYSTEM_PROCESSOR_ARM_VARIANT = armv8
 endif
 
toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in +1 -1
index 60d86c33d5..bdbe2acaea 100644
@@ -5,7 +5,7 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_ARM
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_ARM_EABI
 	# Unsupported ARM cores
-	depends on !BR2_cortex_a12 && !BR2_cortex_a17 && !BR2_ARM_CPU_ARMV8
+	depends on !BR2_cortex_a12 && !BR2_cortex_a17 && !BR2_ARM_CPU_ARMV8A
 	depends on !BR2_STATIC_LIBS
 	select BR2_TOOLCHAIN_EXTERNAL_GLIBC
 	select BR2_TOOLCHAIN_HAS_SSP
toolchain/toolchain-external/toolchain-external-linaro-arm/Config.in +1 -1
index f5bbbaaad8..51604d9dde 100644
@@ -8,7 +8,7 @@ config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARM
 	bool "Linaro ARM 2017.02"
 	depends on BR2_arm
 	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-	depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8
+	depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8A
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_ARM_EABIHF
 	depends on !BR2_STATIC_LIBS
toolchain/toolchain-external/toolchain-external-linaro-armeb/Config.in +1 -1
index 64e97eeea7..2f01f6994f 100644
@@ -8,7 +8,7 @@ config BR2_TOOLCHAIN_EXTERNAL_LINARO_ARMEB
 	bool "Linaro armeb 2017.02"
 	depends on BR2_armeb
 	depends on !BR2_ARCH_NEEDS_GCC_AT_LEAST_7
-	depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8
+	depends on BR2_ARM_CPU_ARMV7A || BR2_ARM_CPU_ARMV8A
 	depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86"
 	depends on BR2_ARM_EABIHF
 	depends on !BR2_STATIC_LIBS
Signature · 1 line
2.11.0
#33 lore raw

PATCH 4/9 arch/arm: do not allow soft-float for armv8a

In reply to Yann E. MORIN

armv8a has made VFPv4 and NEON mandatory, so there is no point in allowing software floating point, even in 32-bit mode.

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm | 1 +
 1 file changed, 1 insertion(+)
arch/Config.in.arm +1 -0
index d110d52e2d..0ae6a16a0a 100644
@@ -374,6 +374,7 @@ choice
 config BR2_ARM_SOFT_FLOAT
 	bool "Soft float"
 	depends on BR2_ARM_EABI
+	depends on !BR2_ARM_CPU_ARMV8A
 	select BR2_SOFT_FLOAT
 	help
 	  This option allows to use software emulated floating
Signature · 1 line
2.11.0
#34 lore raw

PATCH 4/9 arch/arm: do not allow soft-float for armv8a

Thomas, All,

On 2017-09-03 15:17 +0200, Yann E. MORIN spake thusly:

Quoted 2 lines

armv8a has made VFPv4 and NEON mandatory, so there is no point in allowing software floating point, even in 32-bit mode.

In fact, even though I'm pretty sure that OK in 64-bit, we might still have a reason to do soft-float in 32-bit mode, if only for legacy binary-only applications that were built as soft-float way back in the (not so) good old days...

In which case, we should instead depend on !BR2_ARCH_IS_64.

Thoughts?

Regards,
Yann E. MORIN.

Quoted 21 lines
Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm | 1 +
 1 file changed, 1 insertion(+)
arch/Config.in.arm +1 -0
index d110d52e2d..0ae6a16a0a 100644
@@ -374,6 +374,7 @@ choice
 config BR2_ARM_SOFT_FLOAT
 	bool "Soft float"
 	depends on BR2_ARM_EABI
+	depends on !BR2_ARM_CPU_ARMV8A
 	select BR2_SOFT_FLOAT
 	help
 	  This option allows to use software emulated floating
Signature · 1 line
2.11.0
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#35 lore raw

PATCH 4/9 arch/arm: do not allow soft-float for armv8a

Hello,

Quoted 6 lines · Yann E. MORIN

Thomas, All,

On 2017-09-03 15:17 +0200, Yann E. MORIN spake thusly:

Quoted 2 lines

armv8a has made VFPv4 and NEON mandatory, so there is no point in allowing software floating point, even in 32-bit mode.

Quoted 8 lines

In fact, even though I'm pretty sure that OK in 64-bit, we might still have a reason to do soft-float in 32-bit mode, if only for legacy binary-only applications that were built as soft-float way back in the (not so) good old days...

In which case, we should instead depend on !BR2_ARCH_IS_64.

Thoughts?

I'm hesitating on this one. I believe the use-case you mention makes sense, however I believe that it can still be supported with your proposed patch.

Indeed, even if you want to run a binary-only soft-float application, it doesn't prevent the rest of your system from using VFP, as long as you use EABI (and not EABIhf).

The whole reason why EABI passes floating-point arguments into integer registers is precisely to allow compatibility between soft-float code and hard-float code. Thanks to that, a soft-float function can call a hard-float function, and vice-versa.

Therefore, even if you have a binary-only soft-float application, there is really no reason to build the entire system soft-float.

So, I think your original patch is OK as-is. However, I still see one inconsistent thing: if we disallow soft-float because ARMv8-A mandates VFPv4, why would we allow soft-float for ARMv7-A cores that have a VFP ? To be consistent, we should also disallow soft-float.

Another way to think about this is: is it possible to build an AArch64 soft-float system? do we want to allow the user to select what is *possible* or what makes sense?

Best regards,

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#36 lore raw

PATCH 4/9 arch/arm: do not allow soft-float for armv8a

Quoted 34 lines · Thomas Petazzoni

Hello,

Quoted 6 lines · Yann E. MORIN

Thomas, All,

On 2017-09-03 15:17 +0200, Yann E. MORIN spake thusly:

Quoted 2 lines

armv8a has made VFPv4 and NEON mandatory, so there is no point in allowing software floating point, even in 32-bit mode.

Quoted 8 lines

In fact, even though I'm pretty sure that OK in 64-bit, we might still have a reason to do soft-float in 32-bit mode, if only for legacy binary-only applications that were built as soft-float way back in the (not so) good old days...

In which case, we should instead depend on !BR2_ARCH_IS_64.

Thoughts?

I'm hesitating on this one. I believe the use-case you mention makes sense, however I believe that it can still be supported with your proposed patch.

Indeed, even if you want to run a binary-only soft-float application, it doesn't prevent the rest of your system from using VFP, as long as you use EABI (and not EABIhf).

The whole reason why EABI passes floating-point arguments into integer registers is precisely to allow compatibility between soft-float code and hard-float code. Thanks to that, a soft-float function can call a hard-float function, and vice-versa.

Therefore, even if you have a binary-only soft-float application, there is really no reason to build the entire system soft-float.

Quoted 8 lines

So, I think your original patch is OK as-is. However, I still see one inconsistent thing: if we disallow soft-float because ARMv8-A mandates VFPv4, why would we allow soft-float for ARMv7-A cores that have a VFP ? To be consistent, we should also disallow soft-float.

Another way to think about this is: is it possible to build an AArch64 soft-float system? do we want to allow the user to select what is *possible* or what makes sense?

gcc aarch64 doesn't have a float-abi option, so no it's not possible to build
with soft-float. So the depends on BR2_ARM_EABI is certainly needed.

That said, I don't think it makes a lot of sense to add extra 'depends on'
lines just to avoid that the user would select an option that probably doesn't make sense. We already make sure that the default is appropriate. Let's not make our life more difficult.

So I'd say: reject this patch.

Regards,
Arnout

Signature · 6 lines
Arnout Vandecappelle                          arnout at mind be
Senior Embedded Software Architect            +32-16-286500
Essensium/Mind                                http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium           BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint:  7493 020B C7E3 8618 8DEC 222C 82EB F404 F9AC 0DDF
#37 lore raw

PATCH 4/9 arch/arm: do not allow soft-float for armv8a

Arnout, All,

On 2017-11-25 18:10 +0100, Arnout Vandecappelle spake thusly:

Quoted 40 lines · Thomas Petazzoni
Quoted 39 lines

Hello,

Quoted 6 lines · Yann E. MORIN

Thomas, All,

On 2017-09-03 15:17 +0200, Yann E. MORIN spake thusly:

Quoted 2 lines

armv8a has made VFPv4 and NEON mandatory, so there is no point in allowing software floating point, even in 32-bit mode.

Quoted 8 lines

In fact, even though I'm pretty sure that OK in 64-bit, we might still have a reason to do soft-float in 32-bit mode, if only for legacy binary-only applications that were built as soft-float way back in the (not so) good old days...

In which case, we should instead depend on !BR2_ARCH_IS_64.

Thoughts?

I'm hesitating on this one. I believe the use-case you mention makes sense, however I believe that it can still be supported with your proposed patch.

Indeed, even if you want to run a binary-only soft-float application, it doesn't prevent the rest of your system from using VFP, as long as you use EABI (and not EABIhf).

The whole reason why EABI passes floating-point arguments into integer registers is precisely to allow compatibility between soft-float code and hard-float code. Thanks to that, a soft-float function can call a hard-float function, and vice-versa.

Therefore, even if you have a binary-only soft-float application, there is really no reason to build the entire system soft-float.

So, I think your original patch is OK as-is. However, I still see one inconsistent thing: if we disallow soft-float because ARMv8-A mandates VFPv4, why would we allow soft-float for ARMv7-A cores that have a VFP ? To be consistent, we should also disallow soft-float.

Quoted 5 lines
Quoted 3 lines

Another way to think about this is: is it possible to build an AArch64 soft-float system? do we want to allow the user to select what is *possible* or what makes sense?

gcc aarch64

It's not about aarch64, it's about aarch32, i.e. an armv8a core running in 32-bit mode.

Quoted 7 lines

doesn't have a float-abi option, so no it's not possible to build with soft-float. So the depends on BR2_ARM_EABI is certainly needed.

That said, I don't think it makes a lot of sense to add extra 'depends on'
lines just to avoid that the user would select an option that probably doesn't make sense. We already make sure that the default is appropriate. Let's not make our life more difficult.

It's not about making *our* lives more dificult or easier. It's about making the user's lives easier.

If there is a prompt that offers an option, but that has no impact on the resulting output, then that prompt should not exist. Otherwise, it is very confusing.

Regards,
Yann E. MORIN.

Quoted 13 lines

So I'd say: reject this patch.

Regards,
Arnout

Signature · 6 lines
Arnout Vandecappelle                          arnout at mind be
Senior Embedded Software Architect            +32-16-286500
Essensium/Mind                                http://www.mind.be
G.Geenslaan 9, 3001 Leuven, Belgium           BE 872 984 063 RPR Leuven
LinkedIn profile: http://www.linkedin.com/in/arnoutvandecappelle
GPG fingerprint:  7493 020B C7E3 8618 8DEC 222C 82EB F404 F9AC 0DDF
Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#38 lore raw

PATCH 4/9 arch/arm: do not allow soft-float for armv8a

Arnout, Thomas, All,

On 2017-11-26 12:12 +0100, Yann E. MORIN spake thusly:

Quoted 56 lines

On 2017-11-25 18:10 +0100, Arnout Vandecappelle spake thusly:

Quoted 38 lines · Thomas Petazzoni
Quoted 37 lines · Yann E. MORIN
Quoted 6 lines

Thomas, All,

On 2017-09-03 15:17 +0200, Yann E. MORIN spake thusly:

Quoted 2 lines

armv8a has made VFPv4 and NEON mandatory, so there is no point in allowing software floating point, even in 32-bit mode.

Quoted 8 lines

In fact, even though I'm pretty sure that OK in 64-bit, we might still have a reason to do soft-float in 32-bit mode, if only for legacy binary-only applications that were built as soft-float way back in the (not so) good old days...

In which case, we should instead depend on !BR2_ARCH_IS_64.

Thoughts?

I'm hesitating on this one. I believe the use-case you mention makes sense, however I believe that it can still be supported with your proposed patch.

Indeed, even if you want to run a binary-only soft-float application, it doesn't prevent the rest of your system from using VFP, as long as you use EABI (and not EABIhf).

The whole reason why EABI passes floating-point arguments into integer registers is precisely to allow compatibility between soft-float code and hard-float code. Thanks to that, a soft-float function can call a hard-float function, and vice-versa.

Therefore, even if you have a binary-only soft-float application, there is really no reason to build the entire system soft-float.

So, I think your original patch is OK as-is. However, I still see one inconsistent thing: if we disallow soft-float because ARMv8-A mandates VFPv4, why would we allow soft-float for ARMv7-A cores that have a VFP ? To be consistent, we should also disallow soft-float.

Quoted 5 lines
Quoted 3 lines

Another way to think about this is: is it possible to build an AArch64 soft-float system? do we want to allow the user to select what is *possible* or what makes sense?

gcc aarch64

It's not about aarch64, it's about aarch32, i.e. an armv8a core running in 32-bit mode.

Quoted 7 lines

doesn't have a float-abi option, so no it's not possible to build with soft-float. So the depends on BR2_ARM_EABI is certainly needed.

That said, I don't think it makes a lot of sense to add extra 'depends on'
lines just to avoid that the user would select an option that probably doesn't make sense. We already make sure that the default is appropriate. Let's not make our life more difficult.

Quoted 6 lines

It's not about making *our* lives more dificult or easier. It's about making the user's lives easier.

If there is a prompt that offers an option, but that has no impact on the resulting output, then that prompt should not exist. Otherwise, it is very confusing.

Damned, I hadn't finished my mail...

Quoted 1 line
Quoted 1 line

So I'd say: reject this patch.

But seeing the argument from Thomas, yes it does not make sense to hide soft-float anyway.

Regards,
Yann E. MORIN.

Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#39 lore raw

PATCH 5/9 arch/arm: add cortex-A32

In reply to Yann E. MORIN

The cortex-A32 is an armv8a core, but it lacks the optional AArch64 extensions, so can only work in 32-bit mode.

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm | 11 +++++++++++
 1 file changed, 11 insertions(+)
arch/Config.in.arm +11 -0
index 0ae6a16a0a..0304929ba1 100644
@@ -243,6 +243,16 @@ config BR2_cortex_m4
 endif # !BR2_ARCH_IS_64
 
 comment "armv8 cores"
+config BR2_cortex_a32
+	bool "cortex-A32"
+	depends on !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_ARM
+	select BR2_ARM_CPU_HAS_NEON
+	select BR2_ARM_CPU_HAS_THUMB2
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a53
 	bool "cortex-A53"
 	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
@@ -572,6 +582,7 @@ config BR2_GCC_TARGET_CPU
 	default "cortex-m3"	if BR2_cortex_m3
 	default "cortex-m4"	if BR2_cortex_m4
 	# armv8a
+	default "cortex-a32"	if BR2_cortex_a32
 	default "cortex-a53"	if BR2_cortex_a53
 	default "cortex-a57"	if BR2_cortex_a57
 	default "cortex-a57.cortex-a53"	if BR2_cortex_a57_a53
Signature · 1 line
2.11.0
#40 lore raw

PATCH 6/9 arch/arm: add some armv8a cortex variants

In reply to Yann E. MORIN
Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm | 40 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)
arch/Config.in.arm +40 -0
index 0304929ba1..65caf7aa80 100644
@@ -253,6 +253,15 @@ config BR2_cortex_a32
 	select BR2_ARM_CPU_ARMV8A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+config BR2_cortex_a35
+	bool "cortex-A35"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
 config BR2_cortex_a53
 	bool "cortex-A53"
 	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
@@ -296,6 +305,33 @@ config BR2_cortex_a72_a53
 	select BR2_ARM_CPU_ARMV8A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+config BR2_cortex_a73
+	bool "cortex-A73"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_cortex_a73_a35
+	bool "cortex-A73/A35 big.LITTLE"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_cortex_a73_a53
+	bool "cortex-A73/A53 big.LITTLE"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
 endchoice
 
 config BR2_ARM_ENABLE_NEON
@@ -583,11 +619,15 @@ config BR2_GCC_TARGET_CPU
 	default "cortex-m4"	if BR2_cortex_m4
 	# armv8a
 	default "cortex-a32"	if BR2_cortex_a32
+	default "cortex-a35"	if BR2_cortex_a35
 	default "cortex-a53"	if BR2_cortex_a53
 	default "cortex-a57"	if BR2_cortex_a57
 	default "cortex-a57.cortex-a53"	if BR2_cortex_a57_a53
 	default "cortex-a72"	if BR2_cortex_a72
 	default "cortex-a72.cortex-a53"	if BR2_cortex_a72_a53
+	default "cortex-a73"	if BR2_cortex_a73
+	default "cortex-a73.cortex-a35"	if BR2_cortex_a73_a35
+	default "cortex-a73.cortex-a53"	if BR2_cortex_a73_a53
 
 config BR2_GCC_TARGET_ABI
 	default "aapcs-linux"	if BR2_arm || BR2_armeb
Signature · 1 line
2.11.0
#41 lore raw

PATCH 7/9 arch/arm: add some non-cortex armv8a cores

In reply to Yann E. MORIN

Some need gcc-5, some gcc-6 and some gcc-7.

The thunderx familly does not build in 32-bit mode (gcc complains that the CPU is unknown, and even gcc master only knows them as aarch64-only).

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm | 77 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)
arch/Config.in.arm +77 -0
index 65caf7aa80..40d6ae18b8 100644
@@ -332,6 +332,74 @@ config BR2_cortex_a73_a53
 	select BR2_ARM_CPU_ARMV8A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_exynos_m1
+	bool "exynos-m1"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+config BR2_falkor
+	bool "falkor"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_qdf24xx
+	bool "qdf24xx"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
+if BR2_ARCH_IS_64
+config BR2_thunderx
+	bool "thunderx"
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+config BR2_thunderxt81
+	bool "thunderxt81"
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_thunderxt83
+	bool "thunderxt83"
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_thunderxt88
+	bool "thunderxt88"
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_thunderxt88p1
+	bool "thunderxt88p1"
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+endif # BR2_ARCH_IS_64
+config BR2_xgene1
+	bool "xgene1"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
 endchoice
 
 config BR2_ARM_ENABLE_NEON
@@ -628,6 +696,15 @@ config BR2_GCC_TARGET_CPU
 	default "cortex-a73"	if BR2_cortex_a73
 	default "cortex-a73.cortex-a35"	if BR2_cortex_a73_a35
 	default "cortex-a73.cortex-a53"	if BR2_cortex_a73_a53
+	default "exynos-m1"	if BR2_exynos_m1
+	default "falkor"	if BR2_falkor
+	default "qdf24xx"	if BR2_qdf24xx
+	default "thunderx"	if BR2_thunderx
+	default "thunderxt81"	if BR2_thunderxt81
+	default "thunderxt83"	if BR2_thunderxt83
+	default "thunderxt88"	if BR2_thunderxt88
+	default "thunderxt88p1"	if BR2_thunderxt88p1
+	default "xgene1"	if BR2_xgene1
 
 config BR2_GCC_TARGET_ABI
 	default "aapcs-linux"	if BR2_arm || BR2_armeb
Signature · 1 line
2.11.0
#42 lore raw

PATCH 7/9 arch/arm: add some non-cortex armv8a cores

Hello,

Quoted 11 lines · Yann E. MORIN

Some need gcc-5, some gcc-6 and some gcc-7.

The thunderx familly does not build in 32-bit mode (gcc complains that the CPU is unknown, and even gcc master only knows them as aarch64-only).

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm | 77 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)

Series looks good, but on this one, I'm wondering: do we really want to add this long list of CPU cores, that most likely nobody is ever going to use with Buildroot ?

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#43 lore raw

PATCH 7/9 arch/arm: add some non-cortex armv8a cores

Thomas, All,

On 2017-09-03 16:04 +0200, Thomas Petazzoni spake thusly:

Quoted 13 lines · Yann E. MORIN
Quoted 11 lines

Some need gcc-5, some gcc-6 and some gcc-7.

The thunderx familly does not build in 32-bit mode (gcc complains that the CPU is unknown, and even gcc master only knows them as aarch64-only).

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm | 77 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)
Quoted 3 lines

Series looks good, but on this one, I'm wondering: do we really want to add this long list of CPU cores, that most likely nobody is ever going to use with Buildroot ?

Well, I'm not sure, but I would not bet either...

I know for sure that some people are using Buildroot to build small systems that they use as docker roots for example (they've spoken so either on the list or on the IRC channel some time ago). Those are mostly expected to run on server-class machines. The Thunder familly of CPUs are just meant for those kind of server-class machines.

So I do see a direct use-case for adding the ThunderX familly of cores, yes.

For the others, I'm not as positive, but I still added them while I was at it. Not much additional work, except waiting for more tests to run... ;-)

Regards,
Yann E. MORIN.

Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#44 lore raw

PATCH 8/9 arch/arm: add armv8.1a cores

In reply to Yann E. MORIN

The armv8.1a generation is a cumulative extension to armv8a. It adds new extensions, and makes some previously optional ones now mandatory.

Since gcc correctly enables the appropriate extensions based on the core name, we don't really need to introduce a separate config for armv8.1a, and we can piggyback on armv8a.

All those new cores are aarch64 only (gcc fails to build in arm mode).

Cc Thomas Petazzoni <[email protected]>
---
 arch/Config.in.arm | 35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)
arch/Config.in.arm +35 -0
index 40d6ae18b8..1cb75c1b69 100644
@@ -400,6 +400,37 @@ config BR2_xgene1
 	select BR2_ARM_CPU_ARMV8A
 	select BR2_ARCH_HAS_MMU_OPTIONAL
 	select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
+
+if BR2_ARCH_IS_64
+comment "armv8.1a cores"
+config BR2_thunderx2t99
+	bool "thunderx2t99"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_thunderx2t99p1
+	bool "thunderx2t99p1"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+config BR2_vulcan
+	bool "vulcan"
+	select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64
+	select BR2_ARM_CPU_HAS_FP_ARMV8
+	select BR2_ARM_CPU_ARMV8A
+	select BR2_ARCH_HAS_MMU_OPTIONAL
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
+endif # BR2_ARCH_IS_64
 endchoice
 
 config BR2_ARM_ENABLE_NEON
@@ -705,6 +736,10 @@ config BR2_GCC_TARGET_CPU
 	default "thunderxt88"	if BR2_thunderxt88
 	default "thunderxt88p1"	if BR2_thunderxt88p1
 	default "xgene1"	if BR2_xgene1
+	# armv8.1a
+	default "thunderx2t99"	if BR2_thunderx2t99
+	default "thunderx2t99p1"	if BR2_thunderx2t99p1
+	default "vulcan"	if BR2_vulcan
 
 config BR2_GCC_TARGET_ABI
 	default "aapcs-linux"	if BR2_arm || BR2_armeb
Signature · 1 line
2.11.0
#45 lore raw

PATCH 9/9 tests for all new arm cores

In reply to Yann E. MORIN
---
 .../tests/toolchain/test_internal_aarch64_all.py   | 162 +++++++++++++++++++++
 .../tests/toolchain/test_internal_arm_all.py       |  95 ++++++++++++
 2 files changed, 257 insertions(+)
 create mode 100644 support/testing/tests/toolchain/test_internal_aarch64_all.py
 create mode 100644 support/testing/tests/toolchain/test_internal_arm_all.py
support/testing/tests/toolchain/test_internal_aarch64_all.py new file +162 -0
new file mode 100644
index 0000000000..77f5ce8fdb
@@ -0,0 +1,162 @@
+import os
+import infra
+
+class InternalToolchainAarch64Base(infra.basetest.BRTest):
+    config = \
+        """
+        BR2_aarch64=y
+        BR2_INIT_NONE=y
+        BR2_SYSTEM_BIN_SH_NONE=y
+        # BR2_PACKAGE_BUSYBOX is not set
+        # BR2_TARGET_ROOTFS_TAR is not set
+        """
+
+################################################################################
+
+class TestInternalToolchainAarch64CortexA35(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_cortex_a35=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64CortexA73(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_cortex_a73=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64CortexA73A35(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_cortex_a73_a35=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64CortexA73A53(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_cortex_a73_a53=y
+        """
+
+    def test_run(self):
+        return True
+
+################################################################################
+
+class TestInternalToolchainAarch64Exynos1(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_exynos_m1=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64Falkor(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_falkor=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64Qdf24xx(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_qdf24xx=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64ThunderX(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_thunderx=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64ThunderXt81(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_thunderxt81=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64ThunderXt83(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_thunderxt83=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64ThunderXt88(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_thunderxt88=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64ThunderXt88p1(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_thunderxt88p1=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64Xgene1(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_xgene1=y
+        """
+
+    def test_run(self):
+        return True
+
+################################################################################
+
+class TestInternalToolchainAarch64ThunderX2t99(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_thunderx2t99=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64Vulcan(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_vulcan=y
+        """
+
+    def test_run(self):
+        return True
+
+class TestInternalToolchainAarch64ThunderX2t99p1(infra.basetest.BRTest):
+    config = InternalToolchainAarch64Base.config + \
+        """
+        BR2_thunderx2t99p1=y
+        """
+
+    def test_run(self):
+        return True
support/testing/tests/toolchain/test_internal_arm_all.py new file +95 -0

95 lines not on this page · raw message

Signature · 1 line
2.11.0
#46 lore raw

[Buildroot] [pull request] arch/arm: add some new armv8a cores

In reply to Yann E. MORIN

All,

On 2017-09-03 15:17 +0200, Yann E. MORIN spake thusly:

Quoted 4 lines

PS. I've sent this series as a real pull-request, just to see how the new patchwork handles it: currently, series are sorted by the first patch, and patchwork misses the cover-letter. Let's see if a cover-letter that is a pull-request gets noticed.

Definitely not working, and even breaks the series-detection of patchowrk:

- it does not classifies the first patch in the series as being

    part of the series;

- it treats the cover-letter as bieing on its own, totally decorelated from the rest of the series.

Too bad...

Sorry for the noise... :-(

Regards,
Yann E. MORIN.

Signature · 6 lines
.-----------------.--------------------.------------------.--------------------.
|  Yann E. MORIN  | Real-Time Embedded | /"\ ASCII RIBBON | Erics' conspiracy: |
| +33 662 376 056 | Software  Designer | \ / CAMPAIGN     |  ___               |
| +33 223 225 172 `------------.-------:  X  AGAINST      |  \e/  There is no  |
| http://ymorin.is-a-geek.org/ | _/*\_ | / \ HTML MAIL    |   v   conspiracy.  |
'------------------------------^-------^------------------^--------------------'
#47 lore raw

[Buildroot] [pull request] arch/arm: add some new armv8a cores

In reply to Yann E. MORIN

Hello,

Quoted 4 lines · Yann E. MORIN

Yann E. MORIN (9):
arch/arm: re-order cores choice
arch/arm: simplify hiding non 64-bit cores
arch/arm: armv8 is really armv8a

Those patches applied to next.

Quoted 1 line

arch/arm: do not allow soft-float for armv8a

This one not applied, see my reply to it. I've kept it as "New" in patchwork for now.

Quoted 4 lines

arch/arm: add cortex-A32
arch/arm: add some armv8a cortex variants
arch/arm: add some non-cortex armv8a cores
arch/arm: add armv8.1a cores

I've applied those four patches to next as well. As I replied to one of them, I'm not super convinced exhaustively adding all cores is really useful, but since you did it, and build tested all of them, I applied the patches anyway.

Thanks!

Thomas Petazzoni

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#48 lore raw

cover arch: fix MIPS NaN and floating-point handling

In reply to Yann E. MORIN

Hello,

Quoted 4 lines · Yann E. MORIN

Yann E. MORIN (3):
arch/mips: inverse the NaN logic
arch/mips: inverse the mfpxx logic toolchain/buildroot: glibc requires header >= 4.5 with NaN-2008

Series applied to next. Thanks!

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
#49 lore raw

cover arch: some require a minimal gcc version

In reply to Yann E. MORIN

Hello,

Quoted 9 lines · Yann E. MORIN

Yann E. MORIN (8):
arch: introduce minimal required gcc version
package/gcc: hide versions too old for the current arch toolchain/external-custom: hide versions too old for the current arch toolchain/external: hide versions too old for the current arch arch/bfin: needs gcc >= 6
arch/mips: some variants need different gcc versions arch/arm: some variants need different gcc versions package/gcc: slight cleanup and reorg in remaining arch depends

Series applied to next, after fixing the minor conflicts that were caused by other changes being merged in between, and fixing a few typos in the commit log.

I'm still a bit worried about external toolchains that have gcc versions containing backports that support for an architecture or architecture variant that would normally require a more recent gcc version.

For example, gcc support for ARC was added in gcc 7.x, so we will be adding the statement that ARC needs gcc >= 7.x. However, the current Synopsys external toolchain for ARC uses gcc 6.x, so it wouldn't be selectable anymore.

I can imagine that Synopsys will rebuild their toolchain with gcc 7.x soonish, so perhaps the problem will just disappear by itself.

But it might still be an issue in other situations. Let's see what happens in the future! :-)

Thanks!

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
#50 lore raw

v2 cover arch: not all have support in the internal backend

In reply to Yann E. MORIN

Hello,

Quoted 6 lines · Yann E. MORIN

Yann E. MORIN (5):
arch: add option to disable internal toolchain backend arch/csky: internal backend not suitable arch/mips: internal backend not suitable for some cores arch/bfin: internal backend not suitable for some cores arc/bfin: remove 60x cores

Series applied. Thanks!

Thomas

Signature · 3 lines
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com