board: atmel: Add new board SAMA5D27-SOM1-EK board.

The SAMA5D27-SOM1-EK board embeds a SAMA5D27 SOM1 module, which includes a SAMA5D27-SiP chip and QSPI flash, Phy and MAC EEPROM. The SAMA5D27 SiP integrates the SAMA5D2 with 1Gbit DDR2-SDRAM in a single package.

Changes in v6:
- Add function comments for at91_mck_init_down().
- Add the Reviewed-by tags.
- Rebase the u-boot/master (ba39608147c797cf).

Changes in v5:
- Rebase the u-boot/master (8a33cb8b6bd).
- Drop the applied patches.

Changes in v4:
- Rebase the uboot/master (84a4206).
- Remove the default config file for the spiflash.
- Integrate the following patches into this patch series.
1./ [PATCH v2 0/3] board: atmel: Set the ethernet mac address from eeprom
2./ [PATCH 1/7] lib: at91: Add logo files used by API from DM_VIDEO
3./ [PATCH 2/7] atmel: common: Add function to display via DM_VIDEO's API
4./ [PATCH] board: sama5d2_xplained: Make SPL work on spiflash
- Remove the dependency on [PATCH 0/5] configs: at91: Remove value of CONFIG_SYS_EXTRA_OPTIONS option.

Changes in v3:
- Rebase on the PATCH: Atmel PIT timer driver and Remove CONFIG_SYS_EXTRA_OPTIONS.
- Use the new Atmel PIT timer driver.
- Remove "SAMA5D2" from CONFIG_SYS_EXTRA_OPTIONS options.
- Move CONFIG_ENV_IS_IN_FAT to Kconfig.

Changes in v2:
- Add the reviewed-by tag.
- Add the help in Kconfig to describe the board and peripherals.
- Add the code to display the company's logo and board information.
- Replace the code to set the ethernet mac address with the common code from the board/atmel/common folder.

Wenyou Yang (9):
lib: at91: Add logo files used via API of DM_VIDEO
atmel: common: Add function to display via DM_VIDEO's API
ARM: at91: spl: Adjust switching to oscillator for SAMA5D2
ARM: at91: spl: Add mck function to lower rate while switching
board: sama5d2_xplained: Make SPL work on spiflash
ARM: at91: spl: Add boot device for boot from QSPI
ARM: at91: mach: Add missing defines of MPDDRC
ARM: at91: Get the Chip ID of SAMA5D2 SiP
board: atmel: Add SAMA5D27 SOM1 EK board

 arch/arm/dts/Makefile                           |    3 +
 arch/arm/dts/at91-sama5d27_som1_ek.dts          |  215 ++++
 arch/arm/dts/sama5d2.dtsi                       |   20 +
 arch/arm/dts/sama5d27_som1.dtsi                 |  159 +++
 arch/arm/mach-at91/Kconfig                      |   14 +
 arch/arm/mach-at91/armv7/clock.c                |   42 +
 arch/arm/mach-at91/armv7/sama5d2_devices.c      |   26 +-
 arch/arm/mach-at91/include/mach/at91_common.h   |    2 +
 arch/arm/mach-at91/include/mach/at91_pmc.h      |    2 +
 arch/arm/mach-at91/include/mach/atmel_mpddrc.h  |    4 +
 arch/arm/mach-at91/include/mach/sama5d2.h       |    7 +-
 arch/arm/mach-at91/spl.c                        |    2 +
 arch/arm/mach-at91/spl_atmel.c                  |   18 +-
 board/atmel/common/Makefile                     |    1 +
 board/atmel/common/video_display.c              |   72 ++
 board/atmel/sama5d27_som1_ek/Kconfig            |   15 +
 board/atmel/sama5d27_som1_ek/MAINTAINERS        |    6 +
 board/atmel/sama5d27_som1_ek/Makefile           |    8 +
 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c |  189 ++++
 board/atmel/sama5d2_xplained/sama5d2_xplained.c |   10 +
 configs/sama5d27_som1_ek_mmc_defconfig          |   88 ++
 include/atmel_lcd.h                             |    9 +
 include/configs/sama5d27_som1_ek.h              |   92 ++
 include/configs/sama5d2_xplained.h              |    2 +-
 lib/Makefile                                    |    1 +
 lib/at91/Makefile                               |    8 +
 lib/at91/at91.c                                 |   30 +
 lib/at91/atmel_logo_8bpp.h                      | 1310 +++++++++++++++++++++++
 lib/at91/microchip_logo_8bpp.h                  | 1082 +++++++++++++++++++
 tools/logos/microchip.bmp                       |  Bin 0 -> 12726 bytes
 30 files changed, 3432 insertions(+), 5 deletions(-)
 create mode 100644 arch/arm/dts/at91-sama5d27_som1_ek.dts
 create mode 100644 arch/arm/dts/sama5d27_som1.dtsi
 create mode 100644 board/atmel/common/video_display.c
 create mode 100644 board/atmel/sama5d27_som1_ek/Kconfig
 create mode 100644 board/atmel/sama5d27_som1_ek/MAINTAINERS
 create mode 100644 board/atmel/sama5d27_som1_ek/Makefile
 create mode 100644 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
 create mode 100644 configs/sama5d27_som1_ek_mmc_defconfig
 create mode 100644 include/configs/sama5d27_som1_ek.h
 create mode 100644 lib/at91/Makefile
 create mode 100644 lib/at91/at91.c
 create mode 100644 lib/at91/atmel_logo_8bpp.h
 create mode 100644 lib/at91/microchip_logo_8bpp.h
 create mode 100644 tools/logos/microchip.bmp

2.13.0

From: Wenyou Yang <[email protected]>

In order to display the company's logo via the API of DM_VIDEO, and add the logo files of both Atmel and Microchip.

---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 include/atmel_lcd.h            |    9 +
 lib/Makefile                   |    1 +
 lib/at91/Makefile              |    8 +
 lib/at91/at91.c                |   30 +
 lib/at91/atmel_logo_8bpp.h     | 1310 ++++++++++++++++++++++++++++++++++++++++
 lib/at91/microchip_logo_8bpp.h | 1082 +++++++++++++++++++++++++++++++++
 tools/logos/microchip.bmp      |  Bin 0 -> 12726 bytes
 7 files changed, 2440 insertions(+)
 create mode 100644 lib/at91/Makefile
 create mode 100644 lib/at91/at91.c
 create mode 100644 lib/at91/atmel_logo_8bpp.h
 create mode 100644 lib/at91/microchip_logo_8bpp.h
 create mode 100644 tools/logos/microchip.bmp

index 8a2f46f6c7..ee7ba27798 100644
@@ -43,6 +43,15 @@ typedef struct vidinfo {
 	u_long vl_lower_margin;	/* Time from picture to sync */
 
 	u_long	mmio;		/* Memory mapped registers */
+
+	u_int logo_width;
+	u_int logo_height;
+	int logo_x_offset;
+	int logo_y_offset;
+	u_long logo_addr;
 } vidinfo_t;
 
+void atmel_logo_info(vidinfo_t *info);
+void microchip_logo_info(vidinfo_t *info);
+
 #endif

index 15bba9eac2..faf4538fb5 100644
@@ -16,6 +16,7 @@ obj-$(CONFIG_TIZEN) += tizen/
 obj-$(CONFIG_FIT) += libfdt/
 obj-$(CONFIG_OF_LIVE) += of_live.o
 obj-$(CONFIG_CMD_DHRYSTONE) += dhry/
+obj-$(CONFIG_ARCH_AT91) += at91/
 
 obj-$(CONFIG_AES) += aes.o
 obj-y += charset.o

new file mode 100644
index 0000000000..5a18875382
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2017 Microchip
+# Wenyou.Yang <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-$(CONFIG_ARCH_AT91) += at91.o

new file mode 100644
index 0000000000..5dca1507da
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2016 Microchip
+ *		 Wenyou.Yang <[email protected]>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <atmel_lcd.h>
+
+#include "atmel_logo_8bpp.h"
+#include "microchip_logo_8bpp.h"
+
+void atmel_logo_info(vidinfo_t *info)
+{
+	info->logo_width = ATMEL_LOGO_8BPP_WIDTH;
+	info->logo_height = ATMEL_LOGO_8BPP_HEIGHT;
+	info->logo_x_offset = ATMEL_LOGO_8BPP_X_OFFSET;
+	info->logo_y_offset = ATMEL_LOGO_8BPP_X_OFFSET;
+	info->logo_addr = (u_long)atmel_logo_8bpp;
+}
+
+void microchip_logo_info(vidinfo_t *info)
+{
+	info->logo_width = MICROCHIP_LOGO_8BPP_WIDTH;
+	info->logo_height = MICROCHIP_LOGO_8BPP_HEIGHT;
+	info->logo_x_offset = MICROCHIP_LOGO_8BPP_X_OFFSET;
+	info->logo_y_offset = MICROCHIP_LOGO_8BPP_X_OFFSET;
+	info->logo_addr = (u_long)microchip_logo_8bpp;
+}

new file mode 100644
index 0000000000000000000000000000000000000000..bcecbe972f4e5f088f458df835396fc44293687f
GIT binary patch

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literal 0
HcmV?d00001

2.13.0

Applied to u-boot/master, thanks!

Tom
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Add a function to display the company's logo and board information via the API from DM_VIDEO. This function can be shared by other atmel boards, so locate it in board/atmel/common folder.

---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/mach-at91/include/mach/at91_common.h |  1 +
 board/atmel/common/Makefile                   |  1 +
 board/atmel/common/video_display.c            | 72 +++++++++++++++++++++++++++
 3 files changed, 74 insertions(+)
 create mode 100644 board/atmel/common/video_display.c

index a95fe41610..5416eb455d 100644
@@ -37,5 +37,6 @@ void redirect_int_from_saic_to_aic(void);
 void configure_2nd_sram_as_l2_cache(void);
 
 int at91_set_ethaddr(int offset);
+int at91_video_show_board_info(void);
 
 #endif /* AT91_COMMON_H */

index 6d9c6850b5..8a6850bc19 100644
@@ -8,4 +8,5 @@
 obj-y += board.o
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_I2C_EEPROM) += mac_eeprom.o
+obj-$(CONFIG_DM_VIDEO) += video_display.o
 endif

2.13.0

Applied to u-boot/master, thanks!

Tom
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As said in 29.5.7 section of SAMA5D2 datasheet, before switching to the crystal oscillator, a check must be carried out to ensure that the oscillator is present and that its freqency is valid.

---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/mach-at91/include/mach/at91_pmc.h |  2 ++
 arch/arm/mach-at91/spl_atmel.c             | 18 +++++++++++++++++-
 2 files changed, 19 insertions(+), 1 deletion(-)

index 2875ff20b1..08ad1bf2d0 100644
@@ -87,6 +87,8 @@ typedef struct at91_pmc {
 
 #define AT91_PMC_MCFR_MAINRDY		0x00010000
 #define AT91_PMC_MCFR_MAINF_MASK	0x0000FFFF
+#define AT91_PMC_MCFR_RCMEAS		0x00100000
+#define AT91_PMC_MCFR_CCSS_XTAL_OSC	0x01000000
 
 #define AT91_PMC_MCKR_CSS_SLOW		0x00000000
 #define AT91_PMC_MCKR_CSS_MAIN		0x00000001

index b75c2ccefd..ce16ef3bdb 100644
@@ -32,6 +32,20 @@ static void switch_to_main_crystal_osc(void)
 	while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCS))
 		;
 
+#if defined(CONFIG_SAMA5D2)
+	/* Enable a measurement of the external oscillator */
+	tmp = readl(&pmc->mcfr);
+	tmp |= AT91_PMC_MCFR_CCSS_XTAL_OSC;
+	tmp |= AT91_PMC_MCFR_RCMEAS;
+	writel(tmp, &pmc->mcfr);
+
+	while (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINRDY))
+		;
+
+	if (!(readl(&pmc->mcfr) & AT91_PMC_MCFR_MAINF_MASK))
+		hang();
+#endif
+
 	tmp = readl(&pmc->mor);
 	tmp &= ~AT91_PMC_MOR_OSCBYPASS;
 	tmp &= ~AT91_PMC_MOR_KEY(0xff);

@@ -47,11 +61,13 @@ static void switch_to_main_crystal_osc(void)
 	while (!(readl(&pmc->sr) & AT91_PMC_IXR_MOSCSELS))
 		;
 
+#if !defined(CONFIG_SAMA5D2)
 	/* Wait until MAINRDY field is set to make sure main clock is stable */
 	while (!(readl(&pmc->mcfr) & AT91_PMC_MAINRDY))
 		;
+#endif
 
-#ifndef CONFIG_SAMA5D4
+#if !defined(CONFIG_SAMA5D4) && !defined(CONFIG_SAMA5D2)
 	tmp = readl(&pmc->mor);
 	tmp &= ~AT91_PMC_MOR_MOSCRCEN;
 	tmp &= ~AT91_PMC_MOR_KEY(0xff);

2.13.0

Applied to u-boot/master, thanks!

Tom
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Refer to the commit 70f8c8316ad(PMC: add new mck function to lower rate while switching) from AT91Bootstrap.

While switching to a lower clock source, we must switch the clock source first instead of last. Otherwise, we could end up with too high frequency on internal bus and peripherals. This happens on SAMA5D2 as exitting from the ROM code.

Add a function pmc_mck_init_down() to allow this sequence.

---

Changes in v6:
- Add function comments for at91_mck_init_down().

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/mach-at91/armv7/clock.c              | 42 +++++++++++++++++++++++++++
 arch/arm/mach-at91/include/mach/at91_common.h |  1 +
 2 files changed, 43 insertions(+)

index 2e55953799..51c5e80be7 100644
@@ -150,6 +150,48 @@ void at91_mck_init(u32 mckr)
 		;
 }
 
+/*
+ * For the Master Clock Controller Register(MCKR), while switching
+ * to a lower clock source, we must switch the clock source first
+ * instead of last. Otherwise, we could end up with too high frequency
+ * on the internal bus and peripherals.
+ */
+void at91_mck_init_down(u32 mckr)
+{
+	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
+	u32 tmp;
+
+	tmp = readl(&pmc->mckr);
+	tmp &= (~AT91_PMC_MCKR_CSS_MASK);
+	tmp |= (mckr & AT91_PMC_MCKR_CSS_MASK);
+	writel(tmp, &pmc->mckr);
+
+	while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
+		;
+
+#ifdef CPU_HAS_H32MXDIV
+	tmp = readl(&pmc->mckr);
+	tmp &= (~AT91_PMC_MCKR_H32MXDIV);
+	tmp |= (mckr & AT91_PMC_MCKR_H32MXDIV);
+	writel(tmp, &pmc->mckr);
+#endif
+
+	tmp = readl(&pmc->mckr);
+	tmp &= (~AT91_PMC_MCKR_PLLADIV_MASK);
+	tmp |= (mckr & AT91_PMC_MCKR_PLLADIV_MASK);
+	writel(tmp, &pmc->mckr);
+
+	tmp = readl(&pmc->mckr);
+	tmp &= (~AT91_PMC_MCKR_MDIV_MASK);
+	tmp |= (mckr & AT91_PMC_MCKR_MDIV_MASK);
+	writel(tmp, &pmc->mckr);
+
+	tmp = readl(&pmc->mckr);
+	tmp &= (~AT91_PMC_MCKR_PRES_MASK);
+	tmp |= (mckr & AT91_PMC_MCKR_PRES_MASK);
+	writel(tmp, &pmc->mckr);
+}
+
 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div)
 {
 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;

index 5416eb455d..0b09ce7b2e 100644
@@ -25,6 +25,7 @@ void at91_lcd_hw_init(void);
 void at91_plla_init(u32 pllar);
 void at91_pllb_init(u32 pllar);
 void at91_mck_init(u32 mckr);
+void at91_mck_init_down(u32 mckr);
 void at91_pmc_init(void);
 void mem_init(void);
 void at91_phy_reset(void);

2.13.0

Applied to u-boot/master, thanks!

Tom
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Because before switching to a lower clock source, we must switch the clock source first instead of last. So before configuring the PMC_MCKR register, invoke at91_mck_init_down() first.

As said in datasheet, the the size of SPL must not exceed the maximum size allowed(64Kbytes).

---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 board/atmel/sama5d2_xplained/sama5d2_xplained.c | 10 ++++++++++
 include/configs/sama5d2_xplained.h              |  2 +-
 2 files changed, 11 insertions(+), 1 deletion(-)

index 7e0cb4228f..5758653030 100644
@@ -247,6 +247,16 @@ void at91_pmc_init(void)
 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 	u32 tmp;
 
+	/*
+	 * while coming from the ROM code, we run on PLLA @ 492 MHz / 164 MHz
+	 * so we need to slow down and configure MCKR accordingly.
+	 * This is why we have a special flavor of the switching function.
+	 */
+	tmp = AT91_PMC_MCKR_PLLADIV_2 |
+	      AT91_PMC_MCKR_MDIV_3 |
+	      AT91_PMC_MCKR_CSS_MAIN;
+	at91_mck_init_down(tmp);
+
 	tmp = AT91_PMC_PLLAR_29 |
 	      AT91_PMC_PLLXR_PLLCOUNT(0x3f) |
 	      AT91_PMC_PLLXR_MUL(82) |

index 891218d83e..aedd5684c4 100644
@@ -61,7 +61,7 @@
 /* SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE		0x200000
-#define CONFIG_SPL_MAX_SIZE		0x18000
+#define CONFIG_SPL_MAX_SIZE		0x10000
 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
 #define CONFIG_SYS_SPL_MALLOC_START	0x20080000

2.13.0

Applied to u-boot/master, thanks!

Tom
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Add the boot device for booting from the QSPI flash.

---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/mach-at91/spl.c | 2 ++
 1 file changed, 2 insertions(+)

index e113336b7b..98337aebbe 100644
@@ -56,6 +56,8 @@ u32 spl_boot_device(void)
 	if (dev == ATMEL_SAMA5_BOOT_FROM_SPI)
 		return BOOT_DEVICE_SPI;
 #endif
+	if (dev == ATMEL_SAMA5_BOOT_FROM_QSPI)
+		return BOOT_DEVICE_SPI;
 
 	if (dev == ATMEL_SAMA5_BOOT_FROM_SMC)
 		return BOOT_DEVICE_NAND;

2.13.0

Applied to u-boot/master, thanks!

Tom
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Add missing defines of Multiport DDR-SDRAM Controller (MPDDRC).

---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/mach-at91/include/mach/atmel_mpddrc.h | 4 ++++
 1 file changed, 4 insertions(+)

index 803501f5cf..40e1cf0a0a 100644
@@ -96,6 +96,10 @@ int ddr3_init(const unsigned int base,
 #define ATMEL_MPDDRC_CR_DLL_RESET_ENABLED	(0x1 << 7)
 #define ATMEL_MPDDRC_CR_DIC_DS			(0x1 << 8)
 #define ATMEL_MPDDRC_CR_DIS_DLL			(0x1 << 9)
+#define ATMEL_MPDDRC_CR_ZQ_INIT			(0x0 << 10)
+#define ATMEL_MPDDRC_CR_ZQ_LONG			(0x1 << 10)
+#define ATMEL_MPDDRC_CR_ZQ_SHORT		(0x2 << 10)
+#define ATMEL_MPDDRC_CR_ZQ_RESET		(0x3 << 10)
 #define ATMEL_MPDDRC_CR_OCD_DEFAULT		(0x7 << 12)
 #define ATMEL_MPDDRC_CR_DQMS_SHARED		(0x1 << 16)
 #define ATMEL_MPDDRC_CR_ENRDM_ON		(0x1 << 17)

2.13.0

Applied to u-boot/master, thanks!

Tom
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From: Wenyou Yang <[email protected]>

The SAMA5D2 SiP(System in Package) has different Chip IDs in the CHIPID and CHIP_EXID registers.

---

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/mach-at91/armv7/sama5d2_devices.c | 26 ++++++++++++++++++++++++--
 arch/arm/mach-at91/include/mach/sama5d2.h  |  7 ++++++-
 2 files changed, 30 insertions(+), 3 deletions(-)

index 978eac29bd..de1d9b5bfb 100644
@@ -10,11 +10,20 @@
 #include <asm/arch/clk.h>
 #include <asm/arch/sama5d2.h>
 
-char *get_cpu_name()
+int cpu_is_sama5d2(void)
 {
+	unsigned int chip_id = get_chip_id();
+
+	return ((chip_id == ARCH_ID_SAMA5D2) ||
+		(chip_id == ARCH_ID_SAMA5D2_SIP)) ? 1 : 0;
+}
+
+char *get_cpu_name(void)
+{
+	unsigned int chip_id = get_chip_id();
 	unsigned int extension_id = get_extension_chip_id();
 
-	if (cpu_is_sama5d2()) {
+	if (chip_id == ARCH_ID_SAMA5D2) {
 		switch (extension_id) {
 		case ARCH_EXID_SAMA5D21CU:
 			return "SAMA5D21";

@@ -41,6 +50,19 @@ char *get_cpu_name()
 		}
 	}
 
+	if ((chip_id == ARCH_ID_SAMA5D2) || (chip_id == ARCH_ID_SAMA5D2_SIP)) {
+		switch (extension_id) {
+		case ARCH_EXID_SAMA5D225C_D1M:
+			return "SAMA5D225 128M bits DDR2 SDRAM";
+		case ARCH_EXID_SAMA5D27C_D5M:
+			return "SAMA5D27 512M bits DDR2 SDRAM";
+		case ARCH_EXID_SAMA5D27C_D1G:
+			return "SAMA5D27 1G bits DDR2 SDRAM";
+		case ARCH_EXID_SAMA5D28C_D1G:
+			return "SAMA5D28 1G bits DDR2 SDRAM";
+		}
+	}
+
 	return "Unknown CPU type";
 }
 

index 25c85411e5..49283ed86b 100644
@@ -222,7 +222,11 @@
 #define ARCH_EXID_SAMA5D28CU	0x00000010
 #define ARCH_EXID_SAMA5D28CN	0x00000020
 
-#define cpu_is_sama5d2()	(get_chip_id() == ARCH_ID_SAMA5D2)
+#define ARCH_ID_SAMA5D2_SIP		0x8a5c08c2
+#define ARCH_EXID_SAMA5D225C_D1M	0x00000053
+#define ARCH_EXID_SAMA5D27C_D5M		0x00000032
+#define ARCH_EXID_SAMA5D27C_D1G		0x00000033
+#define ARCH_EXID_SAMA5D28C_D1G		0x00000013
 
 /* PIT Timer(PIT_PIIR) */
 #define CONFIG_SYS_TIMER_COUNTER	0xf804803c

@@ -233,6 +237,7 @@
 #ifndef __ASSEMBLY__
 unsigned int get_chip_id(void);
 unsigned int get_extension_chip_id(void);
+int cpu_is_sama5d2(void);
 unsigned int has_lcdc(void);
 char *get_cpu_name(void);
 #endif

2.13.0

Applied to u-boot/master, thanks!

Tom
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From: Wenyou Yang <[email protected]>

The SAMA5D27-SiP (System in Package) integrates the SAMA5D2 with 1Gbit DDR2-SDRAM in a single package.

The SAMA5D27 SOM1 embeds a 64Mbit QSPI flash, KSZ8081 Phy and Mac-address EEPROM.

---

Changes in v6:
- Add the Reviewed-by tags.
- Rebase the u-boot/master (ba39608147c797cf).

Changes in v5:
- Rebase the u-boot/master (8a33cb8b6bd).
- Drop the applied patches.

Changes in v4:
- Rebase the uboot/master (84a4206).
- Remove the default config file for the spiflash.
- Integrate the following patches into this patch series.
1./ [PATCH v2 0/3] board: atmel: Set the ethernet mac address from eeprom
2./ [PATCH 1/7] lib: at91: Add logo files used by API from DM_VIDEO
3./ [PATCH 2/7] atmel: common: Add function to display via DM_VIDEO's API
4./ [PATCH] board: sama5d2_xplained: Make SPL work on spiflash
- Remove the dependency on [PATCH 0/5] configs: at91: Remove value of CONFIG_SYS_EXTRA_OPTIONS option.

Changes in v3:
- Rebase on the PATCH: Atmel PIT timer driver and Remove CONFIG_SYS_EXTRA_OPTIONS.
- Use the new Atmel PIT timer driver.
- Remove "SAMA5D2" from CONFIG_SYS_EXTRA_OPTIONS options.
- Move CONFIG_ENV_IS_IN_FAT to Kconfig.

Changes in v2:
- Add the reviewed-by tag.
- Add the help in Kconfig to describe the board and peripherals.
- Add the code to display the company's logo and board information.
- Replace the code to set the ethernet mac address with the common code from the board/atmel/common folder.

 arch/arm/dts/Makefile                           |   3 +
 arch/arm/dts/at91-sama5d27_som1_ek.dts          | 215 ++++++++++++++++++++++++
 arch/arm/dts/sama5d2.dtsi                       |  20 +++
 arch/arm/dts/sama5d27_som1.dtsi                 | 159 ++++++++++++++++++
 arch/arm/mach-at91/Kconfig                      |  14 ++
 board/atmel/sama5d27_som1_ek/Kconfig            |  15 ++
 board/atmel/sama5d27_som1_ek/MAINTAINERS        |   6 +
 board/atmel/sama5d27_som1_ek/Makefile           |   8 +
 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c | 189 +++++++++++++++++++++
 configs/sama5d27_som1_ek_mmc_defconfig          |  88 ++++++++++
 include/configs/sama5d27_som1_ek.h              |  92 ++++++++++
 11 files changed, 809 insertions(+)
 create mode 100644 arch/arm/dts/at91-sama5d27_som1_ek.dts
 create mode 100644 arch/arm/dts/sama5d27_som1.dtsi
 create mode 100644 board/atmel/sama5d27_som1_ek/Kconfig
 create mode 100644 board/atmel/sama5d27_som1_ek/MAINTAINERS
 create mode 100644 board/atmel/sama5d27_som1_ek/Makefile
 create mode 100644 board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
 create mode 100644 configs/sama5d27_som1_ek_mmc_defconfig
 create mode 100644 include/configs/sama5d27_som1_ek.h

index 10d397d700..85ce68789a 100644
@@ -420,6 +420,9 @@ dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \
 dtb-$(CONFIG_TARGET_SAMA5D2_XPLAINED) += \
 	at91-sama5d2_xplained.dtb
 
+dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
+	at91-sama5d27_som1_ek.dtb
+
 dtb-$(CONFIG_TARGET_SAMA5D3XEK) += \
 	sama5d31ek.dtb \
 	sama5d33ek.dtb \

index d8a65145d6..2bcf1a1f7c 100644
@@ -504,11 +504,13 @@
 					qspi0_clk: qspi0_clk at 52 {
 						#clock-cells = <0>;
 						reg = <52>;
+						u-boot,dm-pre-reloc;
 					};
 
 					qspi1_clk: qspi1_clk at 53 {
 						#clock-cells = <0>;
 						reg = <53>;
+						u-boot,dm-pre-reloc;
 					};
 				};
 

@@ -595,6 +597,16 @@
 				status = "disabled";
 			};
 
+			qspi1: spi at f0024000 {
+				compatible = "atmel,sama5d2-qspi";
+				reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
+				reg-names = "qspi_base", "qspi_mmap";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				clocks = <&qspi1_clk>;
+				status = "disabled";
+			};
+
 			spi0: spi at f8000000 {
 				compatible = "atmel,at91rm9200-spi";
 				reg = <0xf8000000 0x100>;

@@ -694,6 +706,14 @@
 				status = "disabled";
 			};
 
+			uart3: serial at fc008000 {
+				compatible = "atmel,at91sam9260-usart";
+				reg = <0xfc008000 0x100>;
+				clocks = <&uart3_clk>;
+				clock-names = "usart";
+				status = "disabled";
+			};
+
 			i2c1: i2c at fc028000 {
 				compatible = "atmel,sama5d2-i2c";
 				reg = <0xfc028000 0x100>;

index 20f7eeaf09..a70b956fbc 100644
@@ -99,6 +99,19 @@ config TARGET_SAMA5D2_XPLAINED
 	select SUPPORT_SPL
 	select BOARD_EARLY_INIT_F
 
+config TARGET_SAMA5D27_SOM1_EK
+	bool "SAMA5D27 SOM1 EK board"
+	select CPU_V7
+	select SUPPORT_SPL
+	select BOARD_EARLY_INIT_F
+	select BOARD_LATE_INIT
+	help
+	  The SAMA5D27 SOM1 embeds SAMA5D2 SiP(System in Package),
+	  a 64Mbit QSPI flash, KSZ8081 Phy and a Mac-address EEPROM
+	  24AA02E48. The SAMA5D2 SiP integrates the ARM Cortex-A5
+	  processor-based SAMA5D2 MPU with up to 1 Gbit DDR2-SDRAM
+	  in a single package.
+
 config TARGET_SAMA5D3_XPLAINED
 	bool "SAMA5D3 Xplained board"
 	select CPU_V7

@@ -181,6 +194,7 @@ source "board/atmel/at91sam9rlek/Kconfig"
 source "board/atmel/at91sam9x5ek/Kconfig"
 source "board/atmel/sama5d2_ptc/Kconfig"
 source "board/atmel/sama5d2_xplained/Kconfig"
+source "board/atmel/sama5d27_som1_ek/Kconfig"
 source "board/atmel/sama5d3_xplained/Kconfig"
 source "board/atmel/sama5d3xek/Kconfig"
 source "board/atmel/sama5d4_xplained/Kconfig"

new file mode 100644
index 0000000000..3276214d8c
@@ -0,0 +1,15 @@
+if TARGET_SAMA5D27_SOM1_EK
+
+config SYS_BOARD
+	default "sama5d27_som1_ek"
+
+config SYS_VENDOR
+	default "atmel"
+
+config SYS_SOC
+	default "at91"
+
+config SYS_CONFIG_NAME
+	default "sama5d27_som1_ek"
+
+endif

new file mode 100644
index 0000000000..609583c341
@@ -0,0 +1,6 @@
+SAMA5D27 SOM1 EK BOARD
+M:	Wenyou Yang <[email protected]>
+S:	Maintained
+F:	board/atmel/sama5d27_som1_ek/
+F:	include/configs/sama5d27_som1_ek.h
+F:	configs/sama5d27_som1_ek_mmc_defconfig

new file mode 100644
index 0000000000..4ab242c4ac
@@ -0,0 +1,8 @@
+#
+# Copyright (C) 2017 Microchip Corporation
+#		     Wenyou Yang <[email protected]>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += sama5d27_som1_ek.o

2.13.0

Applied to u-boot/master, thanks!

Tom
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