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Add support for Hisilicon Hi3521A SoC

RFC PATCH New Marty E. Plummer 1 participant 4 messages Sep 15, 2017

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#0 lore raw

cover Add support for Hisilicon Hi3521A SoC

Greetings,

I'd like the community's feedback on the following patchset. I've attempted to split my changes up in what I believe to be a sensible setup.

The device I'm working against is the 'SamsungSV SDR-B74301' HD CCTV surveillance system, which uses a Hisilicon Hi3521A arm SoC as its basis.

Marty E. Plummer (3):
clk: hisilicon: add CRG driver Hi3521A SoC
arm: hisi: enable Hi3521A SoC
arm: dts: add Hi3521A dts

 arch/arm/boot/dts/Makefile                |   2 +
 arch/arm/boot/dts/hi3521a-rs-dm290e.dts   |  52 +++++
 arch/arm/boot/dts/hi3521a.dtsi            | 310 ++++++++++++++++++++++++++++++
 arch/arm/mach-hisi/Kconfig                |   6 +
 drivers/clk/hisilicon/Kconfig             |   7 +
 drivers/clk/hisilicon/Makefile            |   1 +
 drivers/clk/hisilicon/crg-hi3521a.c       | 207 ++++++++++++++++++++
 include/dt-bindings/clock/hi3521a-clock.h |  34 ++++
 8 files changed, 619 insertions(+)
 create mode 100644 arch/arm/boot/dts/hi3521a-rs-dm290e.dts
 create mode 100644 arch/arm/boot/dts/hi3521a.dtsi
 create mode 100644 drivers/clk/hisilicon/crg-hi3521a.c
 create mode 100644 include/dt-bindings/clock/hi3521a-clock.h
Signature · 1 line
2.14.1
#1 lore raw

RFC PATCH 1/3 clk: hisilicon: add CRG driver Hi3521A SoC

Add CRG driver for Hi3521A SoC. CRG (Clock and Reset Generator) module generates clock and reset signals used by other module blocks on SoC.

---
 drivers/clk/hisilicon/Kconfig             |   7 +
 drivers/clk/hisilicon/Makefile            |   1 +
 drivers/clk/hisilicon/crg-hi3521a.c       | 207 ++++++++++++++++++++++++++++++
 include/dt-bindings/clock/hi3521a-clock.h |  34 +++++
 4 files changed, 249 insertions(+)
 create mode 100644 drivers/clk/hisilicon/crg-hi3521a.c
 create mode 100644 include/dt-bindings/clock/hi3521a-clock.h
drivers/clk/hisilicon/Kconfig +7 -0
index 7098bfd32b1b..d93e3180a04f 100644
@@ -14,6 +14,13 @@ config COMMON_CLK_HI3519
 	help
 	  Build the clock driver for hi3519.
 
+config COMMON_CLK_HI3521A
+	bool "Hi3521A/Hi3520DV300 Clock Driver"
+	depends on ARCH_HISI || COMPILE_TEST
+	default ARCH_HISI
+	help
+	  Build the clock driver for hi3521a/hi3520dv300
+
 config COMMON_CLK_HI3660
 	bool "Hi3660 Clock Driver"
 	depends on ARCH_HISI || COMPILE_TEST
drivers/clk/hisilicon/Makefile +1 -0
index 1e4c3ddbad84..46f8d619c923 100644
@@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_HIP04)	+= clk-hip04.o
 obj-$(CONFIG_ARCH_HIX5HD2)	+= clk-hix5hd2.o
 obj-$(CONFIG_COMMON_CLK_HI3516CV300)	+= crg-hi3516cv300.o
 obj-$(CONFIG_COMMON_CLK_HI3519)	+= clk-hi3519.o
+obj-$(CONFIG_COMMON_CLK_HI3521A)+= crg-hi3521a.o
 obj-$(CONFIG_COMMON_CLK_HI3660) += clk-hi3660.o
 obj-$(CONFIG_COMMON_CLK_HI3798CV200)	+= crg-hi3798cv200.o
 obj-$(CONFIG_COMMON_CLK_HI6220)	+= clk-hi6220.o
drivers/clk/hisilicon/crg-hi3521a.c new file +207 -0

207 lines not on this page · raw message

include/dt-bindings/clock/hi3521a-clock.h new file +34 -0
new file mode 100644
index 000000000000..666591236169
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2017 Marty E. Plummer <[email protected]>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __DTS_HI3521A_CLOCK_H
+#define __DTS_HI3521A_CLOCK_H
+
+#define HI3521A_FMC_CLK			1
+#define HI3521A_SPI0_CLK		2
+#define HI3521A_UART0_CLK		3
+#define HI3521A_UART1_CLK		4
+#define HI3521A_UART2_CLK		5
+#define HI3521A_DMA_CLK			6
+#define HI3521A_IR_CLK			7
+#define HI3521A_ETH_PHY_CLK		8
+#define HI3521A_ETH_CLK			9
+#define HI3521A_ETH_MACIF_CLK		10
+#define HI3521A_USB2_BUS_CLK		11
+#define HI3521A_USB2_PORT_CLK		12
+
+#endif /* __DTS_HI3521A_CLK_H */
Signature · 1 line
2.14.1
#2 lore raw

RFC PATCH 2/3 arm: hisi: enable Hi3521A SoC

In reply to Marty E. Plummer

Enable Hisilicon Hi3521A/Hi3520DCV300 SoC. This SoC series includes hardware mutlimedia codec cores, commonly used in consumer cctv/dvr security systems and ipcameras. The arm core is a Cortex A7.

---
 arch/arm/mach-hisi/Kconfig | 6 ++++++
 1 file changed, 6 insertions(+)
arch/arm/mach-hisi/Kconfig +6 -0
index 65a048fa08ec..26755414f862 100644
@@ -12,6 +12,12 @@ if ARCH_HISI
 
 menu "Hisilicon platform type"
 
+config ARCH_HI3521A
+	bool "Hisilicon Hi3521A/Hi3520DCV300 family"
+	depends on ARCH_MULTI_V7
+	help
+	  Support for Hisilicon Hi3521A/Hi3520DCV300 SoC family
+
 config ARCH_HI3xxx
 	bool "Hisilicon Hi36xx family"
 	depends on ARCH_MULTI_V7
Signature · 1 line
2.14.1
#3 lore raw

RFC PATCH 3/3 arm: dts: add Hi3521A dts

In reply to Marty E. Plummer

Add hi3521a.dtsi and hi3521a-rs-dm290e.dts for RaySharp CCTV systems, marketed under the name Samsung SDR-B74301N

---
 arch/arm/boot/dts/Makefile              |   2 +
 arch/arm/boot/dts/hi3521a-rs-dm290e.dts |  52 ++++++
 arch/arm/boot/dts/hi3521a.dtsi          | 310 ++++++++++++++++++++++++++++++++
 3 files changed, 364 insertions(+)
 create mode 100644 arch/arm/boot/dts/hi3521a-rs-dm290e.dts
 create mode 100644 arch/arm/boot/dts/hi3521a.dtsi
arch/arm/boot/dts/Makefile +2 -0
index faf46abaa4a2..e7b9b5dde20f 100644
@@ -189,6 +189,8 @@ dtb-$(CONFIG_ARCH_GEMINI) += \
 	gemini-sq201.dtb \
 	gemini-wbd111.dtb \
 	gemini-wbd222.dtb
+dtb-$(CONFIG_ARCH_HI3521A) += \
+	hi3521a-rs-dm290e.dtb
 dtb-$(CONFIG_ARCH_HI3xxx) += \
 	hi3620-hi4511.dtb
 dtb-$(CONFIG_ARCH_HIGHBANK) += \
arch/arm/boot/dts/hi3521a-rs-dm290e.dts new file +52 -0

52 lines not on this page · raw message

arch/arm/boot/dts/hi3521a.dtsi new file +310 -0

310 lines not on this page · raw message

Signature · 1 line
2.14.1