staging: iio: Replace bit shifting with BIT macro

PATCH Superseded Haneen Mohammed 2 participants 3 messages Sep 17, 2017

Subsystems (4)

Staging IIO Analog Devices IIO drivers Staging - industrial io

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Haneen Mohammed

author

2017-09-17 01:11 UTC #0 lore raw

PATCH 1/1 staging: iio: Replace bit shifting with BIT macro

This patch replace bit shifting on 0, 1, 2, and 3 with BIT(x) macro. Issue resolved with the following Coccinelle script:

@r1@
identifier x;
constant int g;
@@
(
0<<\(x\|g\)
|
1<<\(x\|g\)
|
2<<\(x\|g\)
|
3<<\(x\|g\)
)

@script:python b@
g2 <<r1.g;
y;
@@

coccinelle.y = int(g2) + 1

@c@
constant int r1.g;
identifier b.y;
@@
(
-(1 << g)
+BIT(g)
|
-(0 << g)
+ 0
|
-(2 << g)
+BIT(y)
|
-(3 << g)
+(BIT(y) | BIT(g))
)

Signed-off-by Haneen Mohammed <[email protected]>

---
 drivers/staging/iio/impedance-analyzer/ad5933.c | 38 ++++++++++++-------------
 1 file changed, 19 insertions(+), 19 deletions(-)

drivers/staging/iio/impedance-analyzer/ad5933.c +19 ~~-19~~

index 3d539ee..83d1a92 100644
@@ -35,32 +35,32 @@
 #define AD5933_REG_IMAG_DATA		0x96	/* R, 2 bytes*/
 
 /* AD5933_REG_CONTROL_HB Bits */
-#define AD5933_CTRL_INIT_START_FREQ	(0x1 << 4)
-#define AD5933_CTRL_START_SWEEP		(0x2 << 4)
-#define AD5933_CTRL_INC_FREQ		(0x3 << 4)
+#define AD5933_CTRL_INIT_START_FREQ	BIT(4)
+#define AD5933_CTRL_START_SWEEP		BIT(5)
+#define AD5933_CTRL_INC_FREQ		(BIT(5) | BIT(4))
 #define AD5933_CTRL_REPEAT_FREQ		(0x4 << 4)
 #define AD5933_CTRL_MEASURE_TEMP	(0x9 << 4)
 #define AD5933_CTRL_POWER_DOWN		(0xA << 4)
 #define AD5933_CTRL_STANDBY		(0xB << 4)
 
-#define AD5933_CTRL_RANGE_2000mVpp	(0x0 << 1)
-#define AD5933_CTRL_RANGE_200mVpp	(0x1 << 1)
-#define AD5933_CTRL_RANGE_400mVpp	(0x2 << 1)
-#define AD5933_CTRL_RANGE_1000mVpp	(0x3 << 1)
+#define AD5933_CTRL_RANGE_2000mVpp	0
+#define AD5933_CTRL_RANGE_200mVpp	BIT(1)
+#define AD5933_CTRL_RANGE_400mVpp	BIT(2)
+#define AD5933_CTRL_RANGE_1000mVpp	(BIT(2) | BIT(1))
 #define AD5933_CTRL_RANGE(x)		((x) << 1)
 
-#define AD5933_CTRL_PGA_GAIN_1		(0x1 << 0)
-#define AD5933_CTRL_PGA_GAIN_5		(0x0 << 0)
+#define AD5933_CTRL_PGA_GAIN_1		BIT(0)
+#define AD5933_CTRL_PGA_GAIN_5		0
 
 /* AD5933_REG_CONTROL_LB Bits */
-#define AD5933_CTRL_RESET		(0x1 << 4)
-#define AD5933_CTRL_INT_SYSCLK		(0x0 << 3)
-#define AD5933_CTRL_EXT_SYSCLK		(0x1 << 3)
+#define AD5933_CTRL_RESET		BIT(4)
+#define AD5933_CTRL_INT_SYSCLK		0
+#define AD5933_CTRL_EXT_SYSCLK		BIT(3)
 
 /* AD5933_REG_STATUS Bits */
-#define AD5933_STAT_TEMP_VALID		(0x1 << 0)
-#define AD5933_STAT_DATA_VALID		(0x1 << 1)
-#define AD5933_STAT_SWEEP_DONE		(0x1 << 2)
+#define AD5933_STAT_TEMP_VALID		BIT(0)
+#define AD5933_STAT_DATA_VALID		BIT(1)
+#define AD5933_STAT_SWEEP_DONE		BIT(2)
 
 /* I2C Block Commands */
 #define AD5933_I2C_BLOCK_WRITE		0xA0

@@ -229,7 +229,7 @@ static int ad5933_set_freq(struct ad5933_state *st,
 		u8 d8[4];
 	} dat;
 
-	freqreg = (u64) freq * (u64) (1 << 27);
+	freqreg = (u64)freq * (u64)BIT(27);
 	do_div(freqreg, st->mclk_hz / 4);
 
 	switch (reg) {

@@ -318,7 +318,7 @@ static ssize_t ad5933_show_frequency(struct device *dev,
 	freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
 
 	freqreg = (u64)freqreg * (u64)(st->mclk_hz / 4);
-	do_div(freqreg, 1 << 27);
+	do_div(freqreg, BIT(27));
 
 	return sprintf(buf, "%d\n", (int)freqreg);
 }

@@ -452,9 +452,9 @@ static ssize_t ad5933_store(struct device *dev,
 
 		/* 2x, 4x handling, see datasheet */
 		if (val > 1022)
-			val = (val >> 2) | (3 << 9);
+			val = (val >> 2) | (BIT(10) | BIT(9));
 		else if (val > 511)
-			val = (val >> 1) | (1 << 9);
+			val = (val >> 1) | BIT(9);
 
 		dat = cpu_to_be16(val);
 		ret = ad5933_i2c_write(st->client,

Signature · 1 line

2.7.4

Julia Lawall

2017-09-17 06:56 UTC #1 lore raw

Quoted 40 lines · Haneen Mohammed

This patch replace bit shifting on 0, 1, 2, and 3 with BIT(x) macro. Issue resolved with the following Coccinelle script:
@r1@
identifier x;
constant int g;
@@
(
0<<\(x\|g\)
|
1<<\(x\|g\)
|
2<<\(x\|g\)
|
3<<\(x\|g\)
)
@script:python b@
g2 <<r1.g;
y;
@@
coccinelle.y = int(g2) + 1
@c@
constant int r1.g;
identifier b.y;
@@
(
(quoted diff) +1 -1
-(1 << g)
+BIT(g)
|
-(0 << g)
+ 0
|
(quoted diff) +1 -1
-(2 << g)
+BIT(y)
|
(quoted diff) +1 -1
-(3 << g)
+(BIT(y) | BIT(g))

Quoted 1 line

)

Really good job on the semantic patch.

Quoted 14 lines

Signed-off-by Haneen Mohammed <[email protected]>

---
 drivers/staging/iio/impedance-analyzer/ad5933.c | 38 ++++++++++++-------------
 1 file changed, 19 insertions(+), 19 deletions(-)

drivers/staging/iio/impedance-analyzer/ad5933.c +0 -0

index 3d539ee..83d1a92 100644
@@ -35,32 +35,32 @@
 #define AD5933_REG_IMAG_DATA		0x96	/* R, 2 bytes*/
 
 /* AD5933_REG_CONTROL_HB Bits */

drivers/staging/iio/impedance-analyzer/ad5933.c line 44

Quoted 10 lines

drivers/staging/iio/impedance-analyzer/ad5933.c +3 -3

-#define AD5933_CTRL_INIT_START_FREQ	(0x1 << 4)
-#define AD5933_CTRL_START_SWEEP		(0x2 << 4)
-#define AD5933_CTRL_INC_FREQ		(0x3 << 4)
+#define AD5933_CTRL_INIT_START_FREQ	BIT(4)
+#define AD5933_CTRL_START_SWEEP		BIT(5)
+#define AD5933_CTRL_INC_FREQ		(BIT(5) | BIT(4))
 #define AD5933_CTRL_REPEAT_FREQ		(0x4 << 4)
 #define AD5933_CTRL_MEASURE_TEMP	(0x9 << 4)
 #define AD5933_CTRL_POWER_DOWN		(0xA << 4)
 #define AD5933_CTRL_STANDBY		(0xB << 4)

I'm not sure that this is a good idea. Its more confusing than helpful to have the different styles mixed up.

Quoted 4 lines

drivers/staging/iio/impedance-analyzer/ad5933.c +0 -4

-#define AD5933_CTRL_RANGE_2000mVpp	(0x0 << 1)
-#define AD5933_CTRL_RANGE_200mVpp	(0x1 << 1)
-#define AD5933_CTRL_RANGE_400mVpp	(0x2 << 1)
-#define AD5933_CTRL_RANGE_1000mVpp	(0x3 << 1)

drivers/staging/iio/impedance-analyzer/ad5933.c line 53

Quoted 10 lines

drivers/staging/iio/impedance-analyzer/ad5933.c +6 -2

+#define AD5933_CTRL_RANGE_2000mVpp	0
+#define AD5933_CTRL_RANGE_200mVpp	BIT(1)
+#define AD5933_CTRL_RANGE_400mVpp	BIT(2)
+#define AD5933_CTRL_RANGE_1000mVpp	(BIT(2) | BIT(1))
 #define AD5933_CTRL_RANGE(x)		((x) << 1)
 
-#define AD5933_CTRL_PGA_GAIN_1		(0x1 << 0)
-#define AD5933_CTRL_PGA_GAIN_5		(0x0 << 0)
+#define AD5933_CTRL_PGA_GAIN_1		BIT(0)
+#define AD5933_CTRL_PGA_GAIN_5		0

Again, this mixes styles. Even though 0 << 0 is pretty silly as computation, it lines up well with what is above.

drivers/staging/iio/impedance-analyzer/ad5933.c line 58

Quoted 7 lines

drivers/staging/iio/impedance-analyzer/ad5933.c +3 -3

 /* AD5933_REG_CONTROL_LB Bits */
-#define AD5933_CTRL_RESET		(0x1 << 4)
-#define AD5933_CTRL_INT_SYSCLK		(0x0 << 3)
-#define AD5933_CTRL_EXT_SYSCLK		(0x1 << 3)
+#define AD5933_CTRL_RESET		BIT(4)
+#define AD5933_CTRL_INT_SYSCLK		0
+#define AD5933_CTRL_EXT_SYSCLK		BIT(3)

Likewise.

Quoted 29 lines

drivers/staging/iio/impedance-analyzer/ad5933.c +5 -5

 /* AD5933_REG_STATUS Bits */
-#define AD5933_STAT_TEMP_VALID		(0x1 << 0)
-#define AD5933_STAT_DATA_VALID		(0x1 << 1)
-#define AD5933_STAT_SWEEP_DONE		(0x1 << 2)
+#define AD5933_STAT_TEMP_VALID		BIT(0)
+#define AD5933_STAT_DATA_VALID		BIT(1)
+#define AD5933_STAT_SWEEP_DONE		BIT(2)
 
 /* I2C Block Commands */
 #define AD5933_I2C_BLOCK_WRITE		0xA0

@@ -229,7 +229,7 @@ static int ad5933_set_freq(struct ad5933_state *st,
 		u8 d8[4];
 	} dat;
 
-	freqreg = (u64) freq * (u64) (1 << 27);
+	freqreg = (u64)freq * (u64)BIT(27);
 	do_div(freqreg, st->mclk_hz / 4);
 
 	switch (reg) {

@@ -318,7 +318,7 @@ static ssize_t ad5933_show_frequency(struct device *dev,
 	freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
 
 	freqreg = (u64)freqreg * (u64)(st->mclk_hz / 4);
-	do_div(freqreg, 1 << 27);
+	do_div(freqreg, BIT(27));
 
 	return sprintf(buf, "%d\n", (int)freqreg);
 }

drivers/staging/iio/impedance-analyzer/ad5933.c static ssize_t ad5933_store(struct device *dev, · line 455

Quoted 5 lines

drivers/staging/iio/impedance-analyzer/ad5933.c +1 -1

@@ -452,9 +452,9 @@ static ssize_t ad5933_store(struct device *dev,
 
 		/* 2x, 4x handling, see datasheet */
 		if (val > 1022)
-			val = (val >> 2) | (3 << 9);
+			val = (val >> 2) | (BIT(10) | BIT(9));

This would be better without the parentheses on (BIT(10) | BIT(9)

julia

Quoted 16 lines

drivers/staging/iio/impedance-analyzer/ad5933.c +1 -2
 		else if (val > 511)
-			val = (val >> 1) | (1 << 9);
+			val = (val >> 1) | BIT(9);
 
 		dat = cpu_to_be16(val);
 		ret = ad5933_i2c_write(st->client,
--
2.7.4
--
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Haneen Mohammed

author

2017-09-17 18:30 UTC #2 lore raw

Quoted 39 lines · Julia Lawall

Quoted 35 lines · Haneen Mohammed
This patch replace bit shifting on 0, 1, 2, and 3 with BIT(x) macro. Issue resolved with the following Coccinelle script:
@r1@
identifier x;
constant int g;
@@
(
0<<\(x\|g\)
|
1<<\(x\|g\)
|
2<<\(x\|g\)
|
3<<\(x\|g\)
)
@script:python b@
g2 <<r1.g;
y;
@@
coccinelle.y = int(g2) + 1
@c@
constant int r1.g;
identifier b.y;
@@
(
(quoted diff) +1 -1
-(1 << g)
+BIT(g)
|
-(0 << g)
+ 0
|

Quoted 10 lines

Quoted 6 lines
(quoted diff) +1 -1
-(2 << g)
+BIT(y)
|
(quoted diff) +1 -1
-(3 << g)
+(BIT(y) | BIT(g))
)
Really good job on the semantic patch.

Thank you! I remember you helped me with it two years ago :)

Quoted 13 lines

Quoted 13 lines
Signed-off-by Haneen Mohammed <[email protected]>
---
 drivers/staging/iio/impedance-analyzer/ad5933.c | 38 ++++++++++++-------------
 1 file changed, 19 insertions(+), 19 deletions(-)
drivers/staging/iio/impedance-analyzer/ad5933.c +0 -0
index 3d539ee..83d1a92 100644
@@ -35,32 +35,32 @@
 #define AD5933_REG_IMAG_DATA		0x96	/* R, 2 bytes*/
 

Quoted 16 lines

drivers/staging/iio/impedance-analyzer/ad5933.c line 44

Quoted 11 lines

drivers/staging/iio/impedance-analyzer/ad5933.c +3 -3

 /* AD5933_REG_CONTROL_HB Bits */
-#define AD5933_CTRL_INIT_START_FREQ	(0x1 << 4)
-#define AD5933_CTRL_START_SWEEP		(0x2 << 4)
-#define AD5933_CTRL_INC_FREQ		(0x3 << 4)
+#define AD5933_CTRL_INIT_START_FREQ	BIT(4)
+#define AD5933_CTRL_START_SWEEP		BIT(5)
+#define AD5933_CTRL_INC_FREQ		(BIT(5) | BIT(4))
 #define AD5933_CTRL_REPEAT_FREQ		(0x4 << 4)
 #define AD5933_CTRL_MEASURE_TEMP	(0x9 << 4)
 #define AD5933_CTRL_POWER_DOWN		(0xA << 4)
 #define AD5933_CTRL_STANDBY		(0xB << 4)

I'm not sure that this is a good idea. Its more confusing than helpful to have the different styles mixed up.

I see. I wasn't sure how to convert the others so I left them. I'll remove the bit macro from #define then.

Thank you!
Haneen

Quoted 83 lines

Quoted 4 lines
drivers/staging/iio/impedance-analyzer/ad5933.c +0 -4
-#define AD5933_CTRL_RANGE_2000mVpp	(0x0 << 1)
-#define AD5933_CTRL_RANGE_200mVpp	(0x1 << 1)
-#define AD5933_CTRL_RANGE_400mVpp	(0x2 << 1)
-#define AD5933_CTRL_RANGE_1000mVpp	(0x3 << 1)
drivers/staging/iio/impedance-analyzer/ad5933.c line 53
Quoted 10 lines
drivers/staging/iio/impedance-analyzer/ad5933.c +6 -2
+#define AD5933_CTRL_RANGE_2000mVpp	0
+#define AD5933_CTRL_RANGE_200mVpp	BIT(1)
+#define AD5933_CTRL_RANGE_400mVpp	BIT(2)
+#define AD5933_CTRL_RANGE_1000mVpp	(BIT(2) | BIT(1))
 #define AD5933_CTRL_RANGE(x)		((x) << 1)
 
-#define AD5933_CTRL_PGA_GAIN_1		(0x1 << 0)
-#define AD5933_CTRL_PGA_GAIN_5		(0x0 << 0)
+#define AD5933_CTRL_PGA_GAIN_1		BIT(0)
+#define AD5933_CTRL_PGA_GAIN_5		0
Again, this mixes styles. Even though 0 << 0 is pretty silly as computation, it lines up well with what is above.
drivers/staging/iio/impedance-analyzer/ad5933.c line 58
Quoted 7 lines
drivers/staging/iio/impedance-analyzer/ad5933.c +3 -3
 /* AD5933_REG_CONTROL_LB Bits */
-#define AD5933_CTRL_RESET		(0x1 << 4)
-#define AD5933_CTRL_INT_SYSCLK		(0x0 << 3)
-#define AD5933_CTRL_EXT_SYSCLK		(0x1 << 3)
+#define AD5933_CTRL_RESET		BIT(4)
+#define AD5933_CTRL_INT_SYSCLK		0
+#define AD5933_CTRL_EXT_SYSCLK		BIT(3)
Likewise.
Quoted 29 lines
drivers/staging/iio/impedance-analyzer/ad5933.c +5 -5
 /* AD5933_REG_STATUS Bits */
-#define AD5933_STAT_TEMP_VALID		(0x1 << 0)
-#define AD5933_STAT_DATA_VALID		(0x1 << 1)
-#define AD5933_STAT_SWEEP_DONE		(0x1 << 2)
+#define AD5933_STAT_TEMP_VALID		BIT(0)
+#define AD5933_STAT_DATA_VALID		BIT(1)
+#define AD5933_STAT_SWEEP_DONE		BIT(2)
 
 /* I2C Block Commands */
 #define AD5933_I2C_BLOCK_WRITE		0xA0
@@ -229,7 +229,7 @@ static int ad5933_set_freq(struct ad5933_state *st,
 		u8 d8[4];
 	} dat;
 
-	freqreg = (u64) freq * (u64) (1 << 27);
+	freqreg = (u64)freq * (u64)BIT(27);
 	do_div(freqreg, st->mclk_hz / 4);
 
 	switch (reg) {
@@ -318,7 +318,7 @@ static ssize_t ad5933_show_frequency(struct device *dev,
 	freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
 
 	freqreg = (u64)freqreg * (u64)(st->mclk_hz / 4);
-	do_div(freqreg, 1 << 27);
+	do_div(freqreg, BIT(27));
 
 	return sprintf(buf, "%d\n", (int)freqreg);
 }
drivers/staging/iio/impedance-analyzer/ad5933.c static ssize_t ad5933_store(struct device *dev, · line 455
Quoted 5 lines
drivers/staging/iio/impedance-analyzer/ad5933.c +1 -1
@@ -452,9 +452,9 @@ static ssize_t ad5933_store(struct device *dev,
 
 		/* 2x, 4x handling, see datasheet */
 		if (val > 1022)
-			val = (val >> 2) | (3 << 9);
+			val = (val >> 2) | (BIT(10) | BIT(9));
This would be better without the parentheses on (BIT(10) | BIT(9)
julia
Quoted 16 lines
drivers/staging/iio/impedance-analyzer/ad5933.c +1 -2
 		else if (val > 511)
-			val = (val >> 1) | (1 << 9);
+			val = (val >> 1) | BIT(9);
 
 		dat = cpu_to_be16(val);
 		ret = ad5933_i2c_write(st->client,
--
2.7.4
--
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