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arm64: dts: renesas: Add Support for R-Car D3 and Draak

PATCH New Geert Uytterhoeven 4 participants 10 messages Jul 20, 2017 – Sep 18, 2017 1 message not in the archive

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#0 lore raw

cover arm64: dts: renesas: Add Support for R-Car D3 and Draak

Hi Simon, Magnus,

This patch series adds minimal support for the R-Car D3 SoC and the Draak development board, allowing to boot from a ramdisk using a serial console.

- The first two patches add DT sources for R-Car D3 and Draak. Due to the use of hardcoded constants, they have no further (build) dependencies (obviously there is a runtime dependency).
- The last two patches replace the hardcoded constants by symbols from DT binding headers, and thus depend on those headers. Hence it should be postponed to v4.15.

For proper operation, this depends on the 3 series I have just sent:
- [PATCH 0/3] arm64: renesas: Base R-Car D3 support,
- [PATCH 0/4] soc: renesas: Add R-Car D3 support,
- [PATCH 0/4] clk: renesas: Add R-Car D3 support.

For testing, an integration branch containing all dependencies (and a few DT binding updates I do not want to send before "ARM: shmobile:
Document R-Car D3 SoC DT bindings" has been accepted) is available in the topic/r8a77995-integration branch of the git repository at
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git.

Thanks for your comments!

Geert Uytterhoeven (4):
arm64: dts: renesas: Add Renesas R8A77995 SoC support
arm64: dts: renesas: Add Renesas Draak board support
arm64: dts: renesas: r8a77995: Use r8a7795-sysc binding definitions
arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding
definitions

 arch/arm64/boot/dts/renesas/Makefile           |   1 +
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts |  46 ++++++++
 arch/arm64/boot/dts/renesas/r8a77995.dtsi      | 151 +++++++++++++++++++++++++
 3 files changed, 198 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77995-draak.dts
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77995.dtsi
Signature · 16 lines
2.7.4

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds
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A message that is not in the archive (sent off-list or not yet received): 1500555277-22921-1-git-send-email-geert+renesas-gXvu3+zWzMSzQB+pC5nmwQ@public.gmane.org

#2 lore raw

PATCH 1/4 arm64: dts: renesas: Add Renesas R8A77995 SoC support

Basic support for the R-Car D3 SoC:
- PSCI,
- CPU,
- Cache controller,
- Main clocks and controller,
- Interrupt controller,
- Timer,
- Watchdog,
- PMU,
- Reset controller,
- Product register,
- System controller,
- UART for console.

---
To avoid dependencies on dt-binding headers going in through different paths, clock and power domain indices use hardcoded numbers.

---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 150 ++++++++++++++++++++++++++++++
 1 file changed, 150 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77995.dtsi
arch/arm64/boot/dts/renesas/r8a77995.dtsi new file +150 -0
new file mode 100644
index 0000000000000000..7c69b795cd3ebd82
@@ -0,0 +1,150 @@
+/*
+ * Device Tree Source for the r8a77995 SoC
+ *
+ * Copyright (C) 2016 Renesas Electronics Corp.
+ * Copyright (C) 2017 Glider bvba
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	compatible = "renesas,r8a77995";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	psci {
+		compatible = "arm,psci-1.0", "arm,psci-0.2";
+		method = "smc";
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		a53_0: cpu@0 {
+			compatible = "arm,cortex-a53", "arm,armv8";
+			reg = <0x0>;
+			device_type = "cpu";
+			power-domains = <&sysc 5>;
+			next-level-cache = <&L2_CA53>;
+			enable-method = "psci";
+		};
+
+		L2_CA53: cache-controller-1 {
+			compatible = "cache";
+			power-domains = <&sysc 21>;
+			cache-unified;
+			cache-level = <2>;
+		};
+	};
+
+	extal_clk: extal {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		/* This value must be overridden by the board */
+		clock-frequency = <0>;
+	};
+
+	scif_clk: scif {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <0>;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		interrupt-parent = <&gic>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		gic: interrupt-controller@f1010000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg = <0x0 0xf1010000 0 0x1000>,
+			      <0x0 0xf1020000 0 0x20000>,
+			      <0x0 0xf1040000 0 0x20000>,
+			      <0x0 0xf1060000 0 0x20000>;
+			interrupts = <GIC_PPI 9
+					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
+			clocks = <&cpg CPG_MOD 408>;
+			clock-names = "clk";
+			power-domains = <&sysc 32>;
+			resets = <&cpg 408>;
+		};
+
+		timer {
+			compatible = "arm,armv8-timer";
+			interrupts = <GIC_PPI 13
+					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+				     <GIC_PPI 14
+					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+				     <GIC_PPI 11
+					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+				     <GIC_PPI 10
+					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
+		};
+
+		rwdt: watchdog@e6020000 {
+			compatible = "renesas,r8a77995-wdt",
+				     "renesas,rcar-gen3-wdt";
+			reg = <0 0xe6020000 0 0x0c>;
+			clocks = <&cpg CPG_MOD 402>;
+			power-domains = <&sysc 32>;
+			resets = <&cpg 402>;
+			status = "disabled";
+		};
+
+		pmu_a53 {
+			compatible = "arm,cortex-a53-pmu";
+			interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		cpg: clock-controller@e6150000 {
+			compatible = "renesas,r8a77995-cpg-mssr";
+			reg = <0 0xe6150000 0 0x1000>;
+			clocks = <&extal_clk>;
+			clock-names = "extal";
+			#clock-cells = <2>;
+			#power-domain-cells = <0>;
+			#reset-cells = <1>;
+		};
+
+		rst: reset-controller@e6160000 {
+			compatible = "renesas,r8a77995-rst";
+			reg = <0 0xe6160000 0 0x0200>;
+		};
+
+		prr: chipid@fff00044 {
+			compatible = "renesas,prr";
+			reg = <0 0xfff00044 0 4>;
+		};
+
+		sysc: system-controller@e6180000 {
+			compatible = "renesas,r8a77995-sysc";
+			reg = <0 0xe6180000 0 0x0400>;
+			#power-domain-cells = <1>;
+		};
+
+		scif2: serial@e6e88000 {
+			compatible = "renesas,scif-r8a77995",
+				     "renesas,rcar-gen3-scif", "renesas,scif";
+			reg = <0 0xe6e88000 0 64>;
+			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 310>,
+				 <&cpg CPG_CORE 16>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			power-domains = <&sysc 32>;
+			resets = <&cpg 310>;
+			status = "disabled";
+		};
+	};
+};
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#3 lore raw

PATCH 2/4 arm64: dts: renesas: Add Renesas Draak board support

In reply to a message not in the archive

Basic support for the Renesas Draak board based on R-Car D3:
- Memory,
- Main crystal,
- Serial console,
- Watchdog.

---
 arch/arm64/boot/dts/renesas/Makefile           |  1 +
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 46 ++++++++++++++++++++++++++
 2 files changed, 47 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77995-draak.dts
arch/arm64/boot/dts/renesas/Makefile +1 -0
index acc4bb30d485b6bc..381928bc1358fd9c 100644
@@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-x.dtb r8a7795-h3ulcb.dtb
 dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-salvator-xs.dtb
 dtb-$(CONFIG_ARCH_R8A7795) += r8a7795-es1-salvator-x.dtb r8a7795-es1-h3ulcb.dtb
 dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-x.dtb r8a7796-m3ulcb.dtb
+dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
 
 always		:= $(dtb-y)
 clean-files	:= *.dtb
arch/arm64/boot/dts/renesas/r8a77995-draak.dts new file +46 -0

46 lines not on this page · raw message

Signature · 6 lines
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#4 lore raw

PATCH 3/4 arm64: dts: renesas: r8a77995: Use r8a7795-sysc binding definitions

In reply to Geert Uytterhoeven

Replace the hardcoded power domain indices by R8A77995_PD_* symbols.

---
This depends on "soc: renesas: rcar-sysc: Add support for R-Car D3 power areas".

---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)
arch/arm64/boot/dts/renesas/r8a77995.dtsi +6 -5
index 7c69b795cd3ebd82..b984c174cf7edb70 100644
@@ -11,6 +11,7 @@
 
 #include <dt-bindings/clock/renesas-cpg-mssr.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77995-sysc.h>
 
 / {
 	compatible = "renesas,r8a77995";
@@ -30,14 +31,14 @@
 			compatible = "arm,cortex-a53", "arm,armv8";
 			reg = <0x0>;
 			device_type = "cpu";
-			power-domains = <&sysc 5>;
+			power-domains = <&sysc R8A77995_PD_CA53_CPU0>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
 		};
 
 		L2_CA53: cache-controller-1 {
 			compatible = "cache";
-			power-domains = <&sysc 21>;
+			power-domains = <&sysc R8A77995_PD_CA53_SCU>;
 			cache-unified;
 			cache-level = <2>;
 		};
@@ -76,7 +77,7 @@
 					(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
 			clocks = <&cpg CPG_MOD 408>;
 			clock-names = "clk";
-			power-domains = <&sysc 32>;
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
 			resets = <&cpg 408>;
 		};
 
@@ -97,7 +98,7 @@
 				     "renesas,rcar-gen3-wdt";
 			reg = <0 0xe6020000 0 0x0c>;
 			clocks = <&cpg CPG_MOD 402>;
-			power-domains = <&sysc 32>;
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
 			resets = <&cpg 402>;
 			status = "disabled";
 		};
@@ -142,7 +143,7 @@
 				 <&cpg CPG_CORE 16>,
 				 <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
-			power-domains = <&sysc 32>;
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
 			resets = <&cpg 310>;
 			status = "disabled";
 		};
Signature · 1 line
2.7.4
#5 lore raw

PATCH 4/4 arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding definitions

In reply to Geert Uytterhoeven

Replace the hardcoded clock indices by R8A77995_CLK_* symbols.

---
This depends on "clk: renesas: Add r8a77995 CPG Core Clock Definitions".

---
 arch/arm64/boot/dts/renesas/r8a77995.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/renesas/r8a77995.dtsi +2 -2
index b984c174cf7edb70..74196882e555929d 100644
@@ -9,7 +9,7 @@
  * kind, whether express or implied.
  */
 
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/clock/r8a77995-cpg-mssr.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/r8a77995-sysc.h>
 
@@ -140,7 +140,7 @@
 			reg = <0 0xe6e88000 0 64>;
 			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 310>,
-				 <&cpg CPG_CORE 16>,
+				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
 				 <&scif_clk>;
 			clock-names = "fck", "brg_int", "scif_clk";
 			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
Signature · 1 line
2.7.4
#6 lore raw

cover arm64: dts: renesas: Add Support for R-Car D3 and Draak

In reply to Geert Uytterhoeven
Quoted 6 lines · Geert Uytterhoeven

This patch series adds minimal support for the R-Car D3 SoC and the Draak development board, allowing to boot from a ramdisk using a serial console.

arm64: dts: renesas: r8a77995: Use r8a7795-sysc binding definitions
arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding

                                       ^^^^^^^
                                       r8a77995

Bummer, these were the first (and definitely not the last :-( typos for R-Car D3 part numbers...

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#7 lore raw

cover arm64: dts: renesas: Add Support for R-Car D3 and Draak

In reply to Geert Uytterhoeven
Quoted 13 lines · Geert Uytterhoeven

Hi Simon, Magnus,

This patch series adds minimal support for the R-Car D3 SoC and the Draak development board, allowing to boot from a ramdisk using a serial console.

- The first two patches add DT sources for R-Car D3 and Draak. Due to the use of hardcoded constants, they have no further (build) dependencies (obviously there is a runtime dependency).
- The last two patches replace the hardcoded constants by symbols from DT binding headers, and thus depend on those headers. Hence it should be postponed to v4.15.

Quoted 2 lines

For proper operation, this depends on the 3 series I have just sent:
- [PATCH 0/3] arm64: renesas: Base R-Car D3 support,

I have applied the above patchset for v4.14.

Quoted 1 line

- [PATCH 0/4] soc: renesas: Add R-Car D3 support,

And this one too.

Quoted 1 line

- [PATCH 0/4] clk: renesas: Add R-Car D3 support.

And this one seems to have been acked, so I assume you will apply it once you are back from holidays.

So I have applied the first two patches for v4.14.
Please repost the remaining two after v4.13-rc6 at which time I should be able to queue them up for v4.15.

Quoted 36 lines

For testing, an integration branch containing all dependencies (and a few DT binding updates I do not want to send before "ARM: shmobile:
Document R-Car D3 SoC DT bindings" has been accepted) is available in the topic/r8a77995-integration branch of the git repository at
https://git.kernel.org/cgit/linux/kernel/git/geert/renesas-drivers.git.

Thanks for your comments!

Geert Uytterhoeven (4):
arm64: dts: renesas: Add Renesas R8A77995 SoC support
arm64: dts: renesas: Add Renesas Draak board support
arm64: dts: renesas: r8a77995: Use r8a7795-sysc binding definitions
arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding
definitions

 arch/arm64/boot/dts/renesas/Makefile           |   1 +
 arch/arm64/boot/dts/renesas/r8a77995-draak.dts |  46 ++++++++
 arch/arm64/boot/dts/renesas/r8a77995.dtsi      | 151 +++++++++++++++++++++++++
 3 files changed, 198 insertions(+)
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77995-draak.dts
 create mode 100644 arch/arm64/boot/dts/renesas/r8a77995.dtsi
Signature · 12 lines
2.7.4

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds
#8 lore raw

cover arm64: dts: renesas: Add Support for R-Car D3 and Draak

Hi Simon,

Quoted 5 lines · Simon Horman
Quoted 4 lines · Geert Uytterhoeven

This patch series adds minimal support for the R-Car D3 SoC and the Draak development board, allowing to boot from a ramdisk using a serial console.

Quoted 8 lines
Quoted 6 lines

- The first two patches add DT sources for R-Car D3 and Draak. Due to the use of hardcoded constants, they have no further (build) dependencies (obviously there is a runtime dependency).
- The last two patches replace the hardcoded constants by symbols from DT binding headers, and thus depend on those headers. Hence it should be postponed to v4.15.

So I have applied the first two patches for v4.14.

Thank you!

Quoted 2 lines

Please repost the remaining two after v4.13-rc6 at which time I should be able to queue them up for v4.15.

You mean after v4.14-rc1? Else you still won't have them in renesas-devel.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

#9 lore raw

cover arm64: dts: renesas: Add Support for R-Car D3 and Draak

Quoted 15 lines · Geert Uytterhoeven

Hi Simon,

Quoted 11 lines · Simon Horman
Quoted 10 lines · Geert Uytterhoeven

This patch series adds minimal support for the R-Car D3 SoC and the Draak development board, allowing to boot from a ramdisk using a serial console.

- The first two patches add DT sources for R-Car D3 and Draak. Due to the use of hardcoded constants, they have no further (build) dependencies (obviously there is a runtime dependency).
- The last two patches replace the hardcoded constants by symbols from DT binding headers, and thus depend on those headers. Hence it should be postponed to v4.15.

Quoted 8 lines
Quoted 1 line

So I have applied the first two patches for v4.14.

Thank you!

Quoted 2 lines

Please repost the remaining two after v4.13-rc6 at which time I should be able to queue them up for v4.15.

You mean after v4.14-rc1? Else you still won't have them in renesas-devel.

I was thinking I could merge a stable branch in after v4.13-rc6. But waiting for v4.14-rc1 is simpler for me.

#10 lore raw

cover arm64: dts: renesas: Add Support for R-Car D3 and Draak

In reply to Simon Horman
Quoted 23 lines · Simon Horman
Quoted 13 lines · Geert Uytterhoeven

Hi Simon, Magnus,

This patch series adds minimal support for the R-Car D3 SoC and the Draak development board, allowing to boot from a ramdisk using a serial console.

- The first two patches add DT sources for R-Car D3 and Draak. Due to the use of hardcoded constants, they have no further (build) dependencies (obviously there is a runtime dependency).
- The last two patches replace the hardcoded constants by symbols from DT binding headers, and thus depend on those headers. Hence it should be postponed to v4.15.

Quoted 2 lines

For proper operation, this depends on the 3 series I have just sent:
- [PATCH 0/3] arm64: renesas: Base R-Car D3 support,

I have applied the above patchset for v4.14.

Quoted 1 line

- [PATCH 0/4] soc: renesas: Add R-Car D3 support,

And this one too.

Quoted 8 lines
Quoted 1 line

- [PATCH 0/4] clk: renesas: Add R-Car D3 support.

And this one seems to have been acked, so I assume you will apply it once you are back from holidays.

So I have applied the first two patches for v4.14.
Please repost the remaining two after v4.13-rc6 at which time I should be able to queue them up for v4.15.

I have now done so.