crypto: Add driver for JZ4780 PRNG
Subsystems (5)
v3 cover crypto: Add driver for JZ4780 PRNG
This patch series adds support of pseudo random number generator found in Ingenic's JZ4780 and X1000 SoC.
Create cgublock node which has CGU and RNG node as its children. The cgublock node uses "simple-bus" compatible which helps in exposing CGU and RNG nodes without changing CGU driver. Add 'syscon' compatible in CGU node in jz4780.dtsi. The jz4780-rng driver uses regmap exposed via syscon interface to access the RNG registers. CGU driver is not modified in this patch set as registers used by CGU driver and this driver are different.
PrasannaKumar Muralidharan (4):
crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
crypto: jz4780-rng: Add RNG node to jz4780.dtsi
crypto: jz4780-rng: Enable PRNG support in CI20 defconfig
.../devicetree/bindings/rng/ingenic,jz4780-rng.txt | 21 +++ MAINTAINERS | 7 + arch/mips/boot/dts/ingenic/jz4780.dtsi | 25 ++- arch/mips/configs/ci20_defconfig | 5 + drivers/crypto/Kconfig | 19 ++ drivers/crypto/Makefile | 1 + drivers/crypto/jz4780-rng.c | 193 +++++++++++++++++++++ 7 files changed, 266 insertions(+), 5 deletions(-) create mode 100644 Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt create mode 100644 drivers/crypto/jz4780-rng.c
Signature · 1 line
2.10.0
PATCH v3 1/4 crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
Add devicetree bindings for hardware pseudo random number generator present in Ingenic JZ4780 SoC.
---
Changes in v3:
* Create a cgublock node with "simple-bus" compatible
* Make CGU and RNG node as children of cgublock node.
Changes in v2:
* Add "syscon" in CGU node's compatible section
* Make RNG child node of CGU.
.../devicetree/bindings/rng/ingenic,jz4780-rng.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt
Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt new file +21 -0
@@ -0,0 +1,21 @@ +Ingenic jz4780 RNG driver + +Required properties: +- compatible : Should be "ingenic,jz4780-rng" + +Example: + +cgublock { + compatible = "simple-bus"; + + #address-cells = <1>; + #size-cells = <1>; + + reg = <0x10000000 0x100>; + ranges; + + rng: rng@d8 { + compatible = "ingenic,jz4780-rng"; + reg = <0x100000d8 0x8>; + }; +};
Signature · 1 line
2.10.0
PATCH v3 2/4 crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
In reply to PrasannaKumar MuralidharanJZ4780 SoC pseudo random number generator driver using crypto framework.
Adding a delay before reading RNG data and disabling RNG after reading data was suggested by Jeffery Walton.
---
Changes in v3:
* Add seeding support
* Reduce delay
Changes in v2:
* Fixed buffer overflow in generate function pointed out in Stephan's review
* Fold patch that had only MAINTAINERS file change with this patch
* Removed unnecessary comment in code
MAINTAINERS | 7 ++ drivers/crypto/Kconfig | 19 +++++ drivers/crypto/Makefile | 1 + drivers/crypto/jz4780-rng.c | 193 ++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 220 insertions(+) create mode 100644 drivers/crypto/jz4780-rng.c
MAINTAINERS +7 -0
@@ -6783,6 +6783,13 @@ L: [email protected] S: Maintained F: drivers/mtd/nand/jz4780_* +INGENIC JZ4780 PRNG DRIVER +M: PrasannaKumar Muralidharan <[email protected]> +L: [email protected] +S: Maintained +F: drivers/crypto/jz4780-rng.c +F: Documentation/devicetree/bindings/rng/ingenic,jz4780-rng.txt + INOTIFY M: Jan Kara <[email protected]> R: Amir Goldstein <[email protected]>
drivers/crypto/Kconfig +19 -0
@@ -613,6 +613,25 @@ config CRYPTO_DEV_IMGTEC_HASH hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256 hashing algorithms. +config CRYPTO_DEV_JZ4780_RNG + tristate "JZ4780 HW pseudo random number generator support" + depends on MACH_JZ4780 || COMPILE_TEST + depends on HAS_IOMEM + select CRYPTO_RNG + select REGMAP + select SYSCON + select MFD_SYSCON + ---help--- + This driver provides kernel-side support through the + cryptographic API for the pseudo random number generator + hardware found in ingenic JZ4780 and X1000 SoC. MIPS + Creator CI20 uses JZ4780 SoC. + + To compile this driver as a module, choose M here: the + module will be called jz4780-rng. + + If unsure, say Y. + config CRYPTO_DEV_SUN4I_SS tristate "Support for Allwinner Security System cryptographic accelerator" depends on ARCH_SUNXI && !64BIT
drivers/crypto/Makefile +1 -0
@@ -14,6 +14,7 @@ obj-$(CONFIG_CRYPTO_DEV_GEODE) += geode-aes.o obj-$(CONFIG_CRYPTO_DEV_HIFN_795X) += hifn_795x.o obj-$(CONFIG_CRYPTO_DEV_IMGTEC_HASH) += img-hash.o obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o +obj-$(CONFIG_CRYPTO_DEV_JZ4780_RNG) += jz4780-rng.o obj-$(CONFIG_CRYPTO_DEV_MV_CESA) += mv_cesa.o obj-$(CONFIG_CRYPTO_DEV_MARVELL_CESA) += marvell/ obj-$(CONFIG_CRYPTO_DEV_MEDIATEK) += mediatek/
drivers/crypto/jz4780-rng.c new file +193 -0
193 lines not on this page · raw message
Signature · 1 line
2.10.0
PATCH v3 3/4 crypto: jz4780-rng: Add RNG node to jz4780.dtsi
In reply to PrasannaKumar MuralidharanAdd RNG node to jz4780 dtsi. This driver uses registers that are part of the register set used by Ingenic CGU driver. Use regmap in RNG driver to access its register. Create 'simple-bus' node, make CGU and RNG node as child of it so that both the nodes are visible without changing CGU driver code.
---
Changes in v3:
* Create a cgublock node with "simple-bus" compatible
* Make CGU and RNG node as children of cgublock node.
Changes in v2:
* Add "syscon" in CGU node's compatible section
* Make RNG child node of CGU.
arch/mips/boot/dts/ingenic/jz4780.dtsi | 25 ++++++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-)
arch/mips/boot/dts/ingenic/jz4780.dtsi +20 -5
@@ -34,14 +34,29 @@ clock-frequency = <32768>; }; - cgu: jz4780-cgu@10000000 { - compatible = "ingenic,jz4780-cgu"; + cgublock { + compatible = "simple-bus"; + + #address-cells = <1>; + #size-cells = <1>; + reg = <0x10000000 0x100>; + ranges; - clocks = <&ext>, <&rtc>; - clock-names = "ext", "rtc"; + cgu: jz4780-cgu@0 { + compatible = "ingenic,jz4780-cgu"; + reg = <0x10000000 0x100>; - #clock-cells = <1>; + clocks = <&ext>, <&rtc>; + clock-names = "ext", "rtc"; + + #clock-cells = <1>; + }; + + rng: rng@d8 { + compatible = "ingenic,jz4780-rng"; + reg = <0x100000d8 0x8>; + }; }; pinctrl: pin-controller@10010000 {
Signature · 1 line
2.10.0
Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi
Quoted 7 lines · PrasannaKumar Muralidharan
Add RNG node to jz4780 dtsi. This driver uses registers that are part of the register set used by Ingenic CGU driver. Use regmap in RNG driver to access its register. Create 'simple-bus' node, make CGU and RNG node as child of it so that both the nodes are visible without changing CGU driver code.
Signed-off-by PrasannaKumar Muralidharan <[email protected]>
Better late than never:
(I presume its okay for the reg ranges to overlap, ISTR that being an issue a few years ago, but maybe thats fixed now).
Cheers
James
Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi
Quoted 6 lines · James Hogan
Quoted 5 lines · PrasannaKumar Muralidharan
Add RNG node to jz4780 dtsi. This driver uses registers that are part of the register set used by Ingenic CGU driver. Use regmap in RNG driver to access its register. Create 'simple-bus' node, make CGU and RNG node as child of it so that both the nodes are visible without changing CGU driver code.
The goal should be to avoid changing the DT (because the h/w hasn't changed), not avoid changing a driver.
Quoted 8 lines
Quoted 2 lines
Signed-off-by PrasannaKumar Muralidharan <[email protected]>Better late than never:
Acked-by James Hogan <[email protected]>(I presume its okay for the reg ranges to overlap, ISTR that being an issue a few years ago, but maybe thats fixed now).
No, that should be avoided. It does work because we have existing cases that have to be supported.
Quoted 3 lines
Cheers
James
Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi
Hi Rob,
Quoted 10 lines · Rob Herring
Quoted 6 lines · James Hogan
Quoted 5 lines · PrasannaKumar Muralidharan
Add RNG node to jz4780 dtsi. This driver uses registers that are part of the register set used by Ingenic CGU driver. Use regmap in RNG driver to access its register. Create 'simple-bus' node, make CGU and RNG node as child of it so that both the nodes are visible without changing CGU driver code.
The goal should be to avoid changing the DT (because the h/w hasn't changed), not avoid changing a driver.
Please have a look at the discussion happened at
https://patchwork.linux-mips.org/patch/14094/. Looks like there is a difference in though process between you and mips folks. I am not an expert in DT so please suggest me the correct way to go about this.
Quoted 11 lines
Quoted 8 lines
Quoted 2 lines
Signed-off-by PrasannaKumar Muralidharan <[email protected]>Better late than never:
Acked-by James Hogan <[email protected]>(I presume its okay for the reg ranges to overlap, ISTR that being an issue a few years ago, but maybe thats fixed now).
No, that should be avoided. It does work because we have existing cases that have to be supported.
I am sorry but I require guidance here. Do you have any suggestion on how this should be.
Quoted 3 lines
Quoted 3 lines
Cheers
James
Thanks and regards,
PrasannaKumar
Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi
Quoted 11 lines · PrasannaKumar Muralidharan
Hi Rob,
Quoted 8 lines · Rob Herring
Quoted 6 lines · James Hogan
Quoted 5 lines · PrasannaKumar Muralidharan
Add RNG node to jz4780 dtsi. This driver uses registers that are part of the register set used by Ingenic CGU driver. Use regmap in RNG driver to access its register. Create 'simple-bus' node, make CGU and RNG node as child of it so that both the nodes are visible without changing CGU driver code.
Quoted 7 lines
Quoted 2 lines
The goal should be to avoid changing the DT (because the h/w hasn't changed), not avoid changing a driver.
Please have a look at the discussion happened at
https://patchwork.linux-mips.org/patch/14094/. Looks like there is a difference in though process between you and mips folks. I am not an expert in DT so please suggest me the correct way to go about this.
Those comments are correct too.
Simply, there is no reason you have to add a rng node to add an RNG driver. The driver that probes the existing node can register both clocks and as an RNG provider.
Rob
Paul Cercueil
maintainerRe: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi
In reply to James HoganLe 2018-03-06 10:32, James Hogan a écrit :
Quoted 9 lines · PrasannaKumar Muralidharan
Quoted 7 lines
Add RNG node to jz4780 dtsi. This driver uses registers that are part of the register set used by Ingenic CGU driver. Use regmap in RNG driver to access its register. Create 'simple-bus' node, make CGU and RNG node as child of it so that both the nodes are visible without changing CGU driver code.
Signed-off-by PrasannaKumar Muralidharan <[email protected]>
Quoted 8 lines
Better late than never:
Acked-by James Hogan <[email protected]>(I presume its okay for the reg ranges to overlap, ISTR that being an issue a few years ago, but maybe thats fixed now).
Cheers
James
What bothers me is that the CGU code has not been modified to use regmap, so the registers area is actually mapped twice (once in the CGU driver, once with regmap).
Besides, regmap would be useful if the RNG registers were actually located in the middle of the register area used by the CGU driver, which is not the case here. The CGU block does have some registers after the RNG ones on the X1000 SoC, but I don't think they will ever be used (and if they are it won't be by the CGU driver).
Regards,
-Paul
Re: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi
Hi Paul,
Quoted 20 lines · Paul Cercueil
Quoted 19 lines · James Hogan
Quoted 8 lines · PrasannaKumar Muralidharan
Add RNG node to jz4780 dtsi. This driver uses registers that are part of the register set used by Ingenic CGU driver. Use regmap in RNG driver to access its register. Create 'simple-bus' node, make CGU and RNG node as child of it so that both the nodes are visible without changing CGU driver code.
Signed-off-by PrasannaKumar Muralidharan <[email protected]>Better late than never:
Acked-by James Hogan <[email protected]>(I presume its okay for the reg ranges to overlap, ISTR that being an issue a few years ago, but maybe thats fixed now).
Quoted 8 lines
Quoted 2 lines
Cheers
JamesWhat bothers me is that the CGU code has not been modified to use regmap, so the
registers area is actually mapped twice (once in the CGU driver, once with regmap).
One of my previous versions changed CGU code to use regmap. I got a review comment saying that is not required
(https://patchwork.kernel.org/patch/9906889/). The points in the comment were valid so I reverted the change. Please have a look at the discussion.
Quoted 11 lines
Besides, regmap would be useful if the RNG registers were actually located in the
middle of the register area used by the CGU driver, which is not the case here.
The CGU block does have some registers after the RNG ones on the X1000 SoC, but
I don't think they will ever be used (and if they are it won't be by the CGU driver).Regards,
-Paul
Ingenic M200 SoC's CGU has clock and power related registers after the RNG registers. Paul Burton suggested using regmap to expose registers to CGU and RNG drivers
(https://patchwork.linux-mips.org/patch/14094/).
Regards,
PrasannaKumar
Paul Cercueil
maintainerRe: [PATCH v3 3/4] crypto: jz4780-rng: Add RNG node to jz4780.dtsi
Hi PrasannaKumar,
Le 2018-03-07 15:51, PrasannaKumar Muralidharan a écrit :
Quoted 32 lines
Hi Paul,
Quoted 20 lines · Paul Cercueil
Quoted 19 lines · James Hogan
Quoted 8 lines · PrasannaKumar Muralidharan
Add RNG node to jz4780 dtsi. This driver uses registers that are part of the register set used by Ingenic CGU driver. Use regmap in RNG driver to access its register. Create 'simple-bus' node, make CGU and RNG node as child of it so that both the nodes are visible without changing CGU driver code.
Signed-off-by PrasannaKumar Muralidharan <[email protected]>Better late than never:
Acked-by James Hogan <[email protected]>(I presume its okay for the reg ranges to overlap, ISTR that being an issue a few years ago, but maybe thats fixed now).
Quoted 8 lines
Quoted 2 lines
Cheers
JamesWhat bothers me is that the CGU code has not been modified to use regmap, so the
registers area is actually mapped twice (once in the CGU driver, once with regmap).
Quoted 5 lines
One of my previous versions changed CGU code to use regmap. I got a review comment saying that is not required
(https://patchwork.kernel.org/patch/9906889/). The points in the comment were valid so I reverted the change. Please have a look at the discussion.
I don't know, the point of regmap is for when a register area is shared. It does not make sense to me to have one driver use regmap and not the other one.
Quoted 9 lines
Quoted 9 lines
Besides, regmap would be useful if the RNG registers were actually located in the
middle of the register area used by the CGU driver, which is not the case here.
The CGU block does have some registers after the RNG ones on the X1000 SoC, but
I don't think they will ever be used (and if they are it won't be by the CGU driver).
Quoted 7 lines
Quoted 2 lines
Regards,
-PaulIngenic M200 SoC's CGU has clock and power related registers after the RNG registers. Paul Burton suggested using regmap to expose registers to CGU and RNG drivers
(https://patchwork.linux-mips.org/patch/14094/).
Where can I find the M200 programming manual? The M200's CGU might have some registers located after the RNG ones, but that does not mean that they will be used by the clocks driver.
Thanks,
-Paul
PATCH v3 4/4 crypto: jz4780-rng: Enable PRNG support in CI20 defconfig
In reply to PrasannaKumar MuralidharanEnable PRNG driver support in MIPS Creator CI20 default config.
---
No changes in v3
No changes in v2
arch/mips/configs/ci20_defconfig | 5 +++++ 1 file changed, 5 insertions(+)
arch/mips/configs/ci20_defconfig +5 -0
@@ -88,6 +88,11 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=5 CONFIG_SERIAL_8250_INGENIC=y CONFIG_SERIAL_OF_PLATFORM=y # CONFIG_HW_RANDOM is not set +CONFIG_CRYPTO_USER=y +CONFIG_CRYPTO_USER_API=y +CONFIG_CRYPTO_USER_API_RNG=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_DEV_JZ4780_RNG=y CONFIG_I2C=y CONFIG_I2C_JZ4780=y CONFIG_GPIO_SYSFS=y
Signature · 1 line
2.10.0
Herbert Xu
maintainerQuoted 11 lines · PrasannaKumar Muralidharan
This patch series adds support of pseudo random number generator found in Ingenic's JZ4780 and X1000 SoC.
Create cgublock node which has CGU and RNG node as its children. The cgublock node uses "simple-bus" compatible which helps in exposing CGU and RNG nodes without changing CGU driver. Add 'syscon' compatible in CGU node in
jz4780.dtsi. The jz4780-rng driver uses regmap exposed via syscon interface to access the RNG registers. CGU driver is not modified in this patch set as registers used by CGU driver and this driver are different.
Quoted 5 lines
PrasannaKumar Muralidharan (4):
crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
crypto: jz4780-rng: Add RNG node tojz4780.dtsi
crypto: jz4780-rng: Enable PRNG support in CI20 defconfig
Please indicate which patches are intended to go through the crypto trees.
Thanks,
Signature · 3 lines
Email: Herbert Xu <[email protected]> Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
Hi Herbert,
Quoted 18 lines · Herbert Xu
Quoted 11 lines · PrasannaKumar Muralidharan
This patch series adds support of pseudo random number generator found in Ingenic's JZ4780 and X1000 SoC.
Create cgublock node which has CGU and RNG node as its children. The cgublock node uses "simple-bus" compatible which helps in exposing CGU and RNG nodes without changing CGU driver. Add 'syscon' compatible in CGU node in
jz4780.dtsi. The jz4780-rng driver uses regmap exposed via syscon interface to access the RNG registers. CGU driver is not modified in this patch set as registers used by CGU driver and this driver are different.Quoted 5 lines
PrasannaKumar Muralidharan (4):
crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
crypto: jz4780-rng: Add RNG node tojz4780.dtsi
crypto: jz4780-rng: Enable PRNG support in CI20 defconfig
Quoted 4 lines
Please indicate which patches are intended to go through the crypto trees.
From https://patchwork.linux-mips.org/patch/17162/ I expect the same.
Either all patches go via crypto tree or via mips tree. The dtsi changes is not yet acked by MIPS / JZ4780 maintainer. Let's wait for it.
Thanks,
PrasannaKumar
Hi Ralf,
Quoted 24 lines · PrasannaKumar Muralidharan
Hi Herbert,
Quoted 12 lines · Herbert Xu
Quoted 11 lines · PrasannaKumar Muralidharan
This patch series adds support of pseudo random number generator found in Ingenic's JZ4780 and X1000 SoC.
Create cgublock node which has CGU and RNG node as its children. The cgublock node uses "simple-bus" compatible which helps in exposing CGU and RNG nodes without changing CGU driver. Add 'syscon' compatible in CGU node in
jz4780.dtsi. The jz4780-rng driver uses regmap exposed via syscon interface to access the RNG registers. CGU driver is not modified in this patch set as registers used by CGU driver and this driver are different.Quoted 8 lines
Quoted 5 lines
PrasannaKumar Muralidharan (4):
crypto: jz4780-rng: Add JZ4780 PRNG devicetree binding documentation
crypto: jz4780-rng: Add Ingenic JZ4780 hardware PRNG driver
crypto: jz4780-rng: Add RNG node tojz4780.dtsi
crypto: jz4780-rng: Enable PRNG support in CI20 defconfigPlease indicate which patches are intended to go through the crypto trees.
Quoted 7 lines
From https://patchwork.linux-mips.org/patch/17162/ I expect the same. Either all patches go via crypto tree or via mips tree. The dtsi changes is not yet acked by MIPS / JZ4780 maintainer. Let's wait for it.
Thanks,
PrasannaKumar
Should I do anything more for this series?
Thanks,
PrasannaKumar