amdgpu/dc: remove pointless returns in the i2caux constructor paths. (v2)

From: Dave Airlie <[email protected]>

There was lots of return true, and error checking that was never used in these paths.

Just remove it all.

v2: I missed one return true.

Signed-off-by Dave Airlie <[email protected]>

---
 drivers/gpu/drm/amd/display/dc/i2caux/aux_engine.c |  6 ++--
 drivers/gpu/drm/amd/display/dc/i2caux/aux_engine.h |  2 +-
 .../amd/display/dc/i2caux/dce100/i2caux_dce100.c   | 21 +++++---------
 .../display/dc/i2caux/dce110/aux_engine_dce110.c   | 20 +++-----------
 .../dc/i2caux/dce110/i2c_hw_engine_dce110.c        | 24 ++++++----------
 .../dc/i2caux/dce110/i2c_hw_engine_dce110.h        |  4 ---
 .../dc/i2caux/dce110/i2c_sw_engine_dce110.c        | 20 +++-----------
 .../amd/display/dc/i2caux/dce110/i2caux_dce110.c   | 30 ++++++--------------
 .../amd/display/dc/i2caux/dce110/i2caux_dce110.h   |  2 +-
 .../amd/display/dc/i2caux/dce112/i2caux_dce112.c   | 30 ++++++--------------
 .../amd/display/dc/i2caux/dce120/i2caux_dce120.c   | 21 +++++---------
 .../display/dc/i2caux/dce80/i2c_hw_engine_dce80.c  | 32 ++++++++--------------
 .../display/dc/i2caux/dce80/i2c_sw_engine_dce80.c  | 19 +++----------
 .../drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c | 19 +++----------
 .../drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.c | 21 +++++---------
 .../display/dc/i2caux/diagnostics/i2caux_diag.c    | 20 +++-----------
 drivers/gpu/drm/amd/display/dc/i2caux/engine.h     |  2 +-
 .../gpu/drm/amd/display/dc/i2caux/engine_base.c    |  3 +-
 drivers/gpu/drm/amd/display/dc/i2caux/i2c_engine.c |  7 ++---
 drivers/gpu/drm/amd/display/dc/i2caux/i2c_engine.h |  2 +-
 .../amd/display/dc/i2caux/i2c_generic_hw_engine.c  |  6 ++--
 .../amd/display/dc/i2caux/i2c_generic_hw_engine.h  |  2 +-
 .../gpu/drm/amd/display/dc/i2caux/i2c_hw_engine.c  |  6 ++--
 .../gpu/drm/amd/display/dc/i2caux/i2c_hw_engine.h  |  2 +-
 .../gpu/drm/amd/display/dc/i2caux/i2c_sw_engine.c  | 17 +++---------
 .../gpu/drm/amd/display/dc/i2caux/i2c_sw_engine.h  |  2 +-
 drivers/gpu/drm/amd/display/dc/i2caux/i2caux.c     |  4 +--
 drivers/gpu/drm/amd/display/dc/i2caux/i2caux.h     |  2 +-
 28 files changed, 100 insertions(+), 246 deletions(-)

drivers/gpu/drm/amd/display/dc/i2caux/aux_engine.c +2 -4

index 3c9608c..fc7a7d4 100644
@@ -555,15 +555,13 @@ bool dal_aux_engine_submit_request(
 	return result;
 }
 
-bool dal_aux_engine_construct(
+void dal_aux_engine_construct(
 	struct aux_engine *engine,
 	struct dc_context *ctx)
 {
-	if (!dal_i2caux_construct_engine(&engine->base, ctx))
-		return false;
+	dal_i2caux_construct_engine(&engine->base, ctx);
 	engine->delay = 0;
 	engine->max_defer_write_retry = 0;
-	return true;
 }
 
 void dal_aux_engine_destruct(

drivers/gpu/drm/amd/display/dc/i2caux/aux_engine.h +1 -1

index 40b2028..8e71324 100644
@@ -100,7 +100,7 @@ struct aux_engine {
 	bool acquire_reset;
 };
 
-bool dal_aux_engine_construct(
+void dal_aux_engine_construct(
 	struct aux_engine *engine,
 	struct dc_context *ctx);
 

drivers/gpu/drm/amd/display/dc/i2caux/dce100/i2caux_dce100.c +7 -14

index c45a2ee..e8d3781 100644
@@ -95,18 +95,11 @@ struct i2caux *dal_i2caux_dce100_create(
 		return NULL;
 	}
 
-	if (dal_i2caux_dce110_construct(
-			i2caux_dce110,
-			ctx,
-			dce100_aux_regs,
-			dce100_hw_engine_regs,
-			&i2c_shift,
-			&i2c_mask))
-		return &i2caux_dce110->base;
-
-	ASSERT_CRITICAL(false);
-
-	kfree(i2caux_dce110);
-
-	return NULL;
+	dal_i2caux_dce110_construct(i2caux_dce110,
+				    ctx,
+				    dce100_aux_regs,
+				    dce100_hw_engine_regs,
+				    &i2c_shift,
+				    &i2c_mask);
+	return &i2caux_dce110->base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c +4 -16

index 4b673b4..0c4bbc1 100644
@@ -426,22 +426,16 @@ static const struct engine_funcs engine_funcs = {
 	.acquire = dal_aux_engine_acquire,
 };
 
-static bool construct(
+static void construct(
 	struct aux_engine_dce110 *engine,
 	const struct aux_engine_dce110_init_data *aux_init_data)
 {
-	if (!dal_aux_engine_construct(
-		&engine->base, aux_init_data->ctx)) {
-		ASSERT_CRITICAL(false);
-		return false;
-	}
+	dal_aux_engine_construct(&engine->base, aux_init_data->ctx);
 	engine->base.base.funcs = &engine_funcs;
 	engine->base.funcs = &aux_engine_funcs;
 
 	engine->timeout_period = aux_init_data->timeout_period;
 	engine->regs = aux_init_data->regs;
-
-	return true;
 }
 
 static void destruct(

@@ -471,12 +465,6 @@ struct aux_engine *dal_aux_engine_dce110_create(
 		return NULL;
 	}
 
-	if (construct(engine, aux_init_data))
-		return &engine->base;
-
-	ASSERT_CRITICAL(false);
-
-	kfree(engine);
-
-	return NULL;
+	construct(engine, aux_init_data);
+	return &engine->base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.c +8 -16

index aab77a8..1a5b3f7 100644
@@ -498,17 +498,13 @@ static const struct i2c_hw_engine_funcs i2c_hw_engine_funcs = {
 	.wait_on_operation_result = dal_i2c_hw_engine_wait_on_operation_result,
 };
 
-bool i2c_hw_engine_dce110_construct(
+static void construct(
 	struct i2c_hw_engine_dce110 *hw_engine,
 	const struct i2c_hw_engine_dce110_create_arg *arg)
 {
 	uint32_t xtal_ref_div = 0;
 
-	if (!arg->reference_frequency)
-		return false;
-
-	if (!dal_i2c_hw_engine_construct(&hw_engine->base, arg->ctx))
-		return false;
+	dal_i2c_hw_engine_construct(&hw_engine->base, arg->ctx);
 
 	hw_engine->base.base.base.funcs = &engine_funcs;
 	hw_engine->base.base.funcs = &i2c_engine_funcs;

@@ -545,8 +541,6 @@ bool i2c_hw_engine_dce110_construct(
 	 */
 	hw_engine->reference_frequency =
 		(arg->reference_frequency * 2) / xtal_ref_div;
-
-	return true;
 }
 
 struct i2c_engine *dal_i2c_hw_engine_dce110_create(

@@ -558,6 +552,10 @@ struct i2c_engine *dal_i2c_hw_engine_dce110_create(
 		ASSERT_CRITICAL(false);
 		return NULL;
 	}
+	if (!arg->reference_frequency) {
+		ASSERT_CRITICAL(false);
+		return NULL;
+	}
 
 	engine_dce10 = kzalloc(sizeof(struct i2c_hw_engine_dce110),
 			       GFP_KERNEL);

@@ -567,12 +565,6 @@ struct i2c_engine *dal_i2c_hw_engine_dce110_create(
 		return NULL;
 	}
 
-	if (i2c_hw_engine_dce110_construct(engine_dce10, arg))
-		return &engine_dce10->base.base;
-
-	ASSERT_CRITICAL(false);
-
-	kfree(engine_dce10);
-
-	return NULL;
+	construct(engine_dce10, arg);
+	return &engine_dce10->base.base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_hw_engine_dce110.h +0 -4

index c573c64..5bb0408 100644
@@ -207,8 +207,4 @@ struct i2c_hw_engine_dce110_create_arg {
 struct i2c_engine *dal_i2c_hw_engine_dce110_create(
 	const struct i2c_hw_engine_dce110_create_arg *arg);
 
-bool i2c_hw_engine_dce110_construct(
-	struct i2c_hw_engine_dce110 *engine_dce110,
-	const struct i2c_hw_engine_dce110_create_arg *arg);
-
 #endif

drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2c_sw_engine_dce110.c +4 -16

index bf2c4b2..3aa7f79 100644
@@ -118,7 +118,7 @@ static const struct engine_funcs engine_funcs = {
 	.submit_request = dal_i2c_sw_engine_submit_request,
 };
 
-static bool construct(
+static void construct(
 	struct i2c_sw_engine_dce110 *engine_dce110,
 	const struct i2c_sw_engine_dce110_create_arg *arg_dce110)
 {

@@ -127,11 +127,7 @@ static bool construct(
 	arg_base.ctx = arg_dce110->ctx;
 	arg_base.default_speed = arg_dce110->default_speed;
 
-	if (!dal_i2c_sw_engine_construct(
-			&engine_dce110->base, &arg_base)) {
-		ASSERT_CRITICAL(false);
-		return false;
-	}
+	dal_i2c_sw_engine_construct(&engine_dce110->base, &arg_base);
 
 	/*struct engine   struct engine_funcs*/
 	engine_dce110->base.base.base.funcs = &engine_funcs;

@@ -139,8 +135,6 @@ static bool construct(
 	engine_dce110->base.base.funcs = &i2c_engine_funcs;
 	engine_dce110->base.default_speed = arg_dce110->default_speed;
 	engine_dce110->engine_id = arg_dce110->engine_id;
-
-	return true;
 }
 
 struct i2c_engine *dal_i2c_sw_engine_dce110_create(

@@ -161,12 +155,6 @@ struct i2c_engine *dal_i2c_sw_engine_dce110_create(
 		return NULL;
 	}
 
-	if (construct(engine_dce110, arg))
-		return &engine_dce110->base.base;
-
-	ASSERT_CRITICAL(false);
-
-	kfree(engine_dce110);
-
-	return NULL;
+	construct(engine_dce110, arg);
+	return &engine_dce110->base.base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.c +9 -21

index ae9adb3..2a047f8 100644
@@ -196,7 +196,7 @@ static const struct dce110_i2c_hw_engine_mask i2c_mask = {
 		I2C_COMMON_MASK_SH_LIST_DCE110(_MASK)
 };
 
-bool dal_i2caux_dce110_construct(
+void dal_i2caux_dce110_construct(
 	struct i2caux_dce110 *i2caux_dce110,
 	struct dc_context *ctx,
 	const struct dce110_aux_registers aux_regs[],

@@ -217,10 +217,7 @@ bool dal_i2caux_dce110_construct(
 
 	base = &i2caux_dce110->base;
 
-	if (!dal_i2caux_construct(base, ctx)) {
-		ASSERT_CRITICAL(false);
-		return false;
-	}
+	dal_i2caux_construct(base, ctx);
 
 	i2caux_dce110->base.funcs = &i2caux_funcs;
 	i2caux_dce110->i2c_hw_buffer_in_use = false;

@@ -278,8 +275,6 @@ bool dal_i2caux_dce110_construct(
 	} while (i < ARRAY_SIZE(hw_aux_lines));
 
 	/*TODO Generic I2C SW and HW*/
-
-	return true;
 }
 
 /*

@@ -306,18 +301,11 @@ struct i2caux *dal_i2caux_dce110_create(
 		return NULL;
 	}
 
-	if (dal_i2caux_dce110_construct(
-			i2caux_dce110,
-			ctx,
-			dce110_aux_regs,
-			i2c_hw_engine_regs,
-			&i2c_shift,
-			&i2c_mask))
-		return &i2caux_dce110->base;
-
-	ASSERT_CRITICAL(false);
-
-	kfree(i2caux_dce110);
-
-	return NULL;
+	dal_i2caux_dce110_construct(i2caux_dce110,
+				    ctx,
+				    dce110_aux_regs,
+				    i2c_hw_engine_regs,
+				    &i2c_shift,
+				    &i2c_mask);
+	return &i2caux_dce110->base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/dce110/i2caux_dce110.h +1 -1

index fd1cc23..1b1f71c 100644
@@ -42,7 +42,7 @@ struct dce110_i2c_hw_engine_mask;
 struct i2caux *dal_i2caux_dce110_create(
 	struct dc_context *ctx);
 
-bool dal_i2caux_dce110_construct(
+void dal_i2caux_dce110_construct(
 	struct i2caux_dce110 *i2caux_dce110,
 	struct dc_context *ctx,
 	const struct dce110_aux_registers *aux_regs,

drivers/gpu/drm/amd/display/dc/i2caux/dce112/i2caux_dce112.c +9 -21

index 715ba43..dafc1a7 100644
@@ -87,22 +87,16 @@ static const struct dce110_i2c_hw_engine_mask i2c_mask = {
 		I2C_COMMON_MASK_SH_LIST_DCE110(_MASK)
 };
 
-static bool construct(
+static void construct(
 	struct i2caux_dce110 *i2caux_dce110,
 	struct dc_context *ctx)
 {
-	if (!dal_i2caux_dce110_construct(
-			i2caux_dce110,
-			ctx,
-			dce112_aux_regs,
-			dce112_hw_engine_regs,
-			&i2c_shift,
-			&i2c_mask)) {
-		ASSERT_CRITICAL(false);
-		return false;
-	}
-
-	return true;
+	dal_i2caux_dce110_construct(i2caux_dce110,
+				    ctx,
+				    dce112_aux_regs,
+				    dce112_hw_engine_regs,
+				    &i2c_shift,
+				    &i2c_mask);
 }
 
 /*

@@ -129,12 +123,6 @@ struct i2caux *dal_i2caux_dce112_create(
 		return NULL;
 	}
 
-	if (construct(i2caux_dce110, ctx))
-		return &i2caux_dce110->base;
-
-	ASSERT_CRITICAL(false);
-
-	kfree(i2caux_dce110);
-
-	return NULL;
+	construct(i2caux_dce110, ctx);
+	return &i2caux_dce110->base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/dce120/i2caux_dce120.c +7 -14

index d52827a..668981a 100644
@@ -108,18 +108,11 @@ struct i2caux *dal_i2caux_dce120_create(
 		return NULL;
 	}
 
-	if (dal_i2caux_dce110_construct(
-			i2caux_dce110,
-			ctx,
-			dce120_aux_regs,
-			dce120_hw_engine_regs,
-			&i2c_shift,
-			&i2c_mask))
-		return &i2caux_dce110->base;
-
-	ASSERT_CRITICAL(false);
-
-	kfree(i2caux_dce110);
-
-	return NULL;
+	dal_i2caux_dce110_construct(i2caux_dce110,
+				    ctx,
+				    dce120_aux_regs,
+				    dce120_hw_engine_regs,
+				    &i2c_shift,
+				    &i2c_mask);
+	return &i2caux_dce110->base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c +11 -21

index d41e37c..fd0832d 100644
@@ -824,20 +824,11 @@ static const struct i2c_hw_engine_funcs i2c_hw_engine_funcs = {
 		dal_i2c_hw_engine_wait_on_operation_result,
 };
 
-static bool construct(
+static void construct(
 	struct i2c_hw_engine_dce80 *engine,
 	const struct i2c_hw_engine_dce80_create_arg *arg)
 {
-	if (arg->engine_id >= sizeof(ddc_setup_offset) / sizeof(int32_t))
-		return false;
-	if (arg->engine_id >= sizeof(ddc_speed_offset) / sizeof(int32_t))
-		return false;
-
-	if (!arg->reference_frequency)
-		return false;
-
-	if (!dal_i2c_hw_engine_construct(&engine->base, arg->ctx))
-		return false;
+	dal_i2c_hw_engine_construct(&engine->base, arg->ctx);
 
 	engine->base.base.base.funcs = &engine_funcs;
 	engine->base.base.funcs = &i2c_engine_funcs;

@@ -853,8 +844,6 @@ static bool construct(
 	engine->buffer_used_bytes = 0;
 	engine->transaction_count = 0;
 	engine->engine_keep_power_up_count = 1;
-
-	return true;
 }
 
 struct i2c_engine *dal_i2c_hw_engine_dce80_create(

@@ -867,6 +856,13 @@ struct i2c_engine *dal_i2c_hw_engine_dce80_create(
 		return NULL;
 	}
 
+	if ((arg->engine_id >= sizeof(ddc_setup_offset) / sizeof(int32_t)) ||
+	    (arg->engine_id >= sizeof(ddc_speed_offset) / sizeof(int32_t)) ||
+	    !arg->reference_frequency) {
+		BREAK_TO_DEBUGGER();
+		return NULL;
+	}
+
 	engine = kzalloc(sizeof(struct i2c_hw_engine_dce80), GFP_KERNEL);
 
 	if (!engine) {

@@ -874,12 +870,6 @@ struct i2c_engine *dal_i2c_hw_engine_dce80_create(
 		return NULL;
 	}
 
-	if (construct(engine, arg))
-		return &engine->base.base;
-
-	BREAK_TO_DEBUGGER();
-
-	kfree(engine);
-
-	return NULL;
+	construct(engine, arg);
+	return &engine->base.base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/dce80/i2c_sw_engine_dce80.c +4 -15

index 6be77bc..4853ee2 100644
@@ -133,7 +133,7 @@ static const struct engine_funcs engine_funcs = {
 	.submit_request = dal_i2c_sw_engine_submit_request,
 };
 
-static bool construct(
+static void construct(
 	struct i2c_sw_engine_dce80 *engine,
 	const struct i2c_sw_engine_dce80_create_arg *arg)
 {

@@ -142,17 +142,12 @@ static bool construct(
 	arg_base.ctx = arg->ctx;
 	arg_base.default_speed = arg->default_speed;
 
-	if (!dal_i2c_sw_engine_construct(&engine->base, &arg_base)) {
-		BREAK_TO_DEBUGGER();
-		return false;
-	}
+	dal_i2c_sw_engine_construct(&engine->base, &arg_base);
 
 	engine->base.base.base.funcs = &engine_funcs;
 	engine->base.base.funcs = &i2c_engine_funcs;
 	engine->base.default_speed = arg->default_speed;
 	engine->engine_id = arg->engine_id;
-
-	return true;
 }
 
 struct i2c_engine *dal_i2c_sw_engine_dce80_create(

@@ -172,13 +167,7 @@ struct i2c_engine *dal_i2c_sw_engine_dce80_create(
 		return NULL;
 	}
 
-	if (construct(engine, arg))
-		return &engine->base.base;
-
-	BREAK_TO_DEBUGGER();
-
-	kfree(engine);
-
-	return NULL;
+	construct(engine, arg);
+	return &engine->base.base;
 }
 

drivers/gpu/drm/amd/display/dc/i2caux/dce80/i2caux_dce80.c +4 -15

index d3c157e..ed48596 100644
@@ -187,7 +187,7 @@ static const struct i2caux_funcs i2caux_funcs = {
 	.acquire_aux_engine = dal_i2caux_acquire_aux_engine,
 };
 
-static bool construct(
+static void construct(
 	struct i2caux_dce80 *i2caux_dce80,
 	struct dc_context *ctx)
 {

@@ -207,10 +207,7 @@ static bool construct(
 
 	uint32_t i;
 
-	if (!dal_i2caux_construct(base, ctx)) {
-		BREAK_TO_DEBUGGER();
-		return false;
-	}
+	dal_i2caux_construct(base, ctx);
 
 	i2caux_dce80->base.funcs = &i2caux_funcs;
 	i2caux_dce80->i2c_hw_buffer_in_use = false;

@@ -269,8 +266,6 @@ static bool construct(
 	} while (i < ARRAY_SIZE(hw_aux_lines));
 
 	/* TODO Generic I2C SW and HW */
-
-	return true;
 }
 
 struct i2caux *dal_i2caux_dce80_create(

@@ -284,12 +279,6 @@ struct i2caux *dal_i2caux_dce80_create(
 		return NULL;
 	}
 
-	if (construct(i2caux_dce80, ctx))
-		return &i2caux_dce80->base;
-
-	BREAK_TO_DEBUGGER();
-
-	kfree(i2caux_dce80);
-
-	return NULL;
+	construct(i2caux_dce80, ctx);
+	return &i2caux_dce80->base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.c +7 -14

index f8659f1..13b807d 100644
@@ -108,18 +108,11 @@ struct i2caux *dal_i2caux_dcn10_create(
 		return NULL;
 	}
 
-	if (dal_i2caux_dce110_construct(
-			i2caux_dce110,
-			ctx,
-			dcn10_aux_regs,
-			dcn10_hw_engine_regs,
-			&i2c_shift,
-			&i2c_mask))
-		return &i2caux_dce110->base;
-
-	ASSERT_CRITICAL(false);
-
-	kfree(i2caux_dce110);
-
-	return NULL;
+	dal_i2caux_dce110_construct(i2caux_dce110,
+				    ctx,
+				    dcn10_aux_regs,
+				    dcn10_hw_engine_regs,
+				    &i2c_shift,
+				    &i2c_mask);
+	return &i2caux_dce110->base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/diagnostics/i2caux_diag.c +4 -16

index 1fdb325..e6408f6 100644
@@ -73,18 +73,12 @@ static const struct i2caux_funcs i2caux_funcs = {
 	.acquire_aux_engine = NULL,
 };
 
-static bool construct(
+static void construct(
 	struct i2caux *i2caux,
 	struct dc_context *ctx)
 {
-	if (!dal_i2caux_construct(i2caux, ctx)) {
-		ASSERT_CRITICAL(false);
-		return false;
-	}
-
+	dal_i2caux_construct(i2caux, ctx);
 	i2caux->funcs = &i2caux_funcs;
-
-	return true;
 }
 
 struct i2caux *dal_i2caux_diag_fpga_create(

@@ -98,12 +92,6 @@ struct i2caux *dal_i2caux_diag_fpga_create(
 		return NULL;
 	}
 
-	if (construct(i2caux, ctx))
-		return i2caux;
-
-	ASSERT_CRITICAL(false);
-
-	kfree(i2caux);
-
-	return NULL;
+	construct(i2caux, ctx);
+	return i2caux;
 }

drivers/gpu/drm/amd/display/dc/i2caux/engine.h +1 -1

index 76fe2df..33de8a8 100644
@@ -110,7 +110,7 @@ struct engine {
 	struct dc_context *ctx;
 };
 
-bool dal_i2caux_construct_engine(
+void dal_i2caux_construct_engine(
 	struct engine *engine,
 	struct dc_context *ctx);
 

drivers/gpu/drm/amd/display/dc/i2caux/engine_base.c +1 -2

index 09da813..5d155d3 100644
@@ -36,13 +36,12 @@
 
 #include "engine.h"
 
-bool dal_i2caux_construct_engine(
+void dal_i2caux_construct_engine(
 	struct engine *engine,
 	struct dc_context *ctx)
 {
 	engine->ddc = NULL;
 	engine->ctx = ctx;
-	return true;
 }
 
 void dal_i2caux_destruct_engine(

drivers/gpu/drm/amd/display/dc/i2caux/i2c_engine.c +2 -5

index 144f51d..70e20bd 100644
@@ -103,15 +103,12 @@ void dal_i2c_engine_process_channel_reply(
 
 }
 
-bool dal_i2c_engine_construct(
+void dal_i2c_engine_construct(
 	struct i2c_engine *engine,
 	struct dc_context *ctx)
 {
-	if (!dal_i2caux_construct_engine(&engine->base, ctx))
-		return false;
-
+	dal_i2caux_construct_engine(&engine->base, ctx);
 	engine->timeout_delay = 0;
-	return true;
 }
 
 void dal_i2c_engine_destruct(

drivers/gpu/drm/amd/display/dc/i2caux/i2c_engine.h +1 -1

index ce2c51d..58fc0f2 100644
@@ -88,7 +88,7 @@ struct i2c_engine {
 	uint32_t timeout_delay;
 };
 
-bool dal_i2c_engine_construct(
+void dal_i2c_engine_construct(
 	struct i2c_engine *engine,
 	struct dc_context *ctx);
 

drivers/gpu/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.c +2 -4

index 521c4ec..5a4295e 100644
@@ -270,13 +270,11 @@ uint32_t dal_i2c_generic_hw_engine_get_transaction_timeout(
 		(1 + (length << 3) + 1);
 }
 
-bool dal_i2c_generic_hw_engine_construct(
+void dal_i2c_generic_hw_engine_construct(
 	struct i2c_generic_hw_engine *engine,
 	struct dc_context *ctx)
 {
-	if (!dal_i2c_hw_engine_construct(&engine->base, ctx))
-		return false;
-	return true;
+	dal_i2c_hw_engine_construct(&engine->base, ctx);
 }
 
 void dal_i2c_generic_hw_engine_destruct(

drivers/gpu/drm/amd/display/dc/i2caux/i2c_generic_hw_engine.h +1 -1

index 083bb0d..1da0397 100644
@@ -59,7 +59,7 @@ struct i2c_generic_hw_engine {
 	const struct i2c_generic_hw_engine_funcs *funcs;
 };
 
-bool dal_i2c_generic_hw_engine_construct(
+void dal_i2c_generic_hw_engine_construct(
 	struct i2c_generic_hw_engine *engine,
 	struct dc_context *ctx);
 

drivers/gpu/drm/amd/display/dc/i2caux/i2c_hw_engine.c +2 -4

index 00a8f07..4b54fcf 100644
@@ -228,15 +228,13 @@ enum i2c_channel_operation_result dal_i2c_hw_engine_wait_on_operation_result(
 	return result;
 }
 
-bool dal_i2c_hw_engine_construct(
+void dal_i2c_hw_engine_construct(
 	struct i2c_hw_engine *engine,
 	struct dc_context *ctx)
 {
-	if (!dal_i2c_engine_construct(&engine->base, ctx))
-		return false;
+	dal_i2c_engine_construct(&engine->base, ctx);
 	engine->original_speed = I2CAUX_DEFAULT_I2C_HW_SPEED;
 	engine->default_speed = I2CAUX_DEFAULT_I2C_HW_SPEED;
-	return true;
 }
 
 void dal_i2c_hw_engine_destruct(

drivers/gpu/drm/amd/display/dc/i2caux/i2c_hw_engine.h +1 -1

index f2df174..8936a99 100644
@@ -53,7 +53,7 @@ struct i2c_hw_engine {
 	uint32_t default_speed;
 };
 
-bool dal_i2c_hw_engine_construct(
+void dal_i2c_hw_engine_construct(
 	struct i2c_hw_engine *engine,
 	struct dc_context *ctx);
 

drivers/gpu/drm/amd/display/dc/i2caux/i2c_sw_engine.c +4 -13

index 9d0077a..8e19bb6 100644
@@ -569,17 +569,14 @@ static const struct engine_funcs engine_funcs = {
 	.submit_request = dal_i2c_sw_engine_submit_request,
 };
 
-bool dal_i2c_sw_engine_construct(
+void dal_i2c_sw_engine_construct(
 	struct i2c_sw_engine *engine,
 	const struct i2c_sw_engine_create_arg *arg)
 {
-	if (!dal_i2c_engine_construct(&engine->base, arg->ctx))
-		return false;
-
+	dal_i2c_engine_construct(&engine->base, arg->ctx);
 	dal_i2c_sw_engine_set_speed(&engine->base, arg->default_speed);
 	engine->base.funcs = &i2c_engine_funcs;
 	engine->base.base.funcs = &engine_funcs;
-	return true;
 }
 
 struct i2c_engine *dal_i2c_sw_engine_create(

@@ -599,12 +596,6 @@ struct i2c_engine *dal_i2c_sw_engine_create(
 		return NULL;
 	}
 
-	if (dal_i2c_sw_engine_construct(engine, arg))
-		return &engine->base;
-
-	BREAK_TO_DEBUGGER();
-
-	kfree(engine);
-
-	return NULL;
+	dal_i2c_sw_engine_construct(engine, arg);
+	return &engine->base;
 }

drivers/gpu/drm/amd/display/dc/i2caux/i2c_sw_engine.h +1 -1

index e0cb4c3..546f15b 100644
@@ -48,7 +48,7 @@ struct i2c_sw_engine_create_arg {
 	struct dc_context *ctx;
 };
 
-bool dal_i2c_sw_engine_construct(
+void dal_i2c_sw_engine_construct(
 	struct i2c_sw_engine *engine,
 	const struct i2c_sw_engine_create_arg *arg);
 

drivers/gpu/drm/amd/display/dc/i2caux/i2caux.c +1 -3

index 9b115e1..e1593ff 100644
@@ -423,7 +423,7 @@ void dal_i2caux_release_engine(
 	engine->ddc = NULL;
 }
 
-bool dal_i2caux_construct(
+void dal_i2caux_construct(
 	struct i2caux *i2caux,
 	struct dc_context *ctx)
 {

@@ -451,8 +451,6 @@ bool dal_i2caux_construct(
 		i2caux->default_i2c_hw_speed = DEFAULT_I2C_HW_SPEED;
 		i2caux->default_i2c_sw_speed = DEFAULT_I2C_SW_SPEED;
 	}
-
-	return true;
 }
 
 void dal_i2caux_destruct(

drivers/gpu/drm/amd/display/dc/i2caux/i2caux.h +0 -0

index bc20de3..64f51bb 100644