Skip to contentSkip to conversation

usb: dwc3: add UniPhier specific glue layer

PATCH New Masahiro Yamada 3 participants 5 messages Sep 28, 2017 – Sep 29, 2017

Subsystems (3)
lore
Share & tools
lore
#0 lore raw

PATCH 1/1 usb: dwc3: add UniPhier specific glue layer

Add UniPhier platform specific glue layer to support USB3 Host mode on Synopsys DWC3 IP.

---

I sent amost the same one last year,
and applied in u-boot-usb:
http://patchwork.ozlabs.org/patch/622564/

I retracted it for some reasons,
but now U-Boot has similar code as I was trying to push one year ago.

I am resending the driver.

 drivers/usb/dwc3/Kconfig         |   7 +++
 drivers/usb/dwc3/Makefile        |   1 +
 drivers/usb/dwc3/dwc3-uniphier.c | 120 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 128 insertions(+)
 create mode 100644 drivers/usb/dwc3/dwc3-uniphier.c
drivers/usb/dwc3/Kconfig +7 -0
index a291ceb..ae7fc1c 100644
@@ -37,6 +37,13 @@ config USB_DWC3_OMAP
 
 	  Say 'Y' here if you have one such device
 
+config USB_DWC3_UNIPHIER
+	bool "DesignWare USB3 Host Support on UniPhier Platforms"
+	depends on ARCH_UNIPHIER && USB_XHCI_DWC3
+	help
+	  Support of USB2/3 functionality in Socionext UniPhier platforms.
+	  Say 'Y' here if you have one such device.
+
 menu "PHY Subsystem"
 
 config USB_DWC3_PHY_OMAP
drivers/usb/dwc3/Makefile +1 -0
index 2964bae..5149776 100644
@@ -9,5 +9,6 @@ dwc3-y					:= core.o
 obj-$(CONFIG_USB_DWC3_GADGET)		+= gadget.o ep0.o
 
 obj-$(CONFIG_USB_DWC3_OMAP)		+= dwc3-omap.o
+obj-$(CONFIG_USB_DWC3_UNIPHIER)		+= dwc3-uniphier.o
 obj-$(CONFIG_USB_DWC3_PHY_OMAP)		+= ti_usb_phy.o
 obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG)	+= samsung_usb_phy.o
drivers/usb/dwc3/dwc3-uniphier.c new file +120 -0

120 lines not on this page · raw message

Signature · 1 line
2.7.4
#1 lore raw

PATCH 1/1 usb: dwc3: add UniPhier specific glue layer

Quoted 5 lines · Masahiro Yamada

Add UniPhier platform specific glue layer to support USB3 Host mode on Synopsys DWC3 IP.

[...]

drivers/usb/dwc3/dwc3-uniphier.c line 37

Quoted 8 lines
drivers/usb/dwc3/dwc3-uniphier.c new file +8 -0
+static int uniphier_pro4_dwc3_init(void __iomem *regs)
+{
+	u32 tmp;
+
+	tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET);
+	tmp &= ~UNIPHIER_PRO4_DWC3_RESET_PHY_SS;
+	tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK;
+	writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET);

Do I even want to nag you about clrsetbits_le32() or not ? What do you think?

Quoted 83 lines
drivers/usb/dwc3/dwc3-uniphier.c new file +82 -0
+	return 0;
+}
+
+static int uniphier_pro5_dwc3_init(void __iomem *regs)
+{
+	u32 tmp;
+
+	tmp = readl(regs + UNIPHIER_PRO5_DWC3_RESET);
+	tmp &= ~(UNIPHIER_PRO5_DWC3_RESET_PHY_S1 |
+		 UNIPHIER_PRO5_DWC3_RESET_PHY_S0);
+	tmp |= UNIPHIER_PRO5_DWC3_RESET_XLINK | UNIPHIER_PRO5_DWC3_RESET_XIOMMU;
+	writel(tmp, regs + UNIPHIER_PRO5_DWC3_RESET);
+
+	return 0;
+}
+
+static int uniphier_pxs2_dwc3_init(void __iomem *regs)
+{
+	u32 tmp;
+
+	tmp = readl(regs + UNIPHIER_PXS2_DWC3_RESET);
+	tmp |= UNIPHIER_PXS2_DWC3_RESET_XLINK;
+	writel(tmp, regs + UNIPHIER_PXS2_DWC3_RESET);
+
+	return 0;
+}
+
+static int uniphier_dwc3_probe(struct udevice *dev)
+{
+	fdt_addr_t base;
+	void __iomem *regs;
+	int (*init)(void __iomem *regs);
+	int ret;
+
+	base = devfdt_get_addr(dev);
+	if (base == FDT_ADDR_T_NONE)
+		return -EINVAL;
+
+	regs = ioremap(base, SZ_32K);
+	if (!regs)
+		return -ENOMEM;
+
+	init = (typeof(init))dev_get_driver_data(dev);
+	ret = init(regs);
+	if (ret)
+		dev_err(dev, "failed to init glue layer\n");
+
+	iounmap(regs);
+
+	return ret;
+}
+
+static const struct udevice_id uniphier_dwc3_match[] = {
+	{
+		.compatible = "socionext,uniphier-pro4-dwc3",
+		.data = (ulong)uniphier_pro4_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-pro5-dwc3",
+		.data = (ulong)uniphier_pro5_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-pxs2-dwc3",
+		.data = (ulong)uniphier_pxs2_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-ld20-dwc3",
+		.data = (ulong)uniphier_pxs2_dwc3_init,
+	},
+	{
+		.compatible = "socionext,uniphier-pxs3-dwc3",
+		.data = (ulong)uniphier_pxs2_dwc3_init,
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(usb_xhci) = {
+	.name = "uniphier-dwc3",
+	.id = UCLASS_SIMPLE_BUS,
+	.of_match = uniphier_dwc3_match,
+	.probe = uniphier_dwc3_probe,
+};
Signature · 2 lines
Best regards,
Marek Vasut
#2 lore raw

PATCH 1/1 usb: dwc3: add UniPhier specific glue layer

Hi Marek,

2017-09-29 0:26 GMT+09:00 Marek Vasut <[email protected]>:

Quoted 9 lines · Masahiro Yamada
Quoted 5 lines

Add UniPhier platform specific glue layer to support USB3 Host mode on Synopsys DWC3 IP.

[...]

Quoted 11 lines

drivers/usb/dwc3/dwc3-uniphier.c line 37

Quoted 8 lines
drivers/usb/dwc3/dwc3-uniphier.c new file +8 -0
+static int uniphier_pro4_dwc3_init(void __iomem *regs)
+{
+     u32 tmp;
+
+     tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET);
+     tmp &= ~UNIPHIER_PRO4_DWC3_RESET_PHY_SS;
+     tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK;
+     writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET);

Do I even want to nag you about clrsetbits_le32() or not ? What do you think?

I did not know this macro.

This seems to come from PPC Linux
(defined in arch/powerpc/include/asm/io.h)
probably in order to abstract the endianness.

Of course, it makes drivers ppc-specific,
disabling COMPILE_TEST coverage.

In U-Boot, more architectures support this macro, ARM as well. (probably people wanted to write the code shorter?)

I am reluctant with it because I do not want to diverge from Linux.

Signature · 2 lines
Best Regards
Masahiro Yamada
#3 lore raw

PATCH 1/1 usb: dwc3: add UniPhier specific glue layer

Quoted 32 lines · Masahiro Yamada

Hi Marek,

2017-09-29 0:26 GMT+09:00 Marek Vasut <[email protected]>:

Quoted 9 lines · Masahiro Yamada
Quoted 5 lines

Add UniPhier platform specific glue layer to support USB3 Host mode on Synopsys DWC3 IP.

[...]

Quoted 11 lines

drivers/usb/dwc3/dwc3-uniphier.c line 37

Quoted 8 lines
drivers/usb/dwc3/dwc3-uniphier.c new file +8 -0
+static int uniphier_pro4_dwc3_init(void __iomem *regs)
+{
+     u32 tmp;
+
+     tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET);
+     tmp &= ~UNIPHIER_PRO4_DWC3_RESET_PHY_SS;
+     tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK;
+     writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET);

Do I even want to nag you about clrsetbits_le32() or not ? What do you think?

I did not know this macro.

This seems to come from PPC Linux
(defined in arch/powerpc/include/asm/io.h)
probably in order to abstract the endianness.

Quoted 8 lines

Of course, it makes drivers ppc-specific,
disabling COMPILE_TEST coverage.

In U-Boot, more architectures support this macro, ARM as well. (probably people wanted to write the code shorter?)

I am reluctant with it because I do not want to diverge from Linux.

OK, then applied.

Signature · 2 lines
Best regards,
Marek Vasut
#4 lore raw

PATCH 1/1 usb: dwc3: add UniPhier specific glue layer

In reply to Masahiro Yamada
Quoted 32 lines · Masahiro Yamada

Hi Marek,

2017-09-29 0:26 GMT+09:00 Marek Vasut <[email protected]>:

Quoted 9 lines · Masahiro Yamada
Quoted 5 lines

Add UniPhier platform specific glue layer to support USB3 Host mode on Synopsys DWC3 IP.

[...]

Quoted 11 lines

drivers/usb/dwc3/dwc3-uniphier.c line 37

Quoted 8 lines
drivers/usb/dwc3/dwc3-uniphier.c new file +8 -0
+static int uniphier_pro4_dwc3_init(void __iomem *regs)
+{
+     u32 tmp;
+
+     tmp = readl(regs + UNIPHIER_PRO4_DWC3_RESET);
+     tmp &= ~UNIPHIER_PRO4_DWC3_RESET_PHY_SS;
+     tmp |= UNIPHIER_PRO4_DWC3_RESET_XIOMMU | UNIPHIER_PRO4_DWC3_RESET_XLINK;
+     writel(tmp, regs + UNIPHIER_PRO4_DWC3_RESET);

Do I even want to nag you about clrsetbits_le32() or not ? What do you think?

I did not know this macro.

This seems to come from PPC Linux
(defined in arch/powerpc/include/asm/io.h)
probably in order to abstract the endianness.

Quoted 8 lines

Of course, it makes drivers ppc-specific,
disabling COMPILE_TEST coverage.

In U-Boot, more architectures support this macro, ARM as well. (probably people wanted to write the code shorter?)

I am reluctant with it because I do not want to diverge from Linux.

This is one of those funny cases where perhaps some generic shuffling of code in Linux might help? Having whacked things for sandbox this morning in https://patchwork.ozlabs.org/patch/819919/ and looking at drivers/crypto/caam/regs.h in the kernel now, it's either a helpful thing that should be more widely available / used (drop it into say include/asm-generic/io.h) or time has moved on, and there's a better convention to use now. Just a thought.

Signature · 8 lines
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 819 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20170929/6b9f2d5f/attachment.sig>