hw/gen_pcie_root_port: properly set
PATCH 1/1 hw/gen_pcie_root_port: properly set
IO_LIMIT and IO_BASE registers should not be writable if gen_pcie_root_port's io-reserve property is set to 0. The COMMAND register should have the IO flag read only.
--- hw/pci-bridge/gen_pcie_root_port.c | 7 +++++++ 1 file changed, 7 insertions(+)
hw/pci-bridge/gen_pcie_root_port.c +7 -0
@@ -85,6 +85,13 @@ static void gen_rp_realize(DeviceState *dev, Error **errp) rpc->parent_class.exit (d);return ; } + +if (!grp->io_reserve) { +pci_word_test_and_clear_mask (d->wmask +PCI_COMMAND , +PCI_COMMAND_IO ); + d->wmask[PCI_IO_BASE ] =0 ; + d->wmask[PCI_IO_LIMIT ] =0 ; + } }static const VMStateDescription vmstate_rp_dev = {
Signature · 1 line
2.13.5
Quoted 19 lines · Marcel Apfelbaum
IO_LIMITandIO_BASEregisters should not be writable if gen_pcie_root_port's io-reserve property is set to 0. The COMMAND register should have the IO flag read only.Signed-off-by Marcel Apfelbaum <[email protected]>--- hw/pci-bridge/gen_pcie_root_port.c | 7 +++++++ 1 file changed, 7 insertions(+)hw/pci-bridge/gen_pcie_root_port.c +0
-0@@ -85,6 +85,13 @@ static void gen_rp_realize(DeviceState *dev, Error **errp) rpc->parent_class.exit (d);return ; }
hw/pci-bridge/gen_pcie_root_port.c static void gen_rp_realize(DeviceState *dev, Error **errp) · line 97
Quoted 10 lines
hw/pci-bridge/gen_pcie_root_port.c +7
-0+ +if (!grp->io_reserve) { +pci_word_test_and_clear_mask (d->wmask +PCI_COMMAND , +PCI_COMMAND_IO ); + d->wmask[PCI_IO_BASE ] =0 ; + d->wmask[PCI_IO_LIMIT ] =0 ; + } }static const VMStateDescription vmstate_rp_dev = {
The patch looks good to me (which doesn't mean much, honestly :) ), but I think the subject line is truncated. You left off what exactly should be set properly. (IO base, IO limit, and command registers, presumably.)
Thanks!
Laszlo
Quoted 28 lines · Laszlo Ersek
Quoted 27 lines · Marcel Apfelbaum
IO_LIMITandIO_BASEregisters should not be writable if gen_pcie_root_port's io-reserve property is set to 0. The COMMAND register should have the IO flag read only.Signed-off-by Marcel Apfelbaum <[email protected]>--- hw/pci-bridge/gen_pcie_root_port.c | 7 +++++++ 1 file changed, 7 insertions(+)hw/pci-bridge/gen_pcie_root_port.c +7
-0@@ -85,6 +85,13 @@ static void gen_rp_realize(DeviceState *dev, Error **errp) rpc->parent_class.exit (d);return ; } + +if (!grp->io_reserve) { +pci_word_test_and_clear_mask (d->wmask +PCI_COMMAND , +PCI_COMMAND_IO ); + d->wmask[PCI_IO_BASE ] =0 ; + d->wmask[PCI_IO_LIMIT ] =0 ; + } }
Quoted 7 lines
hw/pci-bridge/gen_pcie_root_port.c static void gen_rp_realize(DeviceState *dev, Error **errp) · line 97
Quoted 2 lines
hw/pci-bridge/gen_pcie_root_port.c +0
-0static const VMStateDescription vmstate_rp_dev = {The patch looks good to me (which doesn't mean much, honestly :) ), but I think the subject line is truncated. You left off what exactly should be set properly. (IO base, IO limit, and command registers, presumably.)
Strange, thanks for pointing it out.
I'll send a V2.
Thanks,
Marcel
Quoted 3 lines
Thanks!
Laszlo