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Enable DRA7 processor MMU DT nodes

PATCH New Suman Anna 2 participants 8 messages Aug 21, 2017 – Oct 11, 2017 Device tree bindings

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Suman Anna

author
#0 lore raw

cover Enable DRA7 processor MMU DT nodes

Hi Tony,

The following series enables the DSP and IPU MMUs on various TI DRA7xx/AM57xx boards. This is part 2 of the patches for enabling the MMUs on DRA7 SoCs (OMAP4 and OMAP5 are already supported on mainline).

Patches are baselined on your for-next branch with HEAD of a70cb93b6c2f ("Merge branch 'omap-for-v4.14/dt-v3' into for-next").

I have tested the patches on current TI DRA7xx/AM57xx boards (DRA7, DRA72, DRA71, DRA76 EVMs, AM571x & AM572x IDKs and AM57xx BeagleBoard-X15) as well as the OMAP4 Panda and OMAP5 uEVM. The boards can boot fine with just these patches, but requires the hwmod patches to be able to use them (otherwise get the failures from _od_fail_runtime_{resume/suspend} functions). There are no consumer devices for these yet, and they just probe but are not clocked/enabled by default, so the current System suspend is not affected.

regards
Suman

Suman Anna (5):
ARM: dts: dra7-evm-common: Enable relevant IPU and DSP MMU nodes
ARM: dts: dra72-evm-common: Enable relevant IPU and DSP MMU nodes
ARM: dts: beagle-x15-common: Enable relevant IPU and DSP MMU nodes
ARM: dts: am572x-idk: Enable relevant IPU and DSP MMU nodes
ARM: dts: am571x-idk: Enable relevant IPU and DSP MMU nodes

 arch/arm/boot/dts/am571x-idk.dts                | 16 ++++++++++++++++
 arch/arm/boot/dts/am572x-idk.dts                | 24 ++++++++++++++++++++++++
 arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 24 ++++++++++++++++++++++++
 arch/arm/boot/dts/dra7-evm-common.dtsi          | 24 ++++++++++++++++++++++++
 arch/arm/boot/dts/dra72-evm-common.dtsi         | 16 ++++++++++++++++
 5 files changed, 104 insertions(+)
Signature · 1 line
2.13.1
author
#1 lore raw

PATCH 1/5 ARM: dts: dra7-evm-common: Enable relevant IPU and DSP MMU nodes

The MMU nodes for the remote processors IPU1, IPU2, DSP1 and DSP2 have all been enabled. All these nodes are relevant and valid for both the DRA7 EVM and DRA76 EVM boards, so are added in the dra7 common evm dtsi file.

---
 arch/arm/boot/dts/dra7-evm-common.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
arch/arm/boot/dts/dra7-evm-common.dtsi +24 -0
index 343e95f9a001..01a5d4e0b044 100644
@@ -256,3 +256,27 @@
 		status = "okay";
 	};
 };
+
+&mmu0_dsp1 {
+	status = "okay";
+};
+
+&mmu1_dsp1 {
+	status = "okay";
+};
+
+&mmu0_dsp2 {
+	status = "okay";
+};
+
+&mmu1_dsp2 {
+	status = "okay";
+};
+
+&mmu_ipu1 {
+	status = "okay";
+};
+
+&mmu_ipu2 {
+	status = "okay";
+};
Signature · 1 line
2.13.1
#2 lore raw

PATCH 1/5 ARM: dts: dra7-evm-common: Enable relevant IPU and DSP MMU nodes

Quoted 32 lines · Suman Anna

The MMU nodes for the remote processors IPU1, IPU2, DSP1 and DSP2 have all been enabled. All these nodes are relevant and valid for both the DRA7 EVM and DRA76 EVM boards, so are added in the dra7 common evm dtsi file.

---
 arch/arm/boot/dts/dra7-evm-common.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
arch/arm/boot/dts/dra7-evm-common.dtsi +14 -0
index 343e95f9a001..01a5d4e0b044 100644
@@ -256,3 +256,27 @@
 		status = "okay";
 	};
 };
+
+&mmu0_dsp1 {
+	status = "okay";
+};
+
+&mmu1_dsp1 {
+	status = "okay";
+};
+
+&mmu0_dsp2 {
+	status = "okay";
+};
+
+&mmu1_dsp2 {

arch/arm/boot/dts/dra7-evm-common.dtsi line 282

Quoted 10 lines
arch/arm/boot/dts/dra7-evm-common.dtsi +10 -0
+	status = "okay";
+};
+
+&mmu_ipu1 {
+	status = "okay";
+};
+
+&mmu_ipu2 {
+	status = "okay";
+};

This is getting quite silly.. The default is "okay" so just remove the useless "disabled" from the common file and all these patches are no longer needed.

Regards,

Tony

author
#3 lore raw

PATCH 1/5 ARM: dts: dra7-evm-common: Enable relevant IPU and DSP MMU nodes

Hi Tony,

Quoted 38 lines · Tony Lindgren
Quoted 37 lines · Suman Anna

The MMU nodes for the remote processors IPU1, IPU2, DSP1 and DSP2 have all been enabled. All these nodes are relevant and valid for both the DRA7 EVM and DRA76 EVM boards, so are added in the dra7 common evm dtsi file.

---
 arch/arm/boot/dts/dra7-evm-common.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
arch/arm/boot/dts/dra7-evm-common.dtsi +19 -0
index 343e95f9a001..01a5d4e0b044 100644
@@ -256,3 +256,27 @@
 		status = "okay";
 	};
 };
+
+&mmu0_dsp1 {
+	status = "okay";
+};
+
+&mmu1_dsp1 {
+	status = "okay";
+};
+
+&mmu0_dsp2 {
+	status = "okay";
+};
+
+&mmu1_dsp2 {
+	status = "okay";
+};
+
+&mmu_ipu1 {
+	status = "okay";
Quoted 8 lines

arch/arm/boot/dts/dra7-evm-common.dtsi line 282

Quoted 5 lines
arch/arm/boot/dts/dra7-evm-common.dtsi +5 -0
+};
+
+&mmu_ipu2 {
+	status = "okay";
+};

This is getting quite silly.. The default is "okay" so just remove the useless "disabled" from the common file and all these patches are no longer needed.

Yeah, agreed. Original intention was that some of the other remoteproc related nodes can be customized per board, but there's nothing of that sort on iommu nodes. Will post a new series. Thanks for the review.

regards
Suman

author
#4 lore raw

PATCH 2/5 ARM: dts: dra72-evm-common: Enable relevant IPU and DSP MMU nodes

In reply to Suman Anna

The MMU nodes for the remote processors IPU1, IPU2 and DSP1 have all been enabled. All these nodes are relevant and valid for both the DRA72x EVM variants and the DRA71 EVM, so are added in the common dts file. DSP2 MMU nodes are not present on DRA72x/DRA71x SoCs.

---
 arch/arm/boot/dts/dra72-evm-common.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
arch/arm/boot/dts/dra72-evm-common.dtsi +16 -0
index 2e485a13dfd7..a72bcfd032d3 100644
@@ -564,6 +564,22 @@
 	};
 };
 
+&mmu0_dsp1 {
+	status = "okay";
+};
+
+&mmu1_dsp1 {
+	status = "okay";
+};
+
+&mmu_ipu1 {
+	status = "okay";
+};
+
+&mmu_ipu2 {
+	status = "okay";
+};
+
 &pcie1_rc {
 	status = "okay";
 };
Signature · 1 line
2.13.1
author
#5 lore raw

PATCH 3/5 ARM: dts: beagle-x15-common: Enable relevant IPU and DSP MMU nodes

In reply to Suman Anna

The MMU nodes for the remote processors IPU1, IPU2, DSP1 and DSP2 have all been enabled. All these nodes are relevant and valid for all the AM57xx BeagleBoard-X15 board variants, so are added in the common dtsi file.

---
 arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi +24 -0
index 49aeecd312b4..be9640b6e225 100644
@@ -587,3 +587,27 @@
 		status = "okay";
 	};
 };
+
+&mmu0_dsp1 {
+	status = "okay";
+};
+
+&mmu1_dsp1 {
+	status = "okay";
+};
+
+&mmu0_dsp2 {
+	status = "okay";
+};
+
+&mmu1_dsp2 {
+	status = "okay";
+};
+
+&mmu_ipu1 {
+	status = "okay";
+};
+
+&mmu_ipu2 {
+	status = "okay";
+};
Signature · 1 line
2.13.1
author
#6 lore raw

PATCH 4/5 ARM: dts: am572x-idk: Enable relevant IPU and DSP MMU nodes

In reply to Suman Anna

The MMU nodes for the remote processors IPU1, IPU2, DSP1 and DSP2 have all been enabled. All these nodes are relevant and valid for the AM572x IDK board.

---
 arch/arm/boot/dts/am572x-idk.dts | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
arch/arm/boot/dts/am572x-idk.dts +24 -0
index a578fe97ba3b..0f3be0de82b7 100644
@@ -127,3 +127,27 @@
 		status = "okay";
 	};
 };
+
+&mmu0_dsp1 {
+	status = "okay";
+};
+
+&mmu1_dsp1 {
+	status = "okay";
+};
+
+&mmu0_dsp2 {
+	status = "okay";
+};
+
+&mmu1_dsp2 {
+	status = "okay";
+};
+
+&mmu_ipu1 {
+	status = "okay";
+};
+
+&mmu_ipu2 {
+	status = "okay";
+};
Signature · 1 line
2.13.1
author
#7 lore raw

PATCH 5/5 ARM: dts: am571x-idk: Enable relevant IPU and DSP MMU nodes

In reply to Suman Anna

The MMU nodes for the remote processors IPU1, IPU2 and DSP1 have all been enabled. All these nodes are relevant and valid for the AM571x IDK board. DSP2 MMU nodes are not present on AM571x SoCs.

---
 arch/arm/boot/dts/am571x-idk.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
arch/arm/boot/dts/am571x-idk.dts +16 -0
index debf9464403e..ea9f695e1282 100644
@@ -91,6 +91,22 @@
 	};
 };
 
+&mmu0_dsp1 {
+	status = "okay";
+};
+
+&mmu1_dsp1 {
+	status = "okay";
+};
+
+&mmu_ipu1 {
+	status = "okay";
+};
+
+&mmu_ipu2 {
+	status = "okay";
+};
+
 &pcie1_rc {
 	status = "okay";
 	gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
Signature · 1 line
2.13.1