arm: dts: fix unit-address leading 0s
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PATCH 1/2 arm: dts: fix unit-address leading 0s
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command:
perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'
Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some occurrences of uppercase hex.
Signed-off-by Rob Herring <[email protected]>
--- arch/arm/boot/dts/armada-370-synology-ds213j.dts | 12 +- arch/arm/boot/dts/armada-385-synology-ds116.dts | 12 +- arch/arm/boot/dts/armada-xp-synology-ds414.dts | 12 +- arch/arm/boot/dts/aspeed-g4.dtsi | 2 +- arch/arm/boot/dts/aspeed-g5.dtsi | 2 +- arch/arm/boot/dts/at91-ariag25.dts | 4 +- arch/arm/boot/dts/at91-ariettag25.dts | 4 +- arch/arm/boot/dts/at91-cosino_mega2560.dts | 4 +- arch/arm/boot/dts/at91-kizbox2.dts | 4 +- arch/arm/boot/dts/at91-kizboxmini.dts | 4 +- arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 6 +- arch/arm/boot/dts/at91-sama5d2_xplained.dts | 6 +- arch/arm/boot/dts/at91-sama5d3_xplained.dts | 6 +- arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts | 6 +- arch/arm/boot/dts/at91-sama5d4_xplained.dts | 6 +- arch/arm/boot/dts/at91-sama5d4ek.dts | 6 +- arch/arm/boot/dts/at91-vinco.dts | 6 +- arch/arm/boot/dts/at91rm9200.dtsi | 4 +- arch/arm/boot/dts/at91rm9200ek.dts | 2 +- arch/arm/boot/dts/at91sam9260.dtsi | 2 +- arch/arm/boot/dts/at91sam9261.dtsi | 4 +- arch/arm/boot/dts/at91sam9261ek.dts | 2 +- arch/arm/boot/dts/at91sam9263.dtsi | 6 +- arch/arm/boot/dts/at91sam9263ek.dts | 2 +- arch/arm/boot/dts/at91sam9g20.dtsi | 4 +- arch/arm/boot/dts/at91sam9g45.dtsi | 6 +- arch/arm/boot/dts/at91sam9m10g45ek.dts | 4 +- arch/arm/boot/dts/at91sam9n12.dtsi | 4 +- arch/arm/boot/dts/at91sam9n12ek.dts | 2 +- arch/arm/boot/dts/at91sam9rl.dtsi | 4 +- arch/arm/boot/dts/at91sam9rlek.dts | 2 +- arch/arm/boot/dts/at91sam9x5.dtsi | 6 +- arch/arm/boot/dts/at91sam9x5ek.dtsi | 4 +- arch/arm/boot/dts/at91sam9xe.dtsi | 4 +- arch/arm/boot/dts/bcm-cygnus.dtsi | 10 +- arch/arm/boot/dts/bcm-nsp.dtsi | 8 +- arch/arm/boot/dts/bcm5301x.dtsi | 6 +- arch/arm/boot/dts/bcm53573.dtsi | 2 +- arch/arm/boot/dts/berlin2.dtsi | 6 +- arch/arm/boot/dts/berlin2cd.dtsi | 6 +- arch/arm/boot/dts/berlin2q.dtsi | 6 +- arch/arm/boot/dts/dove.dtsi | 14 +- arch/arm/boot/dts/ep7211-edb7211.dts | 2 +- arch/arm/boot/dts/exynos3250-artik5.dtsi | 2 +- arch/arm/boot/dts/exynos3250-monk.dts | 2 +- arch/arm/boot/dts/exynos3250-rinato.dts | 2 +- arch/arm/boot/dts/exynos3250.dtsi | 2 +- arch/arm/boot/dts/exynos4.dtsi | 4 +- arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos4210-universal_c210.dts | 2 +- arch/arm/boot/dts/exynos4210.dtsi | 4 +- arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi | 2 +- arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 6 +- arch/arm/boot/dts/exynos4412-origen.dts | 2 +- arch/arm/boot/dts/exynos4412-pinctrl.dtsi | 2 +- arch/arm/boot/dts/exynos4412-trats2.dts | 6 +- arch/arm/boot/dts/exynos4412.dtsi | 2 +- arch/arm/boot/dts/exynos5250-smdk5250.dts | 2 +- arch/arm/boot/dts/exynos5250-snow-common.dtsi | 2 +- arch/arm/boot/dts/exynos5250.dtsi | 6 +- arch/arm/boot/dts/exynos5410-odroidxu.dts | 6 +- arch/arm/boot/dts/exynos5410-smdk5410.dts | 2 +- arch/arm/boot/dts/exynos5410.dtsi | 4 +- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 2 +- arch/arm/boot/dts/exynos5420.dtsi | 6 +- arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi | 2 +- arch/arm/boot/dts/exynos5440-ssdk5440.dts | 2 +- arch/arm/boot/dts/exynos5440.dtsi | 2 +- arch/arm/boot/dts/exynos54xx.dtsi | 2 +- arch/arm/boot/dts/ge863-pro3.dtsi | 2 +- arch/arm/boot/dts/hip01.dtsi | 4 +- arch/arm/boot/dts/hip04-d01.dts | 2 +- arch/arm/boot/dts/hisi-x5hd2.dtsi | 30 +-- arch/arm/boot/dts/imx1.dtsi | 44 ++-- arch/arm/boot/dts/imx25-pdk.dts | 2 +- arch/arm/boot/dts/imx28-apx4devkit.dts | 2 +- arch/arm/boot/dts/imx28-eukrea-mbmx28lc.dtsi | 2 +- arch/arm/boot/dts/imx28-evk.dts | 2 +- arch/arm/boot/dts/imx28-m28evk.dts | 2 +- arch/arm/boot/dts/imx28-tx28.dts | 2 +- arch/arm/boot/dts/imx50.dtsi | 2 +- arch/arm/boot/dts/imx51-babbage.dts | 2 +- arch/arm/boot/dts/imx53-m53evk.dts | 2 +- arch/arm/boot/dts/imx53-qsb-common.dtsi | 2 +- arch/arm/boot/dts/imx53-smd.dts | 4 +- arch/arm/boot/dts/imx53-tx53-x03x.dts | 2 +- arch/arm/boot/dts/imx53-tx53-x13x.dts | 6 +- arch/arm/boot/dts/imx53-voipac-bsb.dts | 2 +- arch/arm/boot/dts/imx53.dtsi | 2 +- arch/arm/boot/dts/imx6dl-riotboard.dts | 4 +- arch/arm/boot/dts/imx6dl-tx6u-811x.dts | 2 +- arch/arm/boot/dts/imx6dl-tx6u-81xx-mb7.dts | 2 +- arch/arm/boot/dts/imx6dl.dtsi | 16 +- arch/arm/boot/dts/imx6q-bx50v3.dtsi | 2 +- arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts | 2 +- arch/arm/boot/dts/imx6q-gw5400-a.dts | 6 +- arch/arm/boot/dts/imx6q-h100.dts | 4 +- arch/arm/boot/dts/imx6q-icore-rqs.dts | 2 +- arch/arm/boot/dts/imx6q-mccmon6.dts | 2 +- arch/arm/boot/dts/imx6q-novena.dts | 4 +- arch/arm/boot/dts/imx6q-tbs2910.dts | 2 +- arch/arm/boot/dts/imx6q-tx6q-1110.dts | 2 +- arch/arm/boot/dts/imx6q-tx6q-11x0-mb7.dts | 2 +- arch/arm/boot/dts/imx6q.dtsi | 16 +- arch/arm/boot/dts/imx6qdl-apalis.dtsi | 4 +- arch/arm/boot/dts/imx6qdl-apf6dev.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 4 +- arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 4 +- arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 4 +- arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 6 +- arch/arm/boot/dts/imx6qdl-hummingboard.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi | 4 +- arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi | 4 +- arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi | 4 +- arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi | 4 +- arch/arm/boot/dts/imx6qdl-rex.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 4 +- arch/arm/boot/dts/imx6qdl-tx6.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-wandboard.dtsi | 2 +- arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi | 2 +- arch/arm/boot/dts/imx6qdl.dtsi | 174 ++++++++-------- arch/arm/boot/dts/imx6qp.dtsi | 6 +- arch/arm/boot/dts/imx6sl-evk.dts | 2 +- arch/arm/boot/dts/imx6sl.dtsi | 134 ++++++------ arch/arm/boot/dts/imx6sx-nitrogen6sx.dts | 2 +- arch/arm/boot/dts/imx6sx-sdb-reva.dts | 2 +- arch/arm/boot/dts/imx6sx-sdb.dts | 2 +- arch/arm/boot/dts/imx6sx-udoo-neo.dtsi | 2 +- arch/arm/boot/dts/imx6sx.dtsi | 186 ++++++++--------- arch/arm/boot/dts/imx6ul-pico-hobbit.dts | 4 +- arch/arm/boot/dts/imx6ul-tx6ul-mainboard.dts | 2 +- arch/arm/boot/dts/imx6ul-tx6ul.dtsi | 2 +- arch/arm/boot/dts/imx6ul.dtsi | 142 ++++++------- arch/arm/boot/dts/imx7-colibri.dtsi | 2 +- arch/arm/boot/dts/imx7d-nitrogen7.dts | 2 +- arch/arm/boot/dts/imx7d-pico.dts | 4 +- arch/arm/boot/dts/imx7d-sdb.dts | 2 +- arch/arm/boot/dts/imx7s-warp.dts | 4 +- arch/arm/boot/dts/integrator.dtsi | 10 +- arch/arm/boot/dts/keystone-k2e.dtsi | 6 +- arch/arm/boot/dts/keystone-k2g.dtsi | 34 +-- arch/arm/boot/dts/keystone-k2hk.dtsi | 8 +- arch/arm/boot/dts/keystone-k2l.dtsi | 12 +- arch/arm/boot/dts/keystone.dtsi | 12 +- arch/arm/boot/dts/kirkwood-synology.dtsi | 12 +- arch/arm/boot/dts/kirkwood-ts219.dtsi | 12 +- arch/arm/boot/dts/kirkwood.dtsi | 4 +- arch/arm/boot/dts/lpc3250-ea3250.dts | 8 +- arch/arm/boot/dts/lpc3250-phy3250.dts | 10 +- arch/arm/boot/dts/lpc32xx.dtsi | 2 +- arch/arm/boot/dts/mpa1600.dts | 2 +- arch/arm/boot/dts/mt6589.dtsi | 2 +- arch/arm/boot/dts/nspire.dtsi | 2 +- arch/arm/boot/dts/omap3-n900.dts | 2 +- arch/arm/boot/dts/ox810se.dtsi | 4 +- arch/arm/boot/dts/ox820.dtsi | 2 +- arch/arm/boot/dts/picoxcell-pc3x2.dtsi | 2 +- arch/arm/boot/dts/picoxcell-pc3x3.dtsi | 2 +- arch/arm/boot/dts/pm9g45.dts | 4 +- arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 12 +- arch/arm/boot/dts/qcom-msm8660.dtsi | 22 +- arch/arm/boot/dts/qcom-msm8974.dtsi | 16 +- arch/arm/boot/dts/rk3066a-rayeager.dts | 2 +- arch/arm/boot/dts/rk3288-popmetal.dts | 2 +- arch/arm/boot/dts/sama5d2.dtsi | 12 +- arch/arm/boot/dts/sama5d3.dtsi | 8 +- arch/arm/boot/dts/sama5d3xmb.dtsi | 6 +- arch/arm/boot/dts/sama5d3xmb_cmp.dtsi | 2 +- arch/arm/boot/dts/sama5d4.dtsi | 10 +- arch/arm/boot/dts/ste-href-stuib.dtsi | 2 +- arch/arm/boot/dts/ste-href-tvk1281618.dtsi | 2 +- arch/arm/boot/dts/stih407-clock.dtsi | 6 +- arch/arm/boot/dts/stih407-family.dtsi | 18 +- arch/arm/boot/dts/stih407-pinctrl.dtsi | 52 ++--- arch/arm/boot/dts/stih410-b2120.dts | 2 +- arch/arm/boot/dts/stih410-b2260.dts | 4 +- arch/arm/boot/dts/stih410-clock.dtsi | 6 +- arch/arm/boot/dts/stih410.dtsi | 2 +- arch/arm/boot/dts/stih418-b2199.dts | 4 +- arch/arm/boot/dts/stih418-clock.dtsi | 6 +- arch/arm/boot/dts/stih418.dtsi | 2 +- arch/arm/boot/dts/stihxxx-b2120.dtsi | 6 +- arch/arm/boot/dts/sun4i-a10.dtsi | 194 +++++++++--------- arch/arm/boot/dts/sun5i-a10s.dtsi | 6 +- arch/arm/boot/dts/sun5i-a13.dtsi | 4 +- arch/arm/boot/dts/sun5i-gr8.dtsi | 8 +- arch/arm/boot/dts/sun5i.dtsi | 86 ++++---- arch/arm/boot/dts/sun6i-a31.dtsi | 108 +++++----- arch/arm/boot/dts/sun7i-a20.dtsi | 228 ++++++++++----------- arch/arm/boot/dts/sun8i-a23-a33.dtsi | 62 +++--- arch/arm/boot/dts/sun8i-a23.dtsi | 4 +- arch/arm/boot/dts/sun8i-a33.dtsi | 18 +- arch/arm/boot/dts/sun8i-a83t.dtsi | 4 +- arch/arm/boot/dts/sun8i-v3s.dtsi | 32 +-- arch/arm/boot/dts/sun9i-a80.dtsi | 86 ++++---- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 70 +++---- arch/arm/boot/dts/tango4-common.dtsi | 2 +- arch/arm/boot/dts/usb_a9263.dts | 2 +- arch/arm/boot/dts/vf610-twr.dts | 2 +- arch/arm/boot/dts/vf610-zii-dev-rev-c.dts | 2 +- arch/arm/boot/dts/zx296702.dtsi | 4 +- 203 files changed, 1249 insertions(+), 1249 deletions(-)
arch/arm/boot/dts/armada-370-synology-ds213j.dts +6 -6
@@ -316,32 +316,32 @@ * change the default environment, unless you know * what you are doing. */ - partition@00000000 { /* u-boot */ + partition@0 { /* u-boot */ label = "RedBoot"; reg = <0x00000000 0x000c0000>; /* 768KB */ }; - partition@000c0000 { /* uImage */ + partition@c0000 { /* uImage */ label = "zImage"; reg = <0x000c0000 0x002d0000>; /* 2880KB */ }; - partition@00390000 { /* uInitramfs */ + partition@390000 { /* uInitramfs */ label = "rd.gz"; reg = <0x00390000 0x00440000>; /* 4250KB */ }; - partition@007d0000 { /* MAC address and serial number */ + partition@7d0000 { /* MAC address and serial number */ label = "vendor"; reg = <0x007d0000 0x00010000>; /* 64KB */ }; - partition@007e0000 { + partition@7e0000 { label = "RedBoot config"; reg = <0x007e0000 0x00010000>; /* 64KB */ }; - partition@007f0000 { + partition@7f0000 { label = "FIS directory"; reg = <0x007f0000 0x00010000>; /* 64KB */ };
arch/arm/boot/dts/armada-385-synology-ds116.dts +6 -6
@@ -267,35 +267,35 @@ * enumerated. The MAC address and the serial number are listed * in the "vendor" partition. */ - partition@00000000 { + partition@0 { label = "RedBoot"; reg = <0x00000000 0x000f0000>; read-only; }; - partition@000c0000 { + partition@c0000 { label = "zImage"; reg = <0x000f0000 0x002d0000>; }; - partition@00390000 { + partition@390000 { label = "rd.gz"; reg = <0x003c0000 0x00410000>; }; - partition@007d0000 { + partition@7d0000 { label = "vendor"; reg = <0x007d0000 0x00010000>; read-only; }; - partition@007e0000 { + partition@7e0000 { label = "RedBoot config"; reg = <0x007e0000 0x00010000>; read-only; }; - partition@007f0000 { + partition@7f0000 { label = "FIS directory"; reg = <0x007f0000 0x00010000>; read-only;
arch/arm/boot/dts/armada-xp-synology-ds414.dts +6 -6
@@ -332,32 +332,32 @@ * change the default environment, unless you know * what you are doing. */ - partition@00000000 { /* u-boot */ + partition@0 { /* u-boot */ label = "RedBoot"; reg = <0x00000000 0x000d0000>; /* 832KB */ }; - partition@000c0000 { /* uImage */ + partition@c0000 { /* uImage */ label = "zImage"; reg = <0x000d0000 0x002d0000>; /* 2880KB */ }; - partition@003a0000 { /* uInitramfs */ + partition@3a0000 { /* uInitramfs */ label = "rd.gz"; reg = <0x003a0000 0x00430000>; /* 4250KB */ }; - partition@007d0000 { /* MAC address and serial number */ + partition@7d0000 { /* MAC address and serial number */ label = "vendor"; reg = <0x007d0000 0x00010000>; /* 64KB */ }; - partition@007e0000 { + partition@7e0000 { label = "RedBoot config"; reg = <0x007e0000 0x00010000>; /* 64KB */ }; - partition@007f0000 { + partition@7f0000 { label = "FIS directory"; reg = <0x007f0000 0x00010000>; /* 64KB */ };
arch/arm/boot/dts/aspeed-g4.dtsi +1 -1
@@ -109,7 +109,7 @@ clock-frequency = <192000000>; }; - clk_apb: clk_apb@08 { + clk_apb: clk_apb@8 { #clock-cells = <0>; compatible = "aspeed,g4-apb-clock", "fixed-clock"; reg = <0x08>;
arch/arm/boot/dts/aspeed-g5.dtsi +1 -1
@@ -144,7 +144,7 @@ clock-frequency = <198000000>; }; - clk_apb: clk_apb@08 { + clk_apb: clk_apb@8 { #clock-cells = <0>; compatible = "aspeed,g5-apb-clock", "fixed-clock"; reg = <0x08>;
arch/arm/boot/dts/at91-ariag25.dts +2 -2
@@ -147,12 +147,12 @@ }; }; - usb0: ohci@00600000 { + usb0: ohci@600000 { status = "okay"; num-ports = <3>; }; - usb1: ehci@00700000 { + usb1: ehci@700000 { status = "okay"; }; };
arch/arm/boot/dts/at91-ariettag25.dts +2 -2
@@ -58,12 +58,12 @@ }; }; - usb0: ohci@00600000 { + usb0: ohci@600000 { status = "okay"; num-ports = <3>; }; - usb1: ehci@00700000 { + usb1: ehci@700000 { status = "okay"; }; };
arch/arm/boot/dts/at91-cosino_mega2560.dts +2 -2
@@ -62,7 +62,7 @@ }; }; - usb0: ohci@00600000 { + usb0: ohci@600000 { status = "okay"; num-ports = <3>; atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW */
@@ -71,7 +71,7 @@ >; }; - usb1: ehci@00700000 { + usb1: ehci@700000 { status = "okay"; }; };
arch/arm/boot/dts/at91-kizbox2.dts +2 -2
@@ -133,11 +133,11 @@ }; }; - usb1: ohci@00600000 { + usb1: ohci@600000 { status = "okay"; }; - usb2: ehci@00700000 { + usb2: ehci@700000 { status = "okay"; };
arch/arm/boot/dts/at91-kizboxmini.dts +2 -2
@@ -59,12 +59,12 @@ }; }; - usb0: ohci@00600000 { + usb0: ohci@600000 { num-ports = <1>; status = "okay"; }; - usb1: ehci@00700000 { + usb1: ehci@700000 { status = "okay"; };
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts +3 -3
@@ -58,14 +58,14 @@ }; ahb { - usb0: gadget@00300000 { + usb0: gadget@300000 { atmel,vbus-gpio = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; status = "okay"; }; - usb1: ohci@00400000 { + usb1: ohci@400000 { num-ports = <3>; atmel,vbus-gpio = <0 /* &pioA PIN_PD20 GPIO_ACTIVE_HIGH */ &pioA PIN_PA27 GPIO_ACTIVE_HIGH
@@ -76,7 +76,7 @@ status = "okay"; }; - usb2: ehci@00500000 { + usb2: ehci@500000 { status = "okay"; };
arch/arm/boot/dts/at91-sama5d2_xplained.dts +3 -3
@@ -67,14 +67,14 @@ }; ahb { - usb0: gadget@00300000 { + usb0: gadget@300000 { atmel,vbus-gpio = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; status = "okay"; }; - usb1: ohci@00400000 { + usb1: ohci@400000 { num-ports = <3>; atmel,vbus-gpio = <0 /* &pioA PIN_PB9 GPIO_ACTIVE_HIGH */ &pioA PIN_PB10 GPIO_ACTIVE_HIGH
@@ -85,7 +85,7 @@ status = "okay"; }; - usb2: ehci@00500000 { + usb2: ehci@500000 { status = "okay"; };
arch/arm/boot/dts/at91-sama5d3_xplained.dts +3 -3
@@ -235,14 +235,14 @@ }; }; - usb0: gadget@00500000 { + usb0: gadget@500000 { atmel,vbus-gpio = <&pioE 9 GPIO_ACTIVE_HIGH>; /* PE9, conflicts with A9 */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; status = "okay"; }; - usb1: ohci@00600000 { + usb1: ohci@600000 { num-ports = <3>; atmel,vbus-gpio = <0 &pioE 3 GPIO_ACTIVE_LOW
@@ -251,7 +251,7 @@ status = "okay"; }; - usb2: ehci@00700000 { + usb2: ehci@700000 { status = "okay"; };
arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts +3 -3
@@ -21,14 +21,14 @@ }; ahb { - usb0: gadget@00400000 { + usb0: gadget@400000 { atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; status = "okay"; }; - usb1: ohci@00500000 { + usb1: ohci@500000 { num-ports = <3>; atmel,vbus-gpio = <0 &pioE 11 GPIO_ACTIVE_LOW
@@ -37,7 +37,7 @@ status = "okay"; }; - usb2: ehci@00600000 { + usb2: ehci@600000 { status = "okay"; };
arch/arm/boot/dts/at91-sama5d4_xplained.dts +3 -3
@@ -170,14 +170,14 @@ }; }; - usb0: gadget@00400000 { + usb0: gadget@400000 { atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; status = "okay"; }; - usb1: ohci@00500000 { + usb1: ohci@500000 { num-ports = <3>; atmel,vbus-gpio = <0 &pioE 11 GPIO_ACTIVE_HIGH
@@ -186,7 +186,7 @@ status = "okay"; }; - usb2: ehci@00600000 { + usb2: ehci@600000 { status = "okay"; };
arch/arm/boot/dts/at91-sama5d4ek.dts +3 -3
@@ -216,14 +216,14 @@ }; }; - usb0: gadget@00400000 { + usb0: gadget@400000 { atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; status = "okay"; }; - usb1: ohci@00500000 { + usb1: ohci@500000 { num-ports = <3>; atmel,vbus-gpio = <0 /* &pioE 10 GPIO_ACTIVE_LOW */ &pioE 11 GPIO_ACTIVE_LOW
@@ -232,7 +232,7 @@ status = "okay"; }; - usb2: ehci@00600000 { + usb2: ehci@600000 { status = "okay"; };
arch/arm/boot/dts/at91-vinco.dts +3 -3
@@ -180,14 +180,14 @@ }; }; - usb0: gadget@00400000 { + usb0: gadget@400000 { atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usba_vbus>; status = "disable"; }; - usb1: ohci@00500000 { + usb1: ohci@500000 { num-ports = <3>; atmel,vbus-gpio = <0 &pioE 11 GPIO_ACTIVE_LOW
@@ -196,7 +196,7 @@ status = "disable"; }; - usb2: ehci@00600000 { + usb2: ehci@600000 { /* 4G Modem */ status = "okay"; };
arch/arm/boot/dts/at91rm9200.dtsi +2 -2
@@ -66,7 +66,7 @@ }; }; - sram: sram@00200000 { + sram: sram@200000 { compatible = "mmio-sram"; reg = <0x00200000 0x4000>; };
@@ -938,7 +938,7 @@ status = "disabled"; }; - usb0: ohci@00300000 { + usb0: ohci@300000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00300000 0x100000>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
arch/arm/boot/dts/at91rm9200ek.dts +1 -1
@@ -78,7 +78,7 @@ }; }; - usb0: ohci@00300000 { + usb0: ohci@300000 { num-ports = <2>; status = "okay"; };
arch/arm/boot/dts/at91sam9260.dtsi +1 -1
@@ -69,7 +69,7 @@ }; }; - sram0: sram@002ff000 { + sram0: sram@2ff000 { compatible = "mmio-sram"; reg = <0x002ff000 0x2000>; };
arch/arm/boot/dts/at91sam9261.dtsi +2 -2
@@ -60,7 +60,7 @@ }; }; - sram: sram@00300000 { + sram: sram@300000 { compatible = "mmio-sram"; reg = <0x00300000 0x28000>; };
@@ -71,7 +71,7 @@ #size-cells = <1>; ranges; - usb0: ohci@00500000 { + usb0: ohci@500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
arch/arm/boot/dts/at91sam9261ek.dts +1 -1
@@ -32,7 +32,7 @@ }; ahb { - usb0: ohci@00500000 { + usb0: ohci@500000 { status = "okay"; };
arch/arm/boot/dts/at91sam9263.dtsi +3 -3
@@ -62,12 +62,12 @@ }; }; - sram0: sram@00300000 { + sram0: sram@300000 { compatible = "mmio-sram"; reg = <0x00300000 0x14000>; }; - sram1: sram@00500000 { + sram1: sram@500000 { compatible = "mmio-sram"; reg = <0x00500000 0x4000>; };
@@ -1010,7 +1010,7 @@ status = "disabled"; }; - usb0: ohci@00a00000 { + usb0: ohci@a00000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00a00000 0x100000>; interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
arch/arm/boot/dts/at91sam9263ek.dts +1 -1
@@ -191,7 +191,7 @@ }; }; - usb0: ohci@00a00000 { + usb0: ohci@a00000 { num-ports = <2>; status = "okay"; atmel,vbus-gpio = <&pioA 24 GPIO_ACTIVE_HIGH
arch/arm/boot/dts/at91sam9g20.dtsi +2 -2
@@ -16,11 +16,11 @@ reg = <0x20000000 0x08000000>; }; - sram0: sram@002ff000 { + sram0: sram@2ff000 { status = "disabled"; }; - sram1: sram@002fc000 { + sram1: sram@2fc000 { compatible = "mmio-sram"; reg = <0x002fc000 0x8000>; };
arch/arm/boot/dts/at91sam9g45.dtsi +3 -3
@@ -74,7 +74,7 @@ }; }; - sram: sram@00300000 { + sram: sram@300000 { compatible = "mmio-sram"; reg = <0x00300000 0x10000>; };
@@ -1313,7 +1313,7 @@ status = "disabled"; }; - usb0: ohci@00700000 { + usb0: ohci@700000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00700000 0x100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
@@ -1322,7 +1322,7 @@ status = "disabled"; }; - usb1: ehci@00800000 { + usb1: ehci@800000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00800000 0x100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
arch/arm/boot/dts/at91sam9m10g45ek.dts +2 -2
@@ -290,14 +290,14 @@ }; }; - usb0: ohci@00700000 { + usb0: ohci@700000 { status = "okay"; num-ports = <2>; atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW &pioD 3 GPIO_ACTIVE_LOW>; }; - usb1: ehci@00800000 { + usb1: ehci@800000 { status = "okay"; }; };
arch/arm/boot/dts/at91sam9n12.dtsi +2 -2
@@ -64,7 +64,7 @@ }; }; - sram: sram@00300000 { + sram: sram@300000 { compatible = "mmio-sram"; reg = <0x00300000 0x8000>; };
@@ -1018,7 +1018,7 @@ }; }; - usb0: ohci@00500000 { + usb0: ohci@500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
arch/arm/boot/dts/at91sam9n12ek.dts +1 -1
@@ -169,7 +169,7 @@ }; }; - usb0: ohci@00500000 { + usb0: ohci@500000 { num-ports = <1>; atmel,vbus-gpio = <&pioB 7 GPIO_ACTIVE_LOW>; status = "okay";
arch/arm/boot/dts/at91sam9rl.dtsi +2 -2
@@ -70,7 +70,7 @@ }; }; - sram: sram@00300000 { + sram: sram@300000 { compatible = "mmio-sram"; reg = <0x00300000 0x10000>; };
@@ -81,7 +81,7 @@ #size-cells = <1>; ranges; - fb0: fb@00500000 { + fb0: fb@500000 { compatible = "atmel,at91sam9rl-lcdc"; reg = <0x00500000 0x1000>; interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
arch/arm/boot/dts/at91sam9rlek.dts +1 -1
@@ -32,7 +32,7 @@ }; ahb { - fb0: fb@00500000 { + fb0: fb@500000 { display = <&display0>; status = "okay";
arch/arm/boot/dts/at91sam9x5.dtsi +3 -3
@@ -72,7 +72,7 @@ }; }; - sram: sram@00300000 { + sram: sram@300000 { compatible = "mmio-sram"; reg = <0x00300000 0x8000>; };
@@ -1231,7 +1231,7 @@ }; }; - usb0: ohci@00600000 { + usb0: ohci@600000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
@@ -1240,7 +1240,7 @@ status = "disabled"; }; - usb1: ehci@00700000 { + usb1: ehci@700000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
arch/arm/boot/dts/at91sam9x5ek.dtsi +2 -2
@@ -134,7 +134,7 @@ }; }; - usb0: ohci@00600000 { + usb0: ohci@600000 { status = "okay"; num-ports = <3>; atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
@@ -143,7 +143,7 @@ >; }; - usb1: ehci@00700000 { + usb1: ehci@700000 { status = "okay"; }; };
arch/arm/boot/dts/at91sam9xe.dtsi +2 -2
@@ -49,11 +49,11 @@ model = "Atmel AT91SAM9XE family SoC"; compatible = "atmel,at91sam9xe", "atmel,at91sam9260"; - sram0: sram@002ff000 { + sram0: sram@2ff000 { status = "disabled"; }; - sram1: sram@00300000 { + sram1: sram@300000 { compatible = "mmio-sram"; reg = <0x00300000 0x4000>; };
arch/arm/boot/dts/bcm-cygnus.dtsi +5 -5
@@ -96,14 +96,14 @@ #address-cells = <1>; #size-cells = <1>; - otp: otp@0301c800 { + otp: otp@301c800 { compatible = "brcm,ocotp"; reg = <0x0301c800 0x2c>; brcm,ocotp-size = <2048>; status = "disabled"; }; - pcie_phy: phy@0301d0a0 { + pcie_phy: phy@301d0a0 { compatible = "brcm,cygnus-pcie-phy"; reg = <0x0301d0a0 0x14>; #address-cells = <1>;
@@ -120,7 +120,7 @@ }; }; - pinctrl: pinctrl@0301d0c8 { + pinctrl: pinctrl@301d0c8 { compatible = "brcm,cygnus-pinmux"; reg = <0x0301d0c8 0x30>, <0x0301d24c 0x2c>;
@@ -141,7 +141,7 @@ }; }; - mailbox: mailbox@03024024 { + mailbox: mailbox@3024024 { compatible = "brcm,iproc-mailbox"; reg = <0x03024024 0x40>; interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
@@ -150,7 +150,7 @@ #mbox-cells = <1>; }; - gpio_crmu: gpio@03024800 { + gpio_crmu: gpio@3024800 { compatible = "brcm,cygnus-crmu-gpio"; reg = <0x03024800 0x50>, <0x03024008 0x18>;
arch/arm/boot/dts/bcm-nsp.dtsi +4 -4
@@ -75,7 +75,7 @@ #address-cells = <1>; #size-cells = <1>; - a9pll: arm_clk@00000 { + a9pll: arm_clk@0 { #clock-cells = <0>; compatible = "brcm,nsp-armpll"; clocks = <&osc>;
@@ -164,7 +164,7 @@ #address-cells = <1>; #size-cells = <1>; - gpioa: gpio@0020 { + gpioa: gpio@20 { compatible = "brcm,nsp-gpio-a"; reg = <0x0020 0x70>, <0x3f1c4 0x1c>;
@@ -176,7 +176,7 @@ gpio-ranges = <&pinctrl 0 0 32>; }; - uart0: serial@0300 { + uart0: serial@300 { compatible = "ns16550a"; reg = <0x0300 0x100>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -184,7 +184,7 @@ status = "disabled"; }; - uart1: serial@0400 { + uart1: serial@400 { compatible = "ns16550a"; reg = <0x0400 0x100>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
arch/arm/boot/dts/bcm5301x.dtsi +3 -3
@@ -24,7 +24,7 @@ #address-cells = <1>; #size-cells = <1>; - uart0: serial@0300 { + uart0: serial@300 { compatible = "ns16550"; reg = <0x0300 0x100>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -32,7 +32,7 @@ status = "disabled"; }; - uart1: serial@0400 { + uart1: serial@400 { compatible = "ns16550"; reg = <0x0400 0x100>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@@ -47,7 +47,7 @@ #address-cells = <1>; #size-cells = <1>; - a9pll: arm_clk@00000 { + a9pll: arm_clk@0 { #clock-cells = <0>; compatible = "brcm,nsp-armpll"; clocks = <&osc>;
arch/arm/boot/dts/bcm53573.dtsi +1 -1
@@ -107,7 +107,7 @@ gpio-controller; #gpio-cells = <2>; - uart0: serial@0300 { + uart0: serial@300 { compatible = "ns16550a"; reg = <0x0300 0x100>; interrupt-parent = <&gic>;
arch/arm/boot/dts/berlin2.dtsi +3 -3
@@ -202,7 +202,7 @@ ranges = <0 0xe80000 0x10000>; interrupt-parent = <&aic>; - gpio0: gpio@0400 { + gpio0: gpio@400 { compatible = "snps,dw-apb-gpio"; reg = <0x0400 0x400>; #address-cells = <1>;
@@ -220,7 +220,7 @@ }; }; - gpio1: gpio@0800 { + gpio1: gpio@800 { compatible = "snps,dw-apb-gpio"; reg = <0x0800 0x400>; #address-cells = <1>;
@@ -238,7 +238,7 @@ }; }; - gpio2: gpio@0c00 { + gpio2: gpio@c00 { compatible = "snps,dw-apb-gpio"; reg = <0x0c00 0x400>; #address-cells = <1>;
arch/arm/boot/dts/berlin2cd.dtsi +3 -3
@@ -182,7 +182,7 @@ ranges = <0 0xe80000 0x10000>; interrupt-parent = <&aic>; - gpio0: gpio@0400 { + gpio0: gpio@400 { compatible = "snps,dw-apb-gpio"; reg = <0x0400 0x400>; #address-cells = <1>;
@@ -200,7 +200,7 @@ }; }; - gpio1: gpio@0800 { + gpio1: gpio@800 { compatible = "snps,dw-apb-gpio"; reg = <0x0800 0x400>; #address-cells = <1>;
@@ -218,7 +218,7 @@ }; }; - gpio2: gpio@0c00 { + gpio2: gpio@c00 { compatible = "snps,dw-apb-gpio"; reg = <0x0c00 0x400>; #address-cells = <1>;
arch/arm/boot/dts/berlin2q.dtsi +3 -3
@@ -234,7 +234,7 @@ ranges = <0 0xe80000 0x10000>; interrupt-parent = <&aic>; - gpio0: gpio@0400 { + gpio0: gpio@400 { compatible = "snps,dw-apb-gpio"; reg = <0x0400 0x400>; #address-cells = <1>;
@@ -252,7 +252,7 @@ }; }; - gpio1: gpio@0800 { + gpio1: gpio@800 { compatible = "snps,dw-apb-gpio"; reg = <0x0800 0x400>; #address-cells = <1>;
@@ -270,7 +270,7 @@ }; }; - gpio2: gpio@0c00 { + gpio2: gpio@c00 { compatible = "snps,dw-apb-gpio"; reg = <0x0c00 0x400>; #address-cells = <1>;
arch/arm/boot/dts/dove.dtsi +7 -7
@@ -456,25 +456,25 @@ }; }; - thermal: thermal-diode@001c { + thermal: thermal-diode@1c { compatible = "marvell,dove-thermal"; reg = <0x001c 0x0c>, <0x005c 0x08>; }; - gate_clk: clock-gating-ctrl@0038 { + gate_clk: clock-gating-ctrl@38 { compatible = "marvell,dove-gating-clock"; reg = <0x0038 0x4>; clocks = <&core_clk 0>; #clock-cells = <1>; }; - divider_clk: core-clock@0064 { + divider_clk: core-clock@64 { compatible = "marvell,dove-divider-clock"; reg = <0x0064 0x8>; #clock-cells = <1>; }; - pinctrl: pin-ctrl@0200 { + pinctrl: pin-ctrl@200 { compatible = "marvell,dove-pinctrl"; reg = <0x0200 0x14>, <0x0440 0x04>;
@@ -718,13 +718,13 @@ }; }; - core_clk: core-clocks@0214 { + core_clk: core-clocks@214 { compatible = "marvell,dove-core-clock"; reg = <0x0214 0x4>; #clock-cells = <1>; }; - gpio0: gpio-ctrl@0400 { + gpio0: gpio-ctrl@400 { compatible = "marvell,orion-gpio"; #gpio-cells = <2>; gpio-controller;
@@ -736,7 +736,7 @@ interrupts = <12>, <13>, <14>, <60>; }; - gpio1: gpio-ctrl@0420 { + gpio1: gpio-ctrl@420 { compatible = "marvell,orion-gpio"; #gpio-cells = <2>; gpio-controller;
arch/arm/boot/dts/ep7211-edb7211.dts +1 -1
@@ -75,7 +75,7 @@ }; &bus { - flash: nor@00000000 { + flash: nor@0 { compatible = "cfi-flash"; reg = <0 0x00000000 0x02000000>; bank-width = <2>;
arch/arm/boot/dts/exynos3250-artik5.dtsi +1 -1
@@ -29,7 +29,7 @@ reg = <0x40000000 0x1ff00000>; }; - firmware@0205f000 { + firmware@205f000 { compatible = "samsung,secure-firmware"; reg = <0x0205f000 0x1000>; };
arch/arm/boot/dts/exynos3250-monk.dts +1 -1
@@ -32,7 +32,7 @@ reg = <0x40000000 0x1ff00000>; }; - firmware@0205F000 { + firmware@205f000 { compatible = "samsung,secure-firmware"; reg = <0x0205F000 0x1000>; };
arch/arm/boot/dts/exynos3250-rinato.dts +1 -1
@@ -32,7 +32,7 @@ reg = <0x40000000 0x1ff00000>; }; - firmware@0205F000 { + firmware@205f000 { compatible = "samsung,secure-firmware"; reg = <0x0205F000 0x1000>; };
arch/arm/boot/dts/exynos3250.dtsi +1 -1
@@ -122,7 +122,7 @@ }; }; - sysram@02020000 { + sysram@2020000 { compatible = "mmio-sram"; reg = <0x02020000 0x40000>; #address-cells = <1>;
arch/arm/boot/dts/exynos4.dtsi +2 -2
@@ -55,7 +55,7 @@ serial3 = &serial_3; }; - clock_audss: clock-controller@03810000 { + clock_audss: clock-controller@3810000 { compatible = "samsung,exynos4210-audss-clock"; reg = <0x03810000 0x0C>; #clock-cells = <1>;
@@ -64,7 +64,7 @@ clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; }; - i2s0: i2s@03830000 { + i2s0: i2s@3830000 { compatible = "samsung,s5pv210-i2s"; reg = <0x03830000 0x100>; clocks = <&clock_audss EXYNOS_I2S_BUS>,
arch/arm/boot/dts/exynos4210-pinctrl.dtsi +1 -1
@@ -843,7 +843,7 @@ }; }; - pinctrl@03860000 { + pinctrl@3860000 { gpz: gpz { gpio-controller; #gpio-cells = <2>;
arch/arm/boot/dts/exynos4210-universal_c210.dts +1 -1
@@ -31,7 +31,7 @@ stdout-path = &serial_2; }; - sysram@02020000 { + sysram@2020000 { smp-sysram@0 { status = "disabled"; };
arch/arm/boot/dts/exynos4210.dtsi +2 -2
@@ -64,7 +64,7 @@ }; }; - sysram: sysram@02020000 { + sysram: sysram@2020000 { compatible = "mmio-sram"; reg = <0x02020000 0x20000>; #address-cells = <1>;
@@ -151,7 +151,7 @@ }; }; - pinctrl_2: pinctrl@03860000 { + pinctrl_2: pinctrl@3860000 { compatible = "samsung,exynos4210-pinctrl"; reg = <0x03860000 0x1000>; };
arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi +1 -1
@@ -26,7 +26,7 @@ reg = <0x40000000 0x40000000>; }; - firmware@0203F000 { + firmware@203f000 { compatible = "samsung,secure-firmware"; reg = <0x0203F000 0x1000>; };
arch/arm/boot/dts/exynos4412-odroid-common.dtsi +3 -3
@@ -20,7 +20,7 @@ stdout-path = &serial_1; }; - firmware@0204F000 { + firmware@204f000 { compatible = "samsung,secure-firmware"; reg = <0x0204F000 0x1000>; };
@@ -253,7 +253,7 @@ samsung,i2c-max-bus-freq = <400000>; status = "okay"; - usb3503: usb3503@08 { + usb3503: usb3503@8 { compatible = "smsc,usb3503"; reg = <0x08>;
@@ -263,7 +263,7 @@ initial-mode = <1>; }; - max77686: pmic@09 { + max77686: pmic@9 { compatible = "maxim,max77686"; interrupt-parent = <&gpx3>; interrupts = <2 IRQ_TYPE_NONE>;
arch/arm/boot/dts/exynos4412-origen.dts +1 -1
@@ -32,7 +32,7 @@ stdout-path = &serial_2; }; - firmware@0203F000 { + firmware@203f000 { compatible = "samsung,secure-firmware"; reg = <0x0203F000 0x1000>; };
arch/arm/boot/dts/exynos4412-pinctrl.dtsi +1 -1
@@ -899,7 +899,7 @@ }; }; - pinctrl_2: pinctrl@03860000 { + pinctrl_2: pinctrl@3860000 { gpz: gpz { gpio-controller; #gpio-cells = <2>;
arch/arm/boot/dts/exynos4412-trats2.dts +3 -3
@@ -40,7 +40,7 @@ stdout-path = &serial_2; }; - firmware@0204F000 { + firmware@204f000 { compatible = "samsung,secure-firmware"; reg = <0x0204F000 0x1000>; };
@@ -206,7 +206,7 @@ #size-cells = <0>; status = "okay"; - ak8975@0c { + ak8975@c { compatible = "asahi-kasei,ak8975"; reg = <0x0c>; gpios = <&gpj0 7 GPIO_ACTIVE_HIGH>;
@@ -587,7 +587,7 @@ pinctrl-names = "default"; status = "okay"; - max77686: max77686_pmic@09 { + max77686: max77686_pmic@9 { compatible = "maxim,max77686"; interrupt-parent = <&gpx0>; interrupts = <7 IRQ_TYPE_NONE>;
arch/arm/boot/dts/exynos4412.dtsi +1 -1
@@ -150,7 +150,7 @@ }; }; - sysram@02020000 { + sysram@2020000 { compatible = "mmio-sram"; reg = <0x02020000 0x40000>; #address-cells = <1>;
arch/arm/boot/dts/exynos5250-smdk5250.dts +1 -1
@@ -129,7 +129,7 @@ reg = <0x50>; }; - max77686@09 { + max77686@9 { compatible = "maxim,max77686"; reg = <0x09>; interrupt-parent = <&gpx3>;
arch/arm/boot/dts/exynos5250-snow-common.dtsi +1 -1
@@ -281,7 +281,7 @@ samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <378000>; - max77686: max77686@09 { + max77686: max77686@9 { compatible = "maxim,max77686"; interrupt-parent = <&gpx3>; interrupts = <2 IRQ_TYPE_NONE>;
arch/arm/boot/dts/exynos5250.dtsi +3 -3
@@ -93,7 +93,7 @@ }; soc: soc { - sysram@02020000 { + sysram@2020000 { compatible = "mmio-sram"; reg = <0x02020000 0x30000>; #address-cells = <1>;
@@ -219,7 +219,7 @@ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; }; - pinctrl_3: pinctrl@03860000 { + pinctrl_3: pinctrl@3860000 { compatible = "samsung,exynos5250-pinctrl"; reg = <0x03860000 0x1000>; interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
@@ -475,7 +475,7 @@ status = "disabled"; }; - i2s0: i2s@03830000 { + i2s0: i2s@3830000 { compatible = "samsung,s5pv210-i2s"; status = "disabled"; reg = <0x03830000 0x100>;
arch/arm/boot/dts/exynos5410-odroidxu.dts +3 -3
@@ -54,7 +54,7 @@ #clock-cells = <0>; }; - firmware@02073000 { + firmware@2073000 { compatible = "samsung,secure-firmware"; reg = <0x02073000 0x1000>; };
@@ -164,7 +164,7 @@ samsung,i2c-max-bus-freq = <400000>; status = "okay"; - usb3503: usb-hub@08 { + usb3503: usb-hub@8 { compatible = "smsc,usb3503"; reg = <0x08>;
@@ -178,7 +178,7 @@ refclk-frequency = <24000000>; }; - max77802: pmic@09 { + max77802: pmic@9 { compatible = "maxim,max77802"; reg = <0x9>; interrupt-parent = <&gpx0>;
arch/arm/boot/dts/exynos5410-smdk5410.dts +1 -1
@@ -32,7 +32,7 @@ #clock-cells = <0>; }; - firmware@02037000 { + firmware@2037000 { compatible = "samsung,secure-firmware"; reg = <0x02037000 0x1000>; };
arch/arm/boot/dts/exynos5410.dtsi +2 -2
@@ -187,7 +187,7 @@ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; }; - pinctrl_3: pinctrl@03860000 { + pinctrl_3: pinctrl@3860000 { compatible = "samsung,exynos5410-pinctrl"; reg = <0x03860000 0x1000>; interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
@@ -223,7 +223,7 @@ }; }; - audi2s0: i2s@03830000 { + audi2s0: i2s@3830000 { compatible = "samsung,exynos5420-i2s"; reg = <0x03830000 0x100>; dmas = <&pdma0 10
arch/arm/boot/dts/exynos5420-arndale-octa.dts +1 -1
@@ -30,7 +30,7 @@ bootargs = "console=ttySAC3,115200"; }; - firmware@02073000 { + firmware@2073000 { compatible = "samsung,secure-firmware"; reg = <0x02073000 0x1000>; };
arch/arm/boot/dts/exynos5420.dtsi +3 -3
@@ -352,7 +352,7 @@ interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; }; - pinctrl_4: pinctrl@03860000 { + pinctrl_4: pinctrl@3860000 { compatible = "samsung,exynos5420-pinctrl"; reg = <0x03860000 0x1000>; interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
@@ -365,7 +365,7 @@ interrupt-parent = <&gic>; ranges; - adma: adma@03880000 { + adma: adma@3880000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x03880000 0x1000>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
@@ -429,7 +429,7 @@ }; }; - i2s0: i2s@03830000 { + i2s0: i2s@3830000 { compatible = "samsung,exynos5420-i2s"; reg = <0x03830000 0x100>; dmas = <&adma 0
arch/arm/boot/dts/exynos5422-odroidxu3-common.dtsi +1 -1
@@ -29,7 +29,7 @@ stdout-path = "serial2:115200n8"; }; - firmware@02073000 { + firmware@2073000 { compatible = "samsung,secure-firmware"; reg = <0x02073000 0x1000>; };
arch/arm/boot/dts/exynos5440-ssdk5440.dts +1 -1
@@ -56,7 +56,7 @@ samsung,spi-feedback-delay = <0>; }; - partition@00000 { + partition@0 { label = "BootLoader"; reg = <0x60000 0x80000>; read-only;
arch/arm/boot/dts/exynos5440.dtsi +1 -1
@@ -196,7 +196,7 @@ clock-names = "watchdog"; }; - gmac: ethernet@00230000 { + gmac: ethernet@230000 { compatible = "snps,dwmac-3.70a", "snps,dwmac"; reg = <0x00230000 0x8000>; interrupt-parent = <&gic>;
arch/arm/boot/dts/exynos54xx.dtsi +1 -1
@@ -29,7 +29,7 @@ }; soc: soc { - sysram@02020000 { + sysram@2020000 { compatible = "mmio-sram"; reg = <0x02020000 0x54000>; #address-cells = <1>;
arch/arm/boot/dts/ge863-pro3.dtsi +1 -1
@@ -50,7 +50,7 @@ reg = <0x0 0x7c0000>; }; - root@07c0000 { + root@7c0000 { label = "root"; reg = <0x7c0000 0x7840000>; };
arch/arm/boot/dts/hip01.dtsi +2 -2
@@ -91,14 +91,14 @@ reboot-offset = <0x4>; }; - global_timer@0a000200 { + global_timer@a000200 { compatible = "arm,cortex-a9-global-timer"; reg = <0x0a000200 0x100>; interrupts = <1 11 0xf04>; clocks = <&hisi_refclk144mhz>; }; - local_timer@0a000600 { + local_timer@a000600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x0a000600 0x100>; interrupts = <1 13 0xf04>;
arch/arm/boot/dts/hip04-d01.dts +1 -1
@@ -18,7 +18,7 @@ model = "Hisilicon D01 Development Board"; compatible = "hisilicon,hip04-d01"; - memory@00000000,10000000 { + memory@0,10000000 { device_type = "memory"; reg = <0x00000000 0x10000000 0x00000000 0xc0000000>, <0x00000004 0xc0000000 0x00000003 0x40000000>;
arch/arm/boot/dts/hisi-x5hd2.dtsi +15 -15
@@ -39,7 +39,7 @@ compatible = "simple-bus"; ranges; - timer0: timer@00002000 { + timer0: timer@2000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00002000 0x1000>; /* timer00 & timer01 */
@@ -48,7 +48,7 @@ status = "disabled"; }; - timer1: timer@00a29000 { + timer1: timer@a29000 { /* * Only used in NORMAL state, not available ins * SLOW or DOZE state.
@@ -62,7 +62,7 @@ status = "disabled"; }; - timer2: timer@00a2a000 { + timer2: timer@a2a000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00a2a000 0x1000>; /* timer20 & timer21 */
@@ -71,7 +71,7 @@ status = "disabled"; }; - timer3: timer@00a2b000 { + timer3: timer@a2b000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00a2b000 0x1000>; /* timer30 & timer31 */
@@ -80,7 +80,7 @@ status = "disabled"; }; - timer4: timer@00a81000 { + timer4: timer@a81000 { compatible = "arm,sp804", "arm,primecell"; reg = <0x00a81000 0x1000>; /* timer30 & timer31 */
@@ -89,7 +89,7 @@ status = "disabled"; }; - uart0: uart@00b00000 { + uart0: uart@b00000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00b00000 0x1000>; interrupts = <0 49 4>;
@@ -98,7 +98,7 @@ status = "disabled"; }; - uart1: uart@00006000 { + uart1: uart@6000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00006000 0x1000>; interrupts = <0 50 4>;
@@ -107,7 +107,7 @@ status = "disabled"; }; - uart2: uart@00b02000 { + uart2: uart@b02000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00b02000 0x1000>; interrupts = <0 51 4>;
@@ -116,7 +116,7 @@ status = "disabled"; }; - uart3: uart@00b03000 { + uart3: uart@b03000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x00b03000 0x1000>; interrupts = <0 52 4>;
@@ -125,7 +125,7 @@ status = "disabled"; }; - uart4: uart@00b04000 { + uart4: uart@b04000 { compatible = "arm,pl011", "arm,primecell"; reg = <0xb04000 0x1000>; interrupts = <0 53 4>;
@@ -199,7 +199,7 @@ status = "disabled"; }; - gpio5: gpio@004000 { + gpio5: gpio@4000 { compatible = "arm,pl061", "arm,primecell"; reg = <0x004000 0x1000>; interrupts = <0 113 0x4>;
@@ -378,7 +378,7 @@ }; }; - local_timer@00a00600 { + local_timer@a00600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x00a00600 0x20>; interrupts = <1 13 0xf01>;
@@ -392,7 +392,7 @@ cache-level = <2>; }; - sysctrl: system-controller@00000000 { + sysctrl: system-controller@0 { compatible = "hisilicon,sysctrl", "syscon"; reg = <0x00000000 0x1000>; };
@@ -404,7 +404,7 @@ mask = <0xdeadbeef>; }; - cpuctrl@00a22000 { + cpuctrl@a22000 { compatible = "hisilicon,cpuctrl"; #address-cells = <1>; #size-cells = <1>;
@@ -489,7 +489,7 @@ clocks = <&clock HIX5HD2_SATA_CLK>; }; - ir: ir@001000 { + ir: ir@1000 { compatible = "hisilicon,hix5hd2-ir"; reg = <0x001000 0x1000>; interrupts = <0 47 4>;
arch/arm/boot/dts/imx1.dtsi +22 -22
175 lines not on this page · raw message
arch/arm/boot/dts/imx25-pdk.dts +1 -1
@@ -135,7 +135,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks 129>;
arch/arm/boot/dts/imx28-apx4devkit.dts +1 -1
@@ -142,7 +142,7 @@ pinctrl-0 = <&i2c0_pins_a>; status = "okay"; - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_3p3v>;
arch/arm/boot/dts/imx28-eukrea-mbmx28lc.dtsi +1 -1
@@ -148,7 +148,7 @@ pinctrl-0 = <&i2c0_pins_a>; status = "okay"; - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_3p3v>;
arch/arm/boot/dts/imx28-evk.dts +1 -1
@@ -194,7 +194,7 @@ pinctrl-0 = <&i2c0_pins_a>; status = "okay"; - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_3p3v>;
arch/arm/boot/dts/imx28-m28evk.dts +1 -1
@@ -137,7 +137,7 @@ }; i2c0: i2c@80058000 { - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_3p3v>;
arch/arm/boot/dts/imx28-tx28.dts +1 -1
@@ -298,7 +298,7 @@ clock-frequency = <400000>; status = "okay"; - sgtl5000: sgtl5000@0a { + sgtl5000: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_2p5v>;
arch/arm/boot/dts/imx50.dtsi +1 -1
@@ -52,7 +52,7 @@ }; }; - tzic: tz-interrupt-controller@0fffc000 { + tzic: tz-interrupt-controller@fffc000 { compatible = "fsl,imx50-tzic", "fsl,imx53-tzic", "fsl,tzic"; interrupt-controller; #interrupt-cells = <1>;
arch/arm/boot/dts/imx51-babbage.dts +1 -1
@@ -337,7 +337,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_clkcodec>;
arch/arm/boot/dts/imx53-m53evk.dts +1 -1
@@ -150,7 +150,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_3p2v>;
arch/arm/boot/dts/imx53-qsb-common.dtsi +1 -1
@@ -314,7 +314,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_3p2v>;
arch/arm/boot/dts/imx53-smd.dts +2 -2
@@ -232,12 +232,12 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; }; - magnetometer: mag3110@0e { + magnetometer: mag3110@e { compatible = "fsl,mag3110"; reg = <0x0e>; };
arch/arm/boot/dts/imx53-tx53-x03x.dts +1 -1
@@ -203,7 +203,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_2v5>;
arch/arm/boot/dts/imx53-tx53-x13x.dts +3 -3
@@ -93,7 +93,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - touchscreen2: eeti@04 { + touchscreen2: eeti@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; pinctrl-names = "default";
@@ -110,7 +110,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_2v5>;
@@ -118,7 +118,7 @@ clocks = <&mclk>; }; - touchscreen1: eeti@04 { + touchscreen1: eeti@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; pinctrl-names = "default";
arch/arm/boot/dts/imx53-voipac-bsb.dts +1 -1
@@ -130,7 +130,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_3p3v>;
arch/arm/boot/dts/imx53.dtsi +1 -1
@@ -80,7 +80,7 @@ ports = <&ipu_di0>, <&ipu_di1>; }; - tzic: tz-interrupt-controller@0fffc000 { + tzic: tz-interrupt-controller@fffc000 { compatible = "fsl,imx53-tzic", "fsl,tzic"; interrupt-controller; #interrupt-cells = <1>;
arch/arm/boot/dts/imx6dl-riotboard.dts +2 -2
@@ -157,7 +157,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
@@ -165,7 +165,7 @@ VDDIO-supply = <®_3p3v>; }; - pmic: pf0100@08 { + pmic: pf0100@8 { compatible = "fsl,pfuze100"; reg = <0x08>; interrupt-parent = <&gpio5>;
arch/arm/boot/dts/imx6dl-tx6u-811x.dts +1 -1
@@ -99,7 +99,7 @@ }; &i2c3 { - polytouch2: eeti@04 { + polytouch2: eeti@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; pinctrl-names = "default";
arch/arm/boot/dts/imx6dl-tx6u-81xx-mb7.dts +1 -1
@@ -107,7 +107,7 @@ }; &i2c3 { - polytouch1: eeti@04 { + polytouch1: eeti@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; pinctrl-names = "default";
arch/arm/boot/dts/imx6dl.dtsi +8 -8
@@ -60,35 +60,35 @@ }; soc { - ocram: sram@00900000 { + ocram: sram@900000 { compatible = "mmio-sram"; reg = <0x00900000 0x20000>; clocks = <&clks IMX6QDL_CLK_OCRAM>; }; - aips1: aips-bus@02000000 { - iomuxc: iomuxc@020e0000 { + aips1: aips-bus@2000000 { + iomuxc: iomuxc@20e0000 { compatible = "fsl,imx6dl-iomuxc"; }; - pxp: pxp@020f0000 { + pxp: pxp@20f0000 { reg = <0x020f0000 0x4000>; interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>; }; - epdc: epdc@020f4000 { + epdc: epdc@20f4000 { reg = <0x020f4000 0x4000>; interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>; }; - lcdif: lcdif@020f8000 { + lcdif: lcdif@20f8000 { reg = <0x020f8000 0x4000>; interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; }; }; - aips2: aips-bus@02100000 { - i2c4: i2c@021f8000 { + aips2: aips-bus@2100000 { + i2c4: i2c@21f8000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
arch/arm/boot/dts/imx6q-bx50v3.dtsi +1 -1
@@ -165,7 +165,7 @@ #size-cells = <0>; reg = <0x3>; - sgtl5000: codec@0a { + sgtl5000: codec@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&mclk>;
arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts +1 -1
@@ -139,7 +139,7 @@ &pinctrl_pfuze>; status = "okay"; - pmic: pfuze100@08 { + pmic: pfuze100@8 { compatible = "fsl,pfuze100"; reg = <0x08>; interrupt-parent = <&gpio3>;
arch/arm/boot/dts/imx6q-gw5400-a.dts +3 -3
@@ -211,7 +211,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - pmic: pfuze100@08 { + pmic: pfuze100@8 { compatible = "fsl,pfuze100"; reg = <0x08>;
@@ -322,7 +322,7 @@ reg = <0x1c>; }; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
@@ -330,7 +330,7 @@ VDDIO-supply = <®_3p3v>; }; - touchscreen: egalax_ts@04 { + touchscreen: egalax_ts@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; interrupt-parent = <&gpio7>;
arch/arm/boot/dts/imx6q-h100.dts +2 -2
@@ -185,7 +185,7 @@ reg = <0x68>; }; - sgtl5000: sgtl5000@0a { + sgtl5000: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; pinctrl-names = "default";
@@ -195,7 +195,7 @@ VDDIO-supply = <®_3p3v>; }; - tc358743: tc358743@0f { + tc358743: tc358743@f { compatible = "toshiba,tc358743"; reg = <0x0f>; pinctrl-names = "default";
arch/arm/boot/dts/imx6q-icore-rqs.dts +1 -1
@@ -63,7 +63,7 @@ }; &i2c3 { - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
arch/arm/boot/dts/imx6q-mccmon6.dts +1 -1
@@ -121,7 +121,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - pfuze100: pmic@08 { + pfuze100: pmic@8 { compatible = "fsl,pfuze100"; reg = <0x08>;
arch/arm/boot/dts/imx6q-novena.dts +2 -2
@@ -255,7 +255,7 @@ reg = <0x68>; }; - sbs_battery: bq20z75@0b { + sbs_battery: bq20z75@b { compatible = "sbs,sbs-battery"; reg = <0x0b>; sbs,i2c-retry-count = <50>;
@@ -295,7 +295,7 @@ pinctrl-0 = <&pinctrl_i2c2_novena>; status = "okay"; - pmic: pfuze100@08 { + pmic: pfuze100@8 { compatible = "fsl,pfuze100"; reg = <0x08>;
arch/arm/boot/dts/imx6q-tbs2910.dts +1 -1
@@ -158,7 +158,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - sgtl5000: sgtl5000@0a { + sgtl5000: sgtl5000@a { clocks = <&clks IMX6QDL_CLK_CKO>; compatible = "fsl,sgtl5000"; pinctrl-names = "default";
arch/arm/boot/dts/imx6q-tx6q-1110.dts +1 -1
@@ -99,7 +99,7 @@ }; &i2c3 { - polytouch1: eeti@04 { + polytouch1: eeti@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; pinctrl-names = "default";
arch/arm/boot/dts/imx6q-tx6q-11x0-mb7.dts +1 -1
@@ -108,7 +108,7 @@ }; &i2c3 { - polytouch1: eeti@04 { + polytouch1: eeti@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; pinctrl-names = "default";
arch/arm/boot/dts/imx6q.dtsi +8 -8
@@ -79,15 +79,15 @@ }; soc { - ocram: sram@00900000 { + ocram: sram@900000 { compatible = "mmio-sram"; reg = <0x00900000 0x40000>; clocks = <&clks IMX6QDL_CLK_OCRAM>; }; - aips-bus@02000000 { /* AIPS1 */ - spba-bus@02000000 { - ecspi5: ecspi@02018000 { + aips-bus@2000000 { /* AIPS1 */ + spba-bus@2000000 { + ecspi5: ecspi@2018000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
@@ -102,12 +102,12 @@ }; }; - iomuxc: iomuxc@020e0000 { + iomuxc: iomuxc@20e0000 { compatible = "fsl,imx6q-iomuxc"; }; }; - sata: sata@02200000 { + sata: sata@2200000 { compatible = "fsl,imx6q-ahci"; reg = <0x02200000 0x4000>; interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
@@ -118,7 +118,7 @@ status = "disabled"; }; - gpu_vg: gpu@02204000 { + gpu_vg: gpu@2204000 { compatible = "vivante,gc"; reg = <0x02204000 0x4000>; interrupts = <0 11 IRQ_TYPE_LEVEL_HIGH>;
@@ -128,7 +128,7 @@ power-domains = <&pd_pu>; }; - ipu2: ipu@02800000 { + ipu2: ipu@2800000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx6q-ipu";
arch/arm/boot/dts/imx6qdl-apalis.dtsi +2 -2
@@ -222,7 +222,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - pmic: pfuze100@08 { + pmic: pfuze100@8 { compatible = "fsl,pfuze100"; reg = <0x08>;
@@ -313,7 +313,7 @@ }; }; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
arch/arm/boot/dts/imx6qdl-apf6dev.dtsi +1 -1
@@ -209,7 +209,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
arch/arm/boot/dts/imx6qdl-colibri.dtsi +2 -2
@@ -167,7 +167,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - pmic: pfuze100@08 { + pmic: pfuze100@8 { compatible = "fsl,pfuze100"; reg = <0x08>;
@@ -248,7 +248,7 @@ }; }; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +2 -2
@@ -303,7 +303,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
@@ -311,7 +311,7 @@ VDDIO-supply = <®_3p3v>; }; - touchscreen: egalax_ts@04 { + touchscreen: egalax_ts@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; interrupt-parent = <&gpio7>;
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +2 -2
@@ -294,7 +294,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
@@ -302,7 +302,7 @@ VDDIO-supply = <®_3p3v>; }; - touchscreen: egalax_ts@04 { + touchscreen: egalax_ts@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; interrupt-parent = <&gpio1>;
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +3 -3
@@ -223,7 +223,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - pmic: pfuze100@08 { + pmic: pfuze100@8 { compatible = "fsl,pfuze100"; reg = <0x08>;
@@ -331,7 +331,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
@@ -339,7 +339,7 @@ VDDIO-supply = <®_3p3v>; }; - touchscreen: egalax_ts@04 { + touchscreen: egalax_ts@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; interrupt-parent = <&gpio7>;
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi +1 -1
@@ -138,7 +138,7 @@ }; /* Pro baseboard model */ - sgtl5000: sgtl5000@0a { + sgtl5000: sgtl5000@a { clocks = <&clks IMX6QDL_CLK_CKO>; compatible = "fsl,sgtl5000"; pinctrl-names = "default";
arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi +2 -2
@@ -255,7 +255,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>;
@@ -279,7 +279,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - touchscreen@04 { + touchscreen@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; interrupt-parent = <&gpio1>;
arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi +2 -2
@@ -397,7 +397,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>;
@@ -429,7 +429,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - touchscreen@04 { + touchscreen@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; interrupt-parent = <&gpio1>;
arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi +2 -2
@@ -315,7 +315,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sgtl5000>;
@@ -347,7 +347,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - touchscreen@04 { + touchscreen@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; interrupt-parent = <&gpio1>;
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi +2 -2
@@ -313,7 +313,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
@@ -340,7 +340,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - touchscreen@04 { + touchscreen@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; interrupt-parent = <&gpio1>;
arch/arm/boot/dts/imx6qdl-rex.dtsi +1 -1
@@ -121,7 +121,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi +1 -1
@@ -244,7 +244,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - pmic: pfuze100@08 { + pmic: pfuze100@8 { compatible = "fsl,pfuze100"; reg = <0x08>;
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +1 -1
@@ -350,7 +350,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
arch/arm/boot/dts/imx6qdl-sabresd.dtsi +2 -2
@@ -304,7 +304,7 @@ }; }; - pmic: pfuze100@08 { + pmic: pfuze100@8 { compatible = "fsl,pfuze100"; reg = <0x08>;
@@ -411,7 +411,7 @@ pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; - egalax_ts@04 { + egalax_ts@4 { compatible = "eeti,egalax_ts"; reg = <0x04>; interrupt-parent = <&gpio6>;
arch/arm/boot/dts/imx6qdl-tx6.dtsi +1 -1
@@ -293,7 +293,7 @@ clock-frequency = <400000>; status = "okay"; - sgtl5000: sgtl5000@0a { + sgtl5000: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; VDDA-supply = <®_2v5>;
arch/arm/boot/dts/imx6qdl-wandboard.dtsi +1 -1
@@ -82,7 +82,7 @@ pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; - codec: sgtl5000@0a { + codec: sgtl5000@a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>;
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +1 -1
@@ -390,7 +390,7 @@ clock-frequency = <100000>; status = "okay"; - pmic@08 { + pmic@8 { compatible = "fsl,pfuze100"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pfuze100_irq>;
arch/arm/boot/dts/imx6qdl.dtsi +87 -87
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arch/arm/boot/dts/imx6qp.dtsi +3 -3
@@ -44,19 +44,19 @@ / { soc { - ocram2: sram@00940000 { + ocram2: sram@940000 { compatible = "mmio-sram"; reg = <0x00940000 0x20000>; clocks = <&clks IMX6QDL_CLK_OCRAM>; }; - ocram3: sram@00960000 { + ocram3: sram@960000 { compatible = "mmio-sram"; reg = <0x00960000 0x20000>; clocks = <&clks IMX6QDL_CLK_OCRAM>; }; - aips-bus@02100000 { + aips-bus@2100000 { pre1: pre@21c8000 { compatible = "fsl,imx6qp-pre"; reg = <0x021c8000 0x1000>;
arch/arm/boot/dts/imx6sl-evk.dts +1 -1
@@ -145,7 +145,7 @@ pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; - pmic: pfuze100@08 { + pmic: pfuze100@8 { compatible = "fsl,pfuze100"; reg = <0x08>;
arch/arm/boot/dts/imx6sl.dtsi +67 -67
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arch/arm/boot/dts/imx6sx-nitrogen6sx.dts +1 -1
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arch/arm/boot/dts/imx6sx.dtsi +93 -93
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arch/arm/boot/dts/imx6ul-pico-hobbit.dts +2 -2
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arch/arm/boot/dts/imx6ul-tx6ul-mainboard.dts +1 -1
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arch/arm/boot/dts/imx6ul.dtsi +71 -71
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arch/arm/boot/dts/kirkwood-synology.dtsi +6 -6
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arch/arm/boot/dts/qcom-apq8060-dragonboard.dts +6 -6
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arch/arm/boot/dts/ste-href-tvk1281618.dtsi +1 -1
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arch/arm/boot/dts/stih407-pinctrl.dtsi +26 -26
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arch/arm/boot/dts/sun4i-a10.dtsi +97 -97
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arch/arm/boot/dts/sun5i.dtsi +43 -43
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arch/arm/boot/dts/sun6i-a31.dtsi +54 -54
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arch/arm/boot/dts/sun7i-a20.dtsi +114 -114
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arch/arm/boot/dts/sun8i-a23-a33.dtsi +31 -31
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arch/arm/boot/dts/sun9i-a80.dtsi +43 -43
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arch/arm/boot/dts/sunxi-h3-h5.dtsi +35 -35
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arch/arm/boot/dts/vf610-zii-dev-rev-c.dts +1 -1
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Signature · 6 lines
2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
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Rob Herring
maintainerPATCH 2/2 arm64: dts: fix unit-address leading 0s
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command:
perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*'
Signed-off-by Rob Herring <[email protected]>
--- arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 16 +++--- arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 6 +- arch/arm64/boot/dts/apm/apm-storm.dtsi | 4 +- arch/arm64/boot/dts/arm/foundation-v8.dtsi | 14 ++--- arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts | 2 +- arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi | 24 ++++---- .../boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts | 2 +- .../arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts | 2 +- arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 4 +- .../boot/dts/broadcom/stingray/stingray-clock.dtsi | 12 ++-- .../boot/dts/broadcom/stingray/stingray-fs4.dtsi | 4 +- .../dts/broadcom/stingray/stingray-pinctrl.dtsi | 4 +- .../boot/dts/broadcom/stingray/stingray-sata.dtsi | 32 +++++------ .../arm64/boot/dts/broadcom/stingray/stingray.dtsi | 66 +++++++++++----------- arch/arm64/boot/dts/cavium/thunder-88xx.dts | 2 +- arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 32 +++++------ arch/arm64/boot/dts/hisilicon/hip05-d02.dts | 2 +- arch/arm64/boot/dts/hisilicon/hip06-d03.dts | 2 +- arch/arm64/boot/dts/marvell/armada-7040-db.dts | 2 +- arch/arm64/boot/dts/marvell/armada-8040-db.dts | 2 +- arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts | 2 +- arch/arm64/boot/dts/marvell/armada-8080-db.dts | 2 +- arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi | 4 +- arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 4 +- .../dts/marvell/armada-ap810-ap0-octa-core.dtsi | 4 +- arch/arm64/boot/dts/marvell/berlin4ct.dtsi | 6 +- arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi | 6 +- arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 10 ++-- arch/arm64/boot/dts/qcom/msm8916.dtsi | 6 +- arch/arm64/boot/dts/qcom/msm8996.dtsi | 12 ++-- 30 files changed, 145 insertions(+), 145 deletions(-)
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +8 -8
@@ -178,7 +178,7 @@ #size-cells = <0>; }; - usb_otg: usb at 01c19000 { + usb_otg: usb at 1c19000 { compatible = "allwinner,sun8i-a33-musb"; reg = <0x01c19000 0x0400>; clocks = <&ccu CLK_BUS_OTG>;
@@ -191,7 +191,7 @@ status = "disabled"; }; - usbphy: phy at 01c19400 { + usbphy: phy at 1c19400 { compatible = "allwinner,sun50i-a64-usb-phy"; reg = <0x01c19400 0x14>, <0x01c1a800 0x4>,
@@ -211,7 +211,7 @@ #phy-cells = <1>; }; - ehci0: usb at 01c1a000 { + ehci0: usb at 1c1a000 { compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; reg = <0x01c1a000 0x100>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
@@ -223,7 +223,7 @@ status = "disabled"; }; - ohci0: usb at 01c1a400 { + ohci0: usb at 1c1a400 { compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; reg = <0x01c1a400 0x100>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
@@ -233,7 +233,7 @@ status = "disabled"; }; - ehci1: usb at 01c1b000 { + ehci1: usb at 1c1b000 { compatible = "allwinner,sun50i-a64-ehci", "generic-ehci"; reg = <0x01c1b000 0x100>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
@@ -247,7 +247,7 @@ status = "disabled"; }; - ohci1: usb at 01c1b400 { + ohci1: usb at 1c1b400 { compatible = "allwinner,sun50i-a64-ohci", "generic-ohci"; reg = <0x01c1b400 0x100>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
@@ -259,7 +259,7 @@ status = "disabled"; }; - ccu: clock at 01c20000 { + ccu: clock at 1c20000 { compatible = "allwinner,sun50i-a64-ccu"; reg = <0x01c20000 0x400>; clocks = <&osc24M>, <&osc32k>;
@@ -486,7 +486,7 @@ #reset-cells = <1>; }; - r_pio: pinctrl at 01f02c00 { + r_pio: pinctrl at 1f02c00 { compatible = "allwinner,sun50i-a64-r-pinctrl"; reg = <0x01f02c00 0x400>; interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
arch/arm64/boot/dts/apm/apm-shadowcat.dtsi +3 -3
@@ -19,7 +19,7 @@ #address-cells = <2>; #size-cells = <0>; - cpu at 000 { + cpu at 0 { device_type = "cpu"; compatible = "apm,strega", "arm,armv8"; reg = <0x0 0x000>;
@@ -29,7 +29,7 @@ #clock-cells = <1>; clocks = <&pmd0clk 0>; }; - cpu at 001 { + cpu at 1 { device_type = "cpu"; compatible = "apm,strega", "arm,armv8"; reg = <0x0 0x001>;
@@ -125,7 +125,7 @@ <0x0 0x780a0000 0x0 0x20000>, /* GIC CPU */ <0x0 0x780c0000 0x0 0x10000>, /* GIC VCPU Control */ <0x0 0x780e0000 0x0 0x20000>; /* GIC VCPU */ - v2m0: v2m at 00000 { + v2m0: v2m at 0 { compatible = "arm,gic-v2m-frame"; msi-controller; reg = <0x0 0x0 0x0 0x1000>;
arch/arm64/boot/dts/apm/apm-storm.dtsi +2 -2
@@ -19,7 +19,7 @@ #address-cells = <2>; #size-cells = <0>; - cpu at 000 { + cpu at 0 { device_type = "cpu"; compatible = "apm,potenza", "arm,armv8"; reg = <0x0 0x000>;
@@ -27,7 +27,7 @@ cpu-release-addr = <0x1 0x0000fff8>; next-level-cache = <&xgene_L2_0>; }; - cpu at 001 { + cpu at 1 { device_type = "cpu"; compatible = "apm,potenza", "arm,armv8"; reg = <0x0 0x001>;
arch/arm64/boot/dts/arm/foundation-v8.dtsi +7 -7
@@ -97,7 +97,7 @@ timeout-sec = <30>; }; - smb at 08000000 { + smb at 8000000 { compatible = "arm,vexpress,v2m-p1", "simple-bus"; arm,v2m-memory-map = "rs1"; #address-cells = <2>; /* SMB chipselect number and offset */
@@ -189,12 +189,12 @@ #size-cells = <1>; ranges = <0 3 0 0x200000>; - v2m_sysreg: sysreg at 010000 { + v2m_sysreg: sysreg at 10000 { compatible = "arm,vexpress-sysreg"; reg = <0x010000 0x1000>; }; - v2m_serial0: uart at 090000 { + v2m_serial0: uart at 90000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; interrupts = <5>;
@@ -202,7 +202,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial1: uart at 0a0000 { + v2m_serial1: uart at a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; interrupts = <6>;
@@ -210,7 +210,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial2: uart at 0b0000 { + v2m_serial2: uart at b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; interrupts = <7>;
@@ -218,7 +218,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial3: uart at 0c0000 { + v2m_serial3: uart at c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; interrupts = <8>;
@@ -226,7 +226,7 @@ clock-names = "uartclk", "apb_pclk"; }; - virtio-block at 0130000 { + virtio-block at 130000 { compatible = "virtio,mmio"; reg = <0x130000 0x200>; interrupts = <42>;
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts +1 -1
@@ -104,7 +104,7 @@ <0 63 4>; }; - smb at 08000000 { + smb at 8000000 { compatible = "simple-bus"; #address-cells = <2>;
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi +12 -12
@@ -60,14 +60,14 @@ #size-cells = <1>; ranges = <0 3 0 0x200000>; - v2m_sysreg: sysreg at 010000 { + v2m_sysreg: sysreg at 10000 { compatible = "arm,vexpress-sysreg"; reg = <0x010000 0x1000>; gpio-controller; #gpio-cells = <2>; }; - v2m_sysctl: sysctl at 020000 { + v2m_sysctl: sysctl at 20000 { compatible = "arm,sp810", "arm,primecell"; reg = <0x020000 0x1000>; clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>;
@@ -78,7 +78,7 @@ assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; }; - aaci at 040000 { + aaci at 40000 { compatible = "arm,pl041", "arm,primecell"; reg = <0x040000 0x1000>; interrupts = <11>;
@@ -86,7 +86,7 @@ clock-names = "apb_pclk"; }; - mmci at 050000 { + mmci at 50000 { compatible = "arm,pl180", "arm,primecell"; reg = <0x050000 0x1000>; interrupts = <9 10>;
@@ -98,7 +98,7 @@ clock-names = "mclk", "apb_pclk"; }; - kmi at 060000 { + kmi at 60000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x060000 0x1000>; interrupts = <12>;
@@ -106,7 +106,7 @@ clock-names = "KMIREFCLK", "apb_pclk"; }; - kmi at 070000 { + kmi at 70000 { compatible = "arm,pl050", "arm,primecell"; reg = <0x070000 0x1000>; interrupts = <13>;
@@ -114,7 +114,7 @@ clock-names = "KMIREFCLK", "apb_pclk"; }; - v2m_serial0: uart at 090000 { + v2m_serial0: uart at 90000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x090000 0x1000>; interrupts = <5>;
@@ -122,7 +122,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial1: uart at 0a0000 { + v2m_serial1: uart at a0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0a0000 0x1000>; interrupts = <6>;
@@ -130,7 +130,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial2: uart at 0b0000 { + v2m_serial2: uart at b0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0b0000 0x1000>; interrupts = <7>;
@@ -138,7 +138,7 @@ clock-names = "uartclk", "apb_pclk"; }; - v2m_serial3: uart at 0c0000 { + v2m_serial3: uart at c0000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x0c0000 0x1000>; interrupts = <8>;
@@ -146,7 +146,7 @@ clock-names = "uartclk", "apb_pclk"; }; - wdt at 0f0000 { + wdt at f0000 { compatible = "arm,sp805", "arm,primecell"; reg = <0x0f0000 0x1000>; interrupts = <0>;
@@ -219,7 +219,7 @@ }; }; - virtio-block at 0130000 { + virtio-block at 130000 { compatible = "virtio,mmio"; reg = <0x130000 0x200>; interrupts = <42>;
arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts +1 -1
@@ -128,7 +128,7 @@ }; }; - smb at 08000000 { + smb at 8000000 { compatible = "simple-bus"; #address-cells = <2>;
arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts +1 -1
@@ -114,7 +114,7 @@ reg = <0x04000000 0x06400000>; /* 100MB */ }; - partition at 0a400000{ + partition at a400000{ label = "ncustfs"; reg = <0x0a400000 0x35c00000>; /* 860MB */ };
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +2 -2
@@ -77,7 +77,7 @@ next-level-cache = <&CLUSTER0_L2>; }; - CLUSTER0_L2: l2-cache at 000 { + CLUSTER0_L2: l2-cache at 0 { compatible = "cache"; }; };
@@ -367,7 +367,7 @@ #size-cells = <1>; ranges = <0 0x652e0000 0x80000>; - v2m0: v2m at 00000 { + v2m0: v2m at 0 { compatible = "arm,gic-v2m-frame"; interrupt-parent = <&gic>; msi-controller;
arch/arm64/boot/dts/broadcom/stingray/stingray-clock.dtsi +6 -6
@@ -46,7 +46,7 @@ clock-mult = <1>; }; - genpll0: genpll0 at 0001d104 { + genpll0: genpll0 at 1d104 { #clock-cells = <1>; compatible = "brcm,sr-genpll0"; reg = <0x0001d104 0x32>,
@@ -58,7 +58,7 @@ "clk_paxc_axi"; }; - genpll3: genpll3 at 0001d1e0 { + genpll3: genpll3 at 1d1e0 { #clock-cells = <1>; compatible = "brcm,sr-genpll3"; reg = <0x0001d1e0 0x32>,
@@ -68,7 +68,7 @@ "clk_sdio"; }; - genpll4: genpll4 at 0001d214 { + genpll4: genpll4 at 1d214 { #clock-cells = <1>; compatible = "brcm,sr-genpll4"; reg = <0x0001d214 0x32>,
@@ -80,7 +80,7 @@ "clk_bridge_fscpu"; }; - genpll5: genpll5 at 0001d248 { + genpll5: genpll5 at 1d248 { #clock-cells = <1>; compatible = "brcm,sr-genpll5"; reg = <0x0001d248 0x32>,
@@ -90,7 +90,7 @@ "crypto_ae_clk", "raid_ae_clk"; }; - lcpll0: lcpll0 at 0001d0c4 { + lcpll0: lcpll0 at 1d0c4 { #clock-cells = <1>; compatible = "brcm,sr-lcpll0"; reg = <0x0001d0c4 0x3c>,
@@ -101,7 +101,7 @@ "clk_sata_500"; }; - lcpll1: lcpll1 at 0001d138 { + lcpll1: lcpll1 at 1d138 { #clock-cells = <1>; compatible = "brcm,sr-lcpll1"; reg = <0x0001d138 0x3c>,
arch/arm64/boot/dts/broadcom/stingray/stingray-fs4.dtsi +2 -2
@@ -36,7 +36,7 @@ #size-cells = <1>; ranges = <0x0 0x0 0x67000000 0x00800000>; - crypto_mbox: crypto_mbox at 00000000 { + crypto_mbox: crypto_mbox at 0 { compatible = "brcm,iproc-flexrm-mbox"; reg = <0x00000000 0x200000>; msi-parent = <&gic_its 0x4100>;
@@ -44,7 +44,7 @@ dma-coherent; }; - raid_mbox: raid_mbox at 00400000 { + raid_mbox: raid_mbox at 400000 { compatible = "brcm,iproc-flexrm-mbox"; reg = <0x00400000 0x200000>; dma-coherent;
arch/arm64/boot/dts/broadcom/stingray/stingray-pinctrl.dtsi +2 -2
@@ -32,7 +32,7 @@ #include <dt-bindings/pinctrl/brcm,pinctrl-stingray.h> - pinconf: pinconf at 00140000 { + pinconf: pinconf at 140000 { compatible = "pinconf-single"; reg = <0x00140000 0x250>; pinctrl-single,register-width = <32>;
@@ -40,7 +40,7 @@ /* pinconf functions */ }; - pinmux: pinmux at 0014029c { + pinmux: pinmux at 14029c { compatible = "pinctrl-single"; reg = <0x0014029c 0x250>; #address-cells = <1>;
arch/arm64/boot/dts/broadcom/stingray/stingray-sata.dtsi +16 -16
@@ -36,7 +36,7 @@ #size-cells = <1>; ranges = <0x0 0x0 0x67d00000 0x00800000>; - sata0: ahci at 00210000 { + sata0: ahci at 210000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00210000 0x1000>; reg-names = "ahci";
@@ -52,7 +52,7 @@ }; }; - sata_phy0: sata_phy at 00212100 { + sata_phy0: sata_phy at 212100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00212100 0x1000>; reg-names = "phy";
@@ -66,7 +66,7 @@ }; }; - sata1: ahci at 00310000 { + sata1: ahci at 310000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00310000 0x1000>; reg-names = "ahci";
@@ -82,7 +82,7 @@ }; }; - sata_phy1: sata_phy at 00312100 { + sata_phy1: sata_phy at 312100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00312100 0x1000>; reg-names = "phy";
@@ -96,7 +96,7 @@ }; }; - sata2: ahci at 00120000 { + sata2: ahci at 120000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00120000 0x1000>; reg-names = "ahci";
@@ -112,7 +112,7 @@ }; }; - sata_phy2: sata_phy at 00122100 { + sata_phy2: sata_phy at 122100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00122100 0x1000>; reg-names = "phy";
@@ -126,7 +126,7 @@ }; }; - sata3: ahci at 00130000 { + sata3: ahci at 130000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00130000 0x1000>; reg-names = "ahci";
@@ -142,7 +142,7 @@ }; }; - sata_phy3: sata_phy at 00132100 { + sata_phy3: sata_phy at 132100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00132100 0x1000>; reg-names = "phy";
@@ -156,7 +156,7 @@ }; }; - sata4: ahci at 00330000 { + sata4: ahci at 330000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00330000 0x1000>; reg-names = "ahci";
@@ -172,7 +172,7 @@ }; }; - sata_phy4: sata_phy at 00332100 { + sata_phy4: sata_phy at 332100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00332100 0x1000>; reg-names = "phy";
@@ -186,7 +186,7 @@ }; }; - sata5: ahci at 00400000 { + sata5: ahci at 400000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00400000 0x1000>; reg-names = "ahci";
@@ -202,7 +202,7 @@ }; }; - sata_phy5: sata_phy at 00402100 { + sata_phy5: sata_phy at 402100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00402100 0x1000>; reg-names = "phy";
@@ -216,7 +216,7 @@ }; }; - sata6: ahci at 00410000 { + sata6: ahci at 410000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00410000 0x1000>; reg-names = "ahci";
@@ -232,7 +232,7 @@ }; }; - sata_phy6: sata_phy at 00412100 { + sata_phy6: sata_phy at 412100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00412100 0x1000>; reg-names = "phy";
@@ -246,7 +246,7 @@ }; }; - sata7: ahci at 00420000 { + sata7: ahci at 420000 { compatible = "brcm,iproc-ahci", "generic-ahci"; reg = <0x00420000 0x1000>; reg-names = "ahci";
@@ -262,7 +262,7 @@ }; }; - sata_phy7: sata_phy at 00422100 { + sata_phy7: sata_phy at 422100 { compatible = "brcm,iproc-sr-sata-phy"; reg = <0x00422100 0x1000>; reg-names = "phy";
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +33 -33
261 lines not on this page · raw message
arch/arm64/boot/dts/cavium/thunder-88xx.dts +1 -1
@@ -60,7 +60,7 @@ serial1 = &uaa1; }; - memory at 00000000 { + memory at 0 { device_type = "memory"; reg = <0x0 0x00000000 0x0 0x80000000>; };
arch/arm64/boot/dts/cavium/thunder-88xx.dtsi +16 -16
@@ -62,97 +62,97 @@ #address-cells = <2>; #size-cells = <0>; - cpu at 000 { + cpu at 0 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x000>; enable-method = "psci"; }; - cpu at 001 { + cpu at 1 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x001>; enable-method = "psci"; }; - cpu at 002 { + cpu at 2 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x002>; enable-method = "psci"; }; - cpu at 003 { + cpu at 3 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x003>; enable-method = "psci"; }; - cpu at 004 { + cpu at 4 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x004>; enable-method = "psci"; }; - cpu at 005 { + cpu at 5 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x005>; enable-method = "psci"; }; - cpu at 006 { + cpu at 6 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x006>; enable-method = "psci"; }; - cpu at 007 { + cpu at 7 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x007>; enable-method = "psci"; }; - cpu at 008 { + cpu at 8 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x008>; enable-method = "psci"; }; - cpu at 009 { + cpu at 9 { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x009>; enable-method = "psci"; }; - cpu at 00a { + cpu at a { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00a>; enable-method = "psci"; }; - cpu at 00b { + cpu at b { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00b>; enable-method = "psci"; }; - cpu at 00c { + cpu at c { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00c>; enable-method = "psci"; }; - cpu at 00d { + cpu at d { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00d>; enable-method = "psci"; }; - cpu at 00e { + cpu at e { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00e>; enable-method = "psci"; }; - cpu at 00f { + cpu at f { device_type = "cpu"; compatible = "cavium,thunder", "arm,armv8"; reg = <0x0 0x00f>;
arch/arm64/boot/dts/hisilicon/hip05-d02.dts +1 -1
@@ -18,7 +18,7 @@ model = "Hisilicon Hip05 D02 Development Board"; compatible = "hisilicon,hip05-d02"; - memory at 00000000 { + memory at 0 { device_type = "memory"; reg = <0x0 0x00000000 0x0 0x80000000>; };
arch/arm64/boot/dts/hisilicon/hip06-d03.dts +1 -1
@@ -17,7 +17,7 @@ model = "Hisilicon Hip06 D03 Development Board"; compatible = "hisilicon,hip06-d03"; - memory at 00000000 { + memory at 0 { device_type = "memory"; reg = <0x0 0x00000000 0x0 0x40000000>; };
arch/arm64/boot/dts/marvell/armada-7040-db.dts +1 -1
@@ -56,7 +56,7 @@ stdout-path = "serial0:115200n8"; }; - memory at 00000000 { + memory at 0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; };
arch/arm64/boot/dts/marvell/armada-8040-db.dts +1 -1
@@ -56,7 +56,7 @@ stdout-path = "serial0:115200n8"; }; - memory at 00000000 { + memory at 0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; };
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts +1 -1
@@ -57,7 +57,7 @@ stdout-path = "serial0:115200n8"; }; - memory at 00000000 { + memory at 0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; };
arch/arm64/boot/dts/marvell/armada-8080-db.dts +1 -1
@@ -55,7 +55,7 @@ stdout-path = "serial0:115200n8"; }; - memory at 00000000 { + memory at 0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; };
arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi +2 -2
@@ -54,13 +54,13 @@ #address-cells = <1>; #size-cells = <0>; - cpu at 000 { + cpu at 0 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x000>; enable-method = "psci"; }; - cpu at 001 { + cpu at 1 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x001>;
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi +2 -2
@@ -54,13 +54,13 @@ #address-cells = <1>; #size-cells = <0>; - cpu at 000 { + cpu at 0 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x000>; enable-method = "psci"; }; - cpu at 001 { + cpu at 1 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x001>;
arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi +2 -2
@@ -52,13 +52,13 @@ #size-cells = <0>; compatible = "marvell,armada-ap810-octa"; - cpu at 000 { + cpu at 0 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x000>; enable-method = "psci"; }; - cpu at 001 { + cpu at 1 { device_type = "cpu"; compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x001>;
arch/arm64/boot/dts/marvell/berlin4ct.dtsi +3 -3
@@ -167,7 +167,7 @@ ranges = <0 0xe80000 0x10000>; interrupt-parent = <&aic>; - gpio0: gpio at 0400 { + gpio0: gpio at 400 { compatible = "snps,dw-apb-gpio"; reg = <0x0400 0x400>; #address-cells = <1>;
@@ -185,7 +185,7 @@ }; }; - gpio1: gpio at 0800 { + gpio1: gpio at 800 { compatible = "snps,dw-apb-gpio"; reg = <0x0800 0x400>; #address-cells = <1>;
@@ -203,7 +203,7 @@ }; }; - gpio2: gpio at 0c00 { + gpio2: gpio at c00 { compatible = "snps,dw-apb-gpio"; reg = <0x0c00 0x400>; #address-cells = <1>;
arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi +3 -3
@@ -192,7 +192,7 @@ }; }; - sdhci at 07824000 { + sdhci at 7824000 { vmmc-supply = <&pm8916_l8>; vqmmc-supply = <&pm8916_l5>;
@@ -202,7 +202,7 @@ status = "okay"; }; - sdhci at 07864000 { + sdhci at 7864000 { vmmc-supply = <&pm8916_l11>; vqmmc-supply = <&pm8916_l12>;
@@ -232,7 +232,7 @@ }; }; - lpass at 07708000 { + lpass at 7708000 { status = "okay"; };
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +5 -5
@@ -51,31 +51,31 @@ pinctrl-1 = <&blsp2_uart2_4pins_sleep>; }; - i2c at 07577000 { + i2c at 7577000 { /* On Low speed expansion */ label = "LS-I2C0"; status = "okay"; }; - i2c at 075b6000 { + i2c at 75b6000 { /* On Low speed expansion */ label = "LS-I2C1"; status = "okay"; }; - spi at 07575000 { + spi at 7575000 { /* On Low speed expansion */ label = "LS-SPI0"; status = "okay"; }; - i2c at 075b5000 { + i2c at 75b5000 { /* On High speed expansion */ label = "HS-I2C2"; status = "okay"; }; - spi at 075ba000{ + spi at 75ba000{ /* On High speed expansion */ label = "HS-SPI1"; status = "okay";
arch/arm64/boot/dts/qcom/msm8916.dtsi +3 -3
@@ -495,7 +495,7 @@ status = "disabled"; }; - lpass: lpass at 07708000 { + lpass: lpass at 7708000 { status = "disabled"; compatible = "qcom,lpass-cpu-apq8016"; clocks = <&gcc GCC_ULTAUDIO_AHBFABRIC_IXFABRIC_CLK>,
@@ -530,7 +530,7 @@ #sound-dai-cells = <1>; }; - sdhc_1: sdhci at 07824000 { + sdhc_1: sdhci at 7824000 { compatible = "qcom,sdhci-msm-v4"; reg = <0x07824900 0x11c>, <0x07824000 0x800>; reg-names = "hc_mem", "core_mem";
@@ -547,7 +547,7 @@ status = "disabled"; }; - sdhc_2: sdhci at 07864000 { + sdhc_2: sdhci at 7864000 { compatible = "qcom,sdhci-msm-v4"; reg = <0x07864900 0x11c>, <0x07864000 0x800>; reg-names = "hc_mem", "core_mem";
arch/arm64/boot/dts/qcom/msm8996.dtsi +6 -6
@@ -395,7 +395,7 @@ #clock-cells = <1>; }; - blsp1_spi0: spi at 07575000 { + blsp1_spi0: spi at 7575000 { compatible = "qcom,spi-qup-v2.2.1"; reg = <0x07575000 0x600>; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
@@ -410,7 +410,7 @@ status = "disabled"; }; - blsp2_i2c0: i2c at 075b5000 { + blsp2_i2c0: i2c at 75b5000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x075b5000 0x1000>; interrupts = <GIC_SPI 101 0>;
@@ -441,7 +441,7 @@ status = "disabled"; }; - blsp2_i2c1: i2c at 075b6000 { + blsp2_i2c1: i2c at 75b6000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x075b6000 0x1000>; interrupts = <GIC_SPI 102 0>;
@@ -466,7 +466,7 @@ status = "disabled"; }; - blsp1_i2c2: i2c at 07577000 { + blsp1_i2c2: i2c at 7577000 { compatible = "qcom,i2c-qup-v2.2.1"; reg = <0x07577000 0x1000>; interrupts = <GIC_SPI 97 0>;
@@ -481,7 +481,7 @@ status = "disabled"; }; - blsp2_spi5: spi at 075ba000{ + blsp2_spi5: spi at 75ba000{ compatible = "qcom,spi-qup-v2.2.1"; reg = <0x075ba000 0x600>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
@@ -522,7 +522,7 @@ #interrupt-cells = <2>; }; - timer at 09840000 { + timer at 9840000 { #address-cells = <1>; #size-cells = <1>; ranges;
Signature · 1 line
2.11.0
Arnd Bergmann
AppliedPATCH 1/2 arm: dts: fix unit-address leading 0s
In reply to Rob HerringQuoted 9 lines · Rob Herring
Fix dtc warnings for '
simple_bus_reg' due to leading 0s. Converted using the following command:perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find
arch/arm/boot/dts-type -f -name '*.dts*'Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some occurrences of uppercase hex.
Signed-off-by Rob Herring <[email protected]>
Applied both to next/dt, thanks a lot for the cleanups!
Arnd