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powerpc/64: set DSCR default initially from SPR

PATCH Applied Nicholas Piggin 3 participants 4 messages Oct 24, 2017 – Nov 14, 2017 PowerPC

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Nicholas Piggin

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#0 lore raw

PATCH 1/1 powerpc/64: set DSCR default initially from SPR

Take the DSCR value set by firmware as the dscr_default value, rather than zero.

POWER9 recommends DSCR default to a non-zero value.

From: Nicholas Piggin <[email protected]>
---
This has a problem that OS which set the DSCR to non-default then kexec to Linux will be used as our default. I send a corresponding patch to skiboot which resets SPRs in opal_reinit_cpus which will make this do the right thing in that case.

 arch/powerpc/kernel/setup.h    |  6 ++++++
 arch/powerpc/kernel/setup_64.c |  9 +++++++++
 arch/powerpc/kernel/sysfs.c    | 11 +++++++++++
 3 files changed, 26 insertions(+)
arch/powerpc/kernel/setup.h +6 -0
index cfba134b3024..21c18071d9d5 100644
@@ -45,6 +45,12 @@ void emergency_stack_init(void);
 static inline void emergency_stack_init(void) { };
 #endif
 
+#ifdef CONFIG_PPC64
+void record_spr_defaults(void);
+#else
+static inline void record_spr_defaults(void) { };
+#endif
+
 /*
  * Having this in kvm_ppc.h makes include dependencies too
  * tricky to solve for setup-common.c so have it here.
arch/powerpc/kernel/setup_64.c +9 -0
index b89c6aac48c9..911c4d606453 100644
@@ -69,6 +69,8 @@
 #include <asm/opal.h>
 #include <asm/cputhreads.h>
 
+#include "setup.h"
+
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
 #else

@@ -317,6 +319,13 @@ void __init early_setup(unsigned long dt_ptr)
 	early_init_mmu();
 
 	/*
+	 * After firmware and early platform setup code has set things up,
+	 * we note the SPR values for configurable control/performance
+	 * registers, and use those as initial defaults.
+	 */
+	record_spr_defaults();
+
+	/*
 	 * At this point, we can let interrupts switch to virtual mode
 	 * (the MMU has been setup), so adjust the MSR in the PACA to
 	 * have IR and DR set and enable AIL if it exists
arch/powerpc/kernel/sysfs.c +11 -0
index 4437c70c7c2b..d60f6f5c7b0c 100644
@@ -590,6 +590,17 @@ static void sysfs_create_dscr_default(void)
 	if (cpu_has_feature(CPU_FTR_DSCR))
 		err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
 }
+
+void record_spr_defaults(void)
+{
+	int cpu;
+
+	if (cpu_has_feature(CPU_FTR_DSCR)) {
+		dscr_default = mfspr(SPRN_DSCR);
+		for (cpu = 0; cpu < nr_cpu_ids; cpu++)
+			paca[cpu].dscr_default = dscr_default;
+	}
+}
 #endif /* CONFIG_PPC64 */
 
 #ifdef HAS_PPC_PMC_PA6T
Signature · 1 line
2.13.3
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#1 lore raw
Quoted 11 lines · Nicholas Piggin

Take the DSCR value set by firmware as the dscr_default value, rather than zero.

POWER9 recommends DSCR default to a non-zero value.

From: Nicholas Piggin <[email protected]>
---
This has a problem that OS which set the DSCR to non-default then kexec to Linux will be used as our default. I send a corresponding patch to skiboot which resets SPRs in opal_reinit_cpus which will make this do the right thing in that case.

That doesn't work for pseries etc.

We should reset it in the kexec down path.

cheers

author reviewer
#2 lore raw
Quoted 14 lines · On Wed, 25 Oct 2017 12:01:10 +0200 Michael Ellerman <[email protected]> wrote:
Quoted 11 lines · Nicholas Piggin

Take the DSCR value set by firmware as the dscr_default value, rather than zero.

POWER9 recommends DSCR default to a non-zero value.

From: Nicholas Piggin <[email protected]>
---
This has a problem that OS which set the DSCR to non-default then kexec to Linux will be used as our default. I send a corresponding patch to skiboot which resets SPRs in opal_reinit_cpus which will make this do the right thing in that case.

Quoted 3 lines

That doesn't work for pseries etc.

We should reset it in the kexec down path.

Okay I'll add that too. We should have a hypercall to reset all the state for us like opal_reinit_cpus I reckon, but restoring it before kexec isn't a bad idea even if we had such a thing.

Thanks,
Nick