hw/pcie-pci-bridge: restrict to X86 and ARM

PATCH In review Marcel Apfelbaum 5 participants 5 messages Nov 9, 2017 – Nov 14, 2017

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Marcel Apfelbaum

author

2017-11-09 15:47 UTC #0 lore raw

PATCH v5 1/1 hw/pcie-pci-bridge: restrict to X86 and ARM

The PCIE-PCI bridge is specific to "pure" PCIe systems (on QEMU we have X86 and ARM), it does not make sense to have it in other archs.

Reported-by Thomas Huth <[email protected]>

Signed-off-by Marcel Apfelbaum <[email protected]>

---

V4 -> V5
- Since all other tries failed, conditioned the device on the PCIe Root Port.

V3 -> V4:
- Move the config line to pci.mak (Thomas)

V2 -> V3:
- Another tweak in subject s/if/it (Cornelia)

V1 -> V2:
Addressed Thomas and Cornelia comments:
- Conditioned the pcie-pci-bridge compilation on the PCIe Root CONFIG_PCIE_PORT
- Tweaked subject PCI -> PCIe

Thanks,
Marcel

 hw/pci-bridge/Makefile.objs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

hw/pci-bridge/Makefile.objs +2 -2

index 666db37da2..1b05023662 100644
@@ -1,5 +1,5 @@
-common-obj-y += pci_bridge_dev.o pcie_pci_bridge.o
-common-obj-$(CONFIG_PCIE_PORT) += pcie_root_port.o gen_pcie_root_port.o
+common-obj-y += pci_bridge_dev.o
+common-obj-$(CONFIG_PCIE_PORT) += pcie_root_port.o gen_pcie_root_port.o pcie_pci_bridge.o
 common-obj-$(CONFIG_PXB) += pci_expander_bridge.o
 common-obj-$(CONFIG_XIO3130) += xio3130_upstream.o xio3130_downstream.o
 common-obj-$(CONFIG_IOH3420) += ioh3420.o

Signature · 1 line

2.13.5

Thomas Huth

Reviewed-by on v5 1/1

2017-11-09 16:33 UTC #1 lore raw

Quoted 36 lines · Marcel Apfelbaum

The PCIE-PCI bridge is specific to "pure" PCIe systems (on QEMU we have X86 and ARM), it does not make sense to have it in other archs.
Reported-by Thomas Huth <[email protected]>
Signed-off-by Marcel Apfelbaum <[email protected]>
---
V4 -> V5
- Since all other tries failed, conditioned the device on the PCIe Root Port.
V3 -> V4:
- Move the config line to pci.mak (Thomas)
V2 -> V3:
- Another tweak in subject s/if/it (Cornelia)
V1 -> V2:
Addressed Thomas and Cornelia comments:
- Conditioned the pcie-pci-bridge compilation on the PCIe Root CONFIG_PCIE_PORT
- Tweaked subject PCI -> PCIe
Thanks,
Marcel
 hw/pci-bridge/Makefile.objs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
hw/pci-bridge/Makefile.objs +0 -0
index 666db37da2..1b05023662 100644

hw/pci-bridge/Makefile.objs line 5

Quoted 7 lines

hw/pci-bridge/Makefile.objs +2 -2

@@ -1,5 +1,5 @@
-common-obj-y += pci_bridge_dev.o pcie_pci_bridge.o
-common-obj-$(CONFIG_PCIE_PORT) += pcie_root_port.o gen_pcie_root_port.o
+common-obj-y += pci_bridge_dev.o
+common-obj-$(CONFIG_PCIE_PORT) += pcie_root_port.o gen_pcie_root_port.o pcie_pci_bridge.o
 common-obj-$(CONFIG_PXB) += pci_expander_bridge.o
 common-obj-$(CONFIG_XIO3130) += xio3130_upstream.o xio3130_downstream.o
 common-obj-$(CONFIG_IOH3420) += ioh3420.o

Reviewed-by Thomas Huth <[email protected]>

Philippe Mathieu-Daudé

Reviewed-by Tested-by on v5 1/1

2017-11-09 16:43 UTC #2 lore raw

In reply to Marcel Apfelbaum

Hi Marcel,

Cc'ing Paul and Yongbok Since I'm not sure their Boston board could also use it.

Quoted 36 lines · Marcel Apfelbaum

The PCIE-PCI bridge is specific to "pure" PCIe systems (on QEMU we have X86 and ARM), it does not make sense to have it in other archs.
Reported-by Thomas Huth <[email protected]>
Signed-off-by Marcel Apfelbaum <[email protected]>
---
V4 -> V5
- Since all other tries failed, conditioned the device on the PCIe Root Port.
V3 -> V4:
- Move the config line to pci.mak (Thomas)
V2 -> V3:
- Another tweak in subject s/if/it (Cornelia)
V1 -> V2:
Addressed Thomas and Cornelia comments:
- Conditioned the pcie-pci-bridge compilation on the PCIe Root CONFIG_PCIE_PORT
- Tweaked subject PCI -> PCIe
Thanks,
Marcel
 hw/pci-bridge/Makefile.objs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
hw/pci-bridge/Makefile.objs +0 -0
index 666db37da2..1b05023662 100644

hw/pci-bridge/Makefile.objs line 2

Quoted 4 lines

hw/pci-bridge/Makefile.objs +2 -2

@@ -1,5 +1,5 @@
-common-obj-y += pci_bridge_dev.o pcie_pci_bridge.o
-common-obj-$(CONFIG_PCIE_PORT) += pcie_root_port.o gen_pcie_root_port.o
+common-obj-y += pci_bridge_dev.o
+common-obj-$(CONFIG_PCIE_PORT) += pcie_root_port.o gen_pcie_root_port.o pcie_pci_bridge.o

KISS :)

Reviewed-by Philippe Mathieu-Daudé <[email protected]>

Tested-by Philippe Mathieu-Daudé <[email protected]>

Quoted 4 lines

hw/pci-bridge/Makefile.objs +0 -0

 common-obj-$(CONFIG_PXB) += pci_expander_bridge.o
 common-obj-$(CONFIG_XIO3130) += xio3130_upstream.o xio3130_downstream.o
 common-obj-$(CONFIG_IOH3420) += ioh3420.o

Yongbok Kim

Tested-by

2017-11-14 12:27 UTC #3 lore raw

Quoted 48 lines · Philippe Mathieu-Daudé

Hi Marcel,
Cc'ing Paul and Yongbok Since I'm not sure their Boston board could also use it.
Quoted 36 lines · Marcel Apfelbaum
The PCIE-PCI bridge is specific to "pure" PCIe systems (on QEMU we have X86 and ARM), it does not make sense to have it in other archs.
Reported-by Thomas Huth <[email protected]>
Signed-off-by Marcel Apfelbaum <[email protected]>
---
V4 -> V5
- Since all other tries failed, conditioned the device on the PCIe Root Port.
V3 -> V4:
- Move the config line to pci.mak (Thomas)
V2 -> V3:
- Another tweak in subject s/if/it (Cornelia)
V1 -> V2:
Addressed Thomas and Cornelia comments:
- Conditioned the pcie-pci-bridge compilation on the PCIe Root CONFIG_PCIE_PORT
- Tweaked subject PCI -> PCIe
Thanks,
Marcel
  hw/pci-bridge/Makefile.objs | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
hw/pci-bridge/Makefile.objs +0 -0
index 666db37da2..1b05023662 100644
hw/pci-bridge/Makefile.objs line 2
Quoted 4 lines
hw/pci-bridge/Makefile.objs +2 -2
@@ -1,5 +1,5 @@
-common-obj-y += pci_bridge_dev.o pcie_pci_bridge.o
-common-obj-$(CONFIG_PCIE_PORT) += pcie_root_port.o gen_pcie_root_port.o
+common-obj-y += pci_bridge_dev.o
+common-obj-$(CONFIG_PCIE_PORT) += pcie_root_port.o gen_pcie_root_port.o pcie_pci_bridge.o
KISS :)

Quoted 7 lines

Reviewed-by Philippe Mathieu-Daudé <[email protected]>
Tested-by Philippe Mathieu-Daudé <[email protected]>
Quoted 4 lines
hw/pci-bridge/Makefile.objs +0 -0
  common-obj-$(CONFIG_PXB) += pci_expander_bridge.o
  common-obj-$(CONFIG_XIO3130) += xio3130_upstream.o xio3130_downstream.o
  common-obj-$(CONFIG_IOH3420) += ioh3420.o

Hi Marcel, Philippe.

It looks ok for MIPS Boston.

[Yongbok Kim:
tested for MIPS boston]

Tested-by Yongbok Kim <[email protected]>

Regards,
Yongbok

Cornelia Huck

Reviewed-by on v5 1/1

2017-11-10 10:54 UTC #4 lore raw

In reply to Marcel Apfelbaum

Quoted 36 lines · On Thu, 9 Nov 2017 17:46:45 +0200 Marcel Apfelbaum <[email protected]> wrote:

The PCIE-PCI bridge is specific to "pure" PCIe systems (on QEMU we have X86 and ARM), it does not make sense to have it in other archs.
Reported-by Thomas Huth <[email protected]>
Signed-off-by Marcel Apfelbaum <[email protected]>
---
V4 -> V5
- Since all other tries failed, conditioned the device on the PCIe Root Port.
V3 -> V4:
- Move the config line to pci.mak (Thomas)
V2 -> V3:
- Another tweak in subject s/if/it (Cornelia)
V1 -> V2:
Addressed Thomas and Cornelia comments:
- Conditioned the pcie-pci-bridge compilation on the PCIe Root CONFIG_PCIE_PORT
- Tweaked subject PCI -> PCIe
Thanks,
Marcel
 hw/pci-bridge/Makefile.objs | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
hw/pci-bridge/Makefile.objs +0 -0
index 666db37da2..1b05023662 100644

hw/pci-bridge/Makefile.objs line 5

Quoted 7 lines

hw/pci-bridge/Makefile.objs +2 -2

@@ -1,5 +1,5 @@
-common-obj-y += pci_bridge_dev.o pcie_pci_bridge.o
-common-obj-$(CONFIG_PCIE_PORT) += pcie_root_port.o gen_pcie_root_port.o
+common-obj-y += pci_bridge_dev.o
+common-obj-$(CONFIG_PCIE_PORT) += pcie_root_port.o gen_pcie_root_port.o pcie_pci_bridge.o
 common-obj-$(CONFIG_PXB) += pci_expander_bridge.o
 common-obj-$(CONFIG_XIO3130) += xio3130_upstream.o xio3130_downstream.o
 common-obj-$(CONFIG_IOH3420) += ioh3420.o

Reviewed-by Cornelia Huck <[email protected]>