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pinctrl: sh-pfc: add PORT_GP_CFG_{6|22}() helper macros

PATCH In review Sergei Shtylyov 2 participants 2 messages Nov 10, 2017 – Nov 13, 2017

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GPIO Pin control
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Sergei Shtylyov

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PATCH 1/2 pinctrl: sh-pfc: add PORT_GP_CFG_{6|22}() helper macros

They follow the style of the existing PORT_GP_CFG_<n>() macros and will be used by a follow-up patch for the R8A77970 SoC.

Based on the original (and large) patch by Daisuke Matsushita <[email protected]>.

Signed-off-by Vladimir Barinov <vladimir.barinov-M4DtvfQ/[email protected]>
Signed-off-by Sergei Shtylyov <sergei.shtylyov-M4DtvfQ/[email protected]>
---
 drivers/pinctrl/sh-pfc/sh_pfc.h |   16 ++++++++++++----
 1 file changed, 12 insertions(+), 4 deletions(-)
drivers/pinctrl/sh-pfc/sh_pfc.h +12 -4
Index: renesas-drivers/drivers/pinctrl/sh-pfc/sh_pfc.h
===================================================================
@@ -389,10 +389,14 @@ extern const struct sh_pfc_soc_info shx3
 	PORT_GP_CFG_1(bank, 3,  fn, sfx, cfg)
 #define PORT_GP_4(bank, fn, sfx)	PORT_GP_CFG_4(bank, fn, sfx, 0)
 
-#define PORT_GP_CFG_8(bank, fn, sfx, cfg)				\
+#define PORT_GP_CFG_6(bank, fn, sfx, cfg)				\
 	PORT_GP_CFG_4(bank, fn, sfx, cfg),				\
 	PORT_GP_CFG_1(bank, 4,  fn, sfx, cfg),				\
-	PORT_GP_CFG_1(bank, 5,  fn, sfx, cfg),				\
+	PORT_GP_CFG_1(bank, 5,  fn, sfx, cfg)
+#define PORT_GP_6(bank, fn, sfx)	PORT_GP_CFG_6(bank, fn, sfx, 0)
+
+#define PORT_GP_CFG_8(bank, fn, sfx, cfg)				\
+	PORT_GP_CFG_6(bank, fn, sfx, cfg),				\
 	PORT_GP_CFG_1(bank, 6,  fn, sfx, cfg),				\
 	PORT_GP_CFG_1(bank, 7,  fn, sfx, cfg)
 #define PORT_GP_8(bank, fn, sfx)	PORT_GP_CFG_8(bank, fn, sfx, 0)

@@ -450,9 +454,13 @@ extern const struct sh_pfc_soc_info shx3
 	PORT_GP_CFG_1(bank, 20, fn, sfx, cfg)
 #define PORT_GP_21(bank, fn, sfx)	PORT_GP_CFG_21(bank, fn, sfx, 0)
 
-#define PORT_GP_CFG_23(bank, fn, sfx, cfg)				\
+#define PORT_GP_CFG_22(bank, fn, sfx, cfg)				\
 	PORT_GP_CFG_21(bank, fn, sfx, cfg),				\
-	PORT_GP_CFG_1(bank, 21, fn, sfx, cfg),				\
+	PORT_GP_CFG_1(bank, 21, fn, sfx, cfg)
+#define PORT_GP_22(bank, fn, sfx)	PORT_GP_CFG_22(bank, fn, sfx, 0)
+
+#define PORT_GP_CFG_23(bank, fn, sfx, cfg)				\
+	PORT_GP_CFG_22(bank, fn, sfx, cfg),				\
 	PORT_GP_CFG_1(bank, 22, fn, sfx, cfg)
 #define PORT_GP_23(bank, fn, sfx)	PORT_GP_CFG_23(bank, fn, sfx, 0)

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Reviewed-by on v1 1/2
#1 lore raw

Hi Sergei,

Quoted 8 lines · Sergei Shtylyov

They follow the style of the existing PORT_GP_CFG_<n>() macros and will be used by a follow-up patch for the R8A77970 SoC.

Based on the original (and large) patch by Daisuke Matsushita <[email protected]>.

Signed-off-by Vladimir Barinov <[email protected]>
Signed-off-by Sergei Shtylyov <[email protected]>

Thanks for your patch!

Soon we will have all 32 sets of macros ;-)

Reviewed-by Geert Uytterhoeven <[email protected]>

I.e. will queue in sh-pfc-for-v4.16.

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds