arm64: mm: remove stale comment
Mark Rutland
reviewerPATCH 1/1 arm64: mm: remove stale comment
Since commit:
155433cb365ee466 ("arm64: cache: Remove support for ASID-tagged VIVT I-caches")
... the ASID rollover code no longer performs I-cache maintenance, yet a leftover comment says it does. The comment doesn't say anything that can't be inferred from the next line, so let's remove it entirely.
--- arch/arm64/mm/context.c | 1 - 1 file changed, 1 deletion(-)
arch/arm64/mm/context.c +0 -1
@@ -117,7 +117,6 @@ static void flush_context(unsigned int cpu)per_cpu (reserved_asids, i) = asid; } -/* Queue a TLB invalidate and flush the I-cache if necessary. */ cpumask_setall (&tlb_flush_pending); }
Signature · 1 line
2.11.0
PATCH 1/1 arm64: mm: remove stale comment
Quoted 20 lines · Mark Rutland
Since commit:
155433cb365ee466("arm64: cache: Remove support for ASID-tagged VIVT I-caches")... the ASID rollover code no longer performs I-cache maintenance, yet a leftover comment says it does. The comment doesn't say anything that can't be inferred from the next line, so let's remove it entirely.
Signed-off-by Mark Rutland <[email protected]>Cc Catalin Marinas <[email protected]>Cc Will Deacon <[email protected]>--- arch/arm64/mm/context.c | 1 - 1 file changed, 1 deletion(-)arch/arm64/mm/context.c +0
-0
arch/arm64/mm/context.c static void flush_context(unsigned int cpu) · line 120
Quoted 5 lines
arch/arm64/mm/context.c +0
-1@@ -117,7 +117,6 @@ static void flush_context(unsigned int cpu)per_cpu (reserved_asids, i) = asid; } -/* Queue a TLB invalidate and flush the I-cache if necessary. */ cpumask_setall (&tlb_flush_pending);
Given that we don't normally do TLB invalidation by setting a flag, I'd be inclined to say something like
/* * Queue a TLB invalidation for each CPU to perform on next * context-switch. */
Also, if you're bored, there's a comment in asm/cacheflush.h talking about ASID-tagged I-cache too.
Will