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make stolen resource centric

PATCH In review Matthew Auld 5 participants 15 messages Nov 24, 2017

Subsystems (6)
DRM drivers x86 Intel i915 PCI +2 more subsystems
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Matthew Auld

author
#0 lore raw

cover make stolen resource centric

Continuation of Paulo' stolen series[1], addressing the feedback from Joonas and Chris.

[1] https://patchwork.freedesktop.org/series/30923/

Joonas Lahtinen (1):
x86/early-quirks: Extend Intel graphics stolen memory placement to

    64bit

Matthew Auld (7):
x86/early-quirks: replace the magical increment start values drm/i915: nuke the duplicated stolen discovery drm/i915: s/mappable_end/mappable_size/
drm/i915: make dsm struct resource centric drm/i915: make reserved struct resource centric drm/i915: make mappable struct resource centric drm/i915: prefer resource_size_t for everything stolen

 arch/x86/kernel/early-quirks.c                |  86 ++++++------
 drivers/char/agp/intel-gtt.c                  |  16 +--
 drivers/gpu/drm/i915/gvt/gvt.h                |   4 +-
 drivers/gpu/drm/i915/i915_debugfs.c           |   2 +-
 drivers/gpu/drm/i915/i915_drv.c               |   4 +-
 drivers/gpu/drm/i915/i915_drv.h               |  26 +++-
 drivers/gpu/drm/i915/i915_gem.c               |  16 +--
 drivers/gpu/drm/i915/i915_gem_execbuffer.c    |   4 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c           | 103 +++++---------
 drivers/gpu/drm/i915/i915_gem_gtt.h           |  12 +-
 drivers/gpu/drm/i915/i915_gem_stolen.c        | 187 ++++++--------------------
 drivers/gpu/drm/i915/i915_gpu_error.c         |   2 +-
 drivers/gpu/drm/i915/i915_vgpu.c              |  12 +-
 drivers/gpu/drm/i915/i915_vma.c               |   6 +-
 drivers/gpu/drm/i915/intel_display.c          |   2 +-
 drivers/gpu/drm/i915/intel_fbc.c              |  10 +-
 drivers/gpu/drm/i915/intel_fbdev.c            |   2 +-
 drivers/gpu/drm/i915/intel_overlay.c          |   4 +-
 drivers/gpu/drm/i915/intel_pm.c               |  33 +++--
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |   6 +-
 drivers/gpu/drm/i915/selftests/i915_vma.c     |  22 +--
 drivers/gpu/drm/i915/selftests/mock_gtt.c     |   5 +-
 include/drm/i915_drm.h                        |   3 +
 include/drm/intel-gtt.h                       |   4 +-
 24 files changed, 232 insertions(+), 339 deletions(-)
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author
#1 lore raw

PATCH 1/8 x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit

From: Joonas Lahtinen <[email protected]>

In preparation for upcoming SKUs, allow more freedom in placement of the Intel graphics stolen memory by BIOS to full 64bit range.

v2: export the stolen region as a resource

    fix u16 << 16 (Chris)
Signed-off-by Joonas Lahtinen <[email protected]>
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Ville Syrjälä <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc [email protected]
Reviewed-by Chris Wilson <[email protected]> #v1
---
 arch/x86/kernel/early-quirks.c | 86 +++++++++++++++++++++++-------------------
 include/drm/i915_drm.h         |  3 ++
 2 files changed, 50 insertions(+), 39 deletions(-)
arch/x86/kernel/early-quirks.c +47 -39
index 1e82f787c160..3116f579841a 100644
@@ -243,7 +243,7 @@ static void __init intel_remapping_check(int num, int slot, int func)
 #define KB(x)	((x) * 1024UL)
 #define MB(x)	(KB (KB (x)))
 
-static size_t __init i830_tseg_size(void)
+static resource_size_t __init i830_tseg_size(void)
 {
 	u8 esmramc = read_pci_config_byte(0, 0, 0, I830_ESMRAMC);
 

@@ -256,7 +256,7 @@ static size_t __init i830_tseg_size(void)
 		return KB(512);
 }
 
-static size_t __init i845_tseg_size(void)
+static resource_size_t __init i845_tseg_size(void)
 {
 	u8 esmramc = read_pci_config_byte(0, 0, 0, I845_ESMRAMC);
 	u8 tseg_size = esmramc & I845_TSEG_SIZE_MASK;

@@ -273,7 +273,7 @@ static size_t __init i845_tseg_size(void)
 	return 0;
 }
 
-static size_t __init i85x_tseg_size(void)
+static resource_size_t __init i85x_tseg_size(void)
 {
 	u8 esmramc = read_pci_config_byte(0, 0, 0, I85X_ESMRAMC);
 

@@ -283,12 +283,12 @@ static size_t __init i85x_tseg_size(void)
 	return MB(1);
 }
 
-static size_t __init i830_mem_size(void)
+static resource_size_t __init i830_mem_size(void)
 {
 	return read_pci_config_byte(0, 0, 0, I830_DRB3) * MB(32);
 }
 
-static size_t __init i85x_mem_size(void)
+static resource_size_t __init i85x_mem_size(void)
 {
 	return read_pci_config_byte(0, 0, 1, I85X_DRB3) * MB(32);
 }

@@ -297,36 +297,36 @@ static size_t __init i85x_mem_size(void)
  * On 830/845/85x the stolen memory base isn't available in any
  * register. We need to calculate it as TOM-TSEG_SIZE-stolen_size.
  */
-static phys_addr_t __init i830_stolen_base(int num, int slot, int func,
-					   size_t stolen_size)
+static resource_size_t __init i830_stolen_base(int num, int slot, int func,
+					       resource_size_t stolen_size)
 {
-	return (phys_addr_t)i830_mem_size() - i830_tseg_size() - stolen_size;
+	return i830_mem_size() - i830_tseg_size() - stolen_size;
 }
 
-static phys_addr_t __init i845_stolen_base(int num, int slot, int func,
-					   size_t stolen_size)
+static resource_size_t __init i845_stolen_base(int num, int slot, int func,
+					       resource_size_t stolen_size)
 {
-	return (phys_addr_t)i830_mem_size() - i845_tseg_size() - stolen_size;
+	return i830_mem_size() - i845_tseg_size() - stolen_size;
 }
 
-static phys_addr_t __init i85x_stolen_base(int num, int slot, int func,
-					   size_t stolen_size)
+static resource_size_t __init i85x_stolen_base(int num, int slot, int func,
+					       resource_size_t stolen_size)
 {
-	return (phys_addr_t)i85x_mem_size() - i85x_tseg_size() - stolen_size;
+	return i85x_mem_size() - i85x_tseg_size() - stolen_size;
 }
 
-static phys_addr_t __init i865_stolen_base(int num, int slot, int func,
-					   size_t stolen_size)
+static resource_size_t __init i865_stolen_base(int num, int slot, int func,
+					       resource_size_t stolen_size)
 {
 	u16 toud = 0;
 
 	toud = read_pci_config_16(0, 0, 0, I865_TOUD);
 
-	return (phys_addr_t)(toud << 16) + i845_tseg_size();
+	return (resource_size_t)(toud << 16) + i845_tseg_size();
 }
 
-static phys_addr_t __init gen3_stolen_base(int num, int slot, int func,
-					   size_t stolen_size)
+static resource_size_t __init gen3_stolen_base(int num, int slot, int func,
+					       resource_size_t stolen_size)
 {
 	u32 bsm;
 

@@ -337,10 +337,10 @@ static phys_addr_t __init gen3_stolen_base(int num, int slot, int func,
 	 */
 	bsm = read_pci_config(num, slot, func, INTEL_BSM);
 
-	return (phys_addr_t)bsm & INTEL_BSM_MASK;
+	return bsm & INTEL_BSM_MASK;
 }
 
-static size_t __init i830_stolen_size(int num, int slot, int func)
+static resource_size_t __init i830_stolen_size(int num, int slot, int func)
 {
 	u16 gmch_ctrl;
 	u16 gms;

@@ -361,7 +361,7 @@ static size_t __init i830_stolen_size(int num, int slot, int func)
 	return 0;
 }
 
-static size_t __init gen3_stolen_size(int num, int slot, int func)
+static resource_size_t __init gen3_stolen_size(int num, int slot, int func)
 {
 	u16 gmch_ctrl;
 	u16 gms;

@@ -390,7 +390,7 @@ static size_t __init gen3_stolen_size(int num, int slot, int func)
 	return 0;
 }
 
-static size_t __init gen6_stolen_size(int num, int slot, int func)
+static resource_size_t __init gen6_stolen_size(int num, int slot, int func)
 {
 	u16 gmch_ctrl;
 	u16 gms;

@@ -398,10 +398,10 @@ static size_t __init gen6_stolen_size(int num, int slot, int func)
 	gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL);
 	gms = (gmch_ctrl >> SNB_GMCH_GMS_SHIFT) & SNB_GMCH_GMS_MASK;
 
-	return (size_t)gms * MB(32);
+	return gms * MB(32);
 }
 
-static size_t __init gen8_stolen_size(int num, int slot, int func)
+static resource_size_t __init gen8_stolen_size(int num, int slot, int func)
 {
 	u16 gmch_ctrl;
 	u16 gms;

@@ -409,10 +409,10 @@ static size_t __init gen8_stolen_size(int num, int slot, int func)
 	gmch_ctrl = read_pci_config_16(num, slot, func, SNB_GMCH_CTRL);
 	gms = (gmch_ctrl >> BDW_GMCH_GMS_SHIFT) & BDW_GMCH_GMS_MASK;
 
-	return (size_t)gms * MB(32);
+	return gms * MB(32);
 }
 
-static size_t __init chv_stolen_size(int num, int slot, int func)
+static resource_size_t __init chv_stolen_size(int num, int slot, int func)
 {
 	u16 gmch_ctrl;
 	u16 gms;

@@ -426,14 +426,14 @@ static size_t __init chv_stolen_size(int num, int slot, int func)
 	 * 0x17 to 0x1d: 4MB increments start at 36MB
 	 */
 	if (gms < 0x11)
-		return (size_t)gms * MB(32);
+		return gms * MB(32);
 	else if (gms < 0x17)
-		return (size_t)(gms - 0x11 + 2) * MB(4);
+		return (gms - 0x11 + 2) * MB(4);
 	else
-		return (size_t)(gms - 0x17 + 9) * MB(4);
+		return (gms - 0x17 + 9) * MB(4);
 }
 
-static size_t __init gen9_stolen_size(int num, int slot, int func)
+static resource_size_t __init gen9_stolen_size(int num, int slot, int func)
 {
 	u16 gmch_ctrl;
 	u16 gms;

@@ -444,14 +444,15 @@ static size_t __init gen9_stolen_size(int num, int slot, int func)
 	/* 0x0  to 0xef: 32MB increments starting at 0MB */
 	/* 0xf0 to 0xfe: 4MB increments starting at 4MB */
 	if (gms < 0xf0)
-		return (size_t)gms * MB(32);
+		return gms * MB(32);
 	else
-		return (size_t)(gms - 0xf0 + 1) * MB(4);
+		return (gms - 0xf0 + 1) * MB(4);
 }
 
 struct intel_early_ops {
-	size_t (*stolen_size)(int num, int slot, int func);
-	phys_addr_t (*stolen_base)(int num, int slot, int func, size_t size);
+	resource_size_t (*stolen_size)(int num, int slot, int func);
+	resource_size_t (*stolen_base)(int num, int slot, int func,
+				       resource_size_t size);
 };
 
 static const struct intel_early_ops i830_early_ops __initconst = {

@@ -531,12 +532,15 @@ static const struct pci_device_id intel_early_ids[] __initconst = {
 	INTEL_CNL_IDS(&gen9_early_ops),
 };
 
+struct resource intel_graphics_stolen_res = DEFINE_RES_MEM(0, 0);
+EXPORT_SYMBOL(intel_graphics_stolen_res);
+
 static void __init
 intel_graphics_stolen(int num, int slot, int func,
 		      const struct intel_early_ops *early_ops)
 {
-	phys_addr_t base, end;
-	size_t size;
+	resource_size_t base, size;
+	resource_size_t end;
 
 	size = early_ops->stolen_size(num, slot, func);
 	base = early_ops->stolen_base(num, slot, func, size);

@@ -545,8 +549,12 @@ intel_graphics_stolen(int num, int slot, int func,
 		return;
 
 	end = base + size - 1;
-	printk(KERN_INFO "Reserving Intel graphics memory at %pa-%pa\n",
-	       &base, &end);
+
+	intel_graphics_stolen_res.start = base;
+	intel_graphics_stolen_res.end = end;
+
+	printk(KERN_INFO "Reserving Intel graphics memory at %pR\n",
+	       &intel_graphics_stolen_res);
 
 	/* Mark this space as reserved */
 	e820__range_add(base, size, E820_TYPE_RESERVED);
include/drm/i915_drm.h +3 -0
index 4e1b274e1164..c9e5a6621b95 100644
@@ -36,6 +36,9 @@ extern bool i915_gpu_lower(void);
 extern bool i915_gpu_busy(void);
 extern bool i915_gpu_turbo_disable(void);
 
+/* Exported from arch/x86/kernel/early-quirks.c */
+extern struct resource intel_graphics_stolen_res;
+
 /*
  * The Bridge device's PCI config space has information about the
  * fb aperture size and the amount of pre-reserved memory.
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author
#2 lore raw

PATCH 2/8 x86/early-quirks: replace the magical increment start values

In reply to Matthew Auld

Replace the magical +2, +9 etc. with +MB, which is far easier to read.

Suggested-by Ville Syrjälä <[email protected]>
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Ville Syrjälä <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc [email protected]
---
 arch/x86/kernel/early-quirks.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
arch/x86/kernel/early-quirks.c +3 -3
index 3116f579841a..3bc1e49d6c41 100644
@@ -428,9 +428,9 @@ static resource_size_t __init chv_stolen_size(int num, int slot, int func)
 	if (gms < 0x11)
 		return gms * MB(32);
 	else if (gms < 0x17)
-		return (gms - 0x11 + 2) * MB(4);
+		return (gms - 0x11) * MB(4) + MB(8);
 	else
-		return (gms - 0x17 + 9) * MB(4);
+		return (gms - 0x17) * MB(4) + MB(36);
 }
 
 static resource_size_t __init gen9_stolen_size(int num, int slot, int func)

@@ -446,7 +446,7 @@ static resource_size_t __init gen9_stolen_size(int num, int slot, int func)
 	if (gms < 0xf0)
 		return gms * MB(32);
 	else
-		return (gms - 0xf0 + 1) * MB(4);
+		return (gms - 0xf0) * MB(4) + MB(4);
 }
 
 struct intel_early_ops {
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Reviewed-by on v1 2/8
#3 lore raw

Re: [PATCH 2/8] x86/early-quirks: replace the magical increment start values

Quoted 20 lines · Matthew Auld

Replace the magical +2, +9 etc. with +MB, which is far easier to read.

Suggested-by Ville Syrjälä <[email protected]>
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Ville Syrjälä <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
Cc Ingo Molnar <[email protected]>
Cc H. Peter Anvin <[email protected]>
Cc [email protected]
---
 arch/x86/kernel/early-quirks.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
arch/x86/kernel/early-quirks.c +0 -0
index 3116f579841a..3bc1e49d6c41 100644

arch/x86/kernel/early-quirks.c static resource_size_t __init chv_stolen_size(int num, int slot, int func) · line 433

Quoted 8 lines
arch/x86/kernel/early-quirks.c +2 -2
@@ -428,9 +428,9 @@ static resource_size_t __init chv_stolen_size(int num, int slot, int func)
 	if (gms < 0x11)
 		return gms * MB(32);
 	else if (gms < 0x17)
-		return (gms - 0x11 + 2) * MB(4);
+		return (gms - 0x11) * MB(4) + MB(8);
 	else
-		return (gms - 0x17 + 9) * MB(4);
+		return (gms - 0x17) * MB(4) + MB(36);
Reviewed-by Ville Syrjälä <[email protected]>

But now I'm thinking we should also reverse the if ladders...

if (gms >= 0x17)

	return (gms - 0x17) * ...;
else if (gms >= 0x11)
	return (gms - 0x11) * ...;
else
	return gms * ...;

Better? I think so.

Quoted 14 lines
arch/x86/kernel/early-quirks.c +1 -1
 }
 
 static resource_size_t __init gen9_stolen_size(int num, int slot, int func)

@@ -446,7 +446,7 @@ static resource_size_t __init gen9_stolen_size(int num, int slot, int func)
 	if (gms < 0xf0)
 		return gms * MB(32);
 	else
-		return (gms - 0xf0 + 1) * MB(4);
+		return (gms - 0xf0) * MB(4) + MB(4);
 }
 
 struct intel_early_ops {
Signature · 1 line
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Signature · 6 lines
Ville Syrjälä
Intel OTC
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author
#4 lore raw

PATCH 3/8 drm/i915: nuke the duplicated stolen discovery

In reply to Matthew Auld

We duplicate the stolen discovery code in early-quirks and in i915, however now the stolen region is exported as a resource from early-quirks we can nuke the duplication.

Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c    |  51 +--------------
 drivers/gpu/drm/i915/i915_gem_stolen.c | 109 +--------------------------------
 2 files changed, 4 insertions(+), 156 deletions(-)
drivers/gpu/drm/i915/i915_gem_gtt.c +3 -48
index 41a203e0c160..6b567bab2363 100644
@@ -2949,50 +2949,6 @@ static unsigned int chv_get_total_gtt_size(u16 gmch_ctrl)
 	return 0;
 }
 
-static size_t gen6_get_stolen_size(u16 snb_gmch_ctl)
-{
-	snb_gmch_ctl >>= SNB_GMCH_GMS_SHIFT;
-	snb_gmch_ctl &= SNB_GMCH_GMS_MASK;
-	return (size_t)snb_gmch_ctl << 25; /* 32 MB units */
-}
-
-static size_t gen8_get_stolen_size(u16 bdw_gmch_ctl)
-{
-	bdw_gmch_ctl >>= BDW_GMCH_GMS_SHIFT;
-	bdw_gmch_ctl &= BDW_GMCH_GMS_MASK;
-	return (size_t)bdw_gmch_ctl << 25; /* 32 MB units */
-}
-
-static size_t chv_get_stolen_size(u16 gmch_ctrl)
-{
-	gmch_ctrl >>= SNB_GMCH_GMS_SHIFT;
-	gmch_ctrl &= SNB_GMCH_GMS_MASK;
-
-	/*
-	 * 0x0  to 0x10: 32MB increments starting at 0MB
-	 * 0x11 to 0x16: 4MB increments starting at 8MB
-	 * 0x17 to 0x1d: 4MB increments start at 36MB
-	 */
-	if (gmch_ctrl < 0x11)
-		return (size_t)gmch_ctrl << 25;
-	else if (gmch_ctrl < 0x17)
-		return (size_t)(gmch_ctrl - 0x11 + 2) << 22;
-	else
-		return (size_t)(gmch_ctrl - 0x17 + 9) << 22;
-}
-
-static size_t gen9_get_stolen_size(u16 gen9_gmch_ctl)
-{
-	gen9_gmch_ctl >>= BDW_GMCH_GMS_SHIFT;
-	gen9_gmch_ctl &= BDW_GMCH_GMS_MASK;
-
-	if (gen9_gmch_ctl < 0xf0)
-		return (size_t)gen9_gmch_ctl << 25; /* 32 MB units */
-	else
-		/* 4MB increments starting at 0xf0 for 4MB */
-		return (size_t)(gen9_gmch_ctl - 0xf0 + 1) << 22;
-}
-
 static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
 {
 	struct drm_i915_private *dev_priv = ggtt->base.i915;

@@ -3343,14 +3299,13 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
 
 	pci_read_config_word(pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
 
+	ggtt->stolen_size = resource_size(&intel_graphics_stolen_res);
+
 	if (INTEL_GEN(dev_priv) >= 9) {
-		ggtt->stolen_size = gen9_get_stolen_size(snb_gmch_ctl);
 		size = gen8_get_total_gtt_size(snb_gmch_ctl);
 	} else if (IS_CHERRYVIEW(dev_priv)) {
-		ggtt->stolen_size = chv_get_stolen_size(snb_gmch_ctl);
 		size = chv_get_total_gtt_size(snb_gmch_ctl);
 	} else {
-		ggtt->stolen_size = gen8_get_stolen_size(snb_gmch_ctl);
 		size = gen8_get_total_gtt_size(snb_gmch_ctl);
 	}
 

@@ -3408,7 +3363,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
 		DRM_ERROR("Can't set DMA mask/consistent mask (%d)\n", err);
 	pci_read_config_word(pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
 
-	ggtt->stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
+	ggtt->stolen_size = resource_size(&intel_graphics_stolen_res);
 
 	size = gen6_get_total_gtt_size(snb_gmch_ctl);
 	ggtt->base.total = (size / sizeof(gen6_pte_t)) << PAGE_SHIFT;
drivers/gpu/drm/i915/i915_gem_stolen.c +1 -108

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#5 lore raw

PATCH 4/8 drm/i915: s/mappable_end/mappable_size/

In reply to Matthew Auld

In a later patch we introduce 'struct resource mappable', which means we will have both mappable.end and mappable_end, both meaning different things. Therefore to avoid any confusion prefer mappable_size for mappable_end, since it is effectively the size of the resource.

Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/char/agp/intel-gtt.c                  |  4 ++--
 drivers/gpu/drm/i915/gvt/gvt.h                |  2 +-
 drivers/gpu/drm/i915/i915_debugfs.c           |  2 +-
 drivers/gpu/drm/i915/i915_drv.c               |  2 +-
 drivers/gpu/drm/i915/i915_gem.c               |  8 +++----
 drivers/gpu/drm/i915/i915_gem_execbuffer.c    |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c           | 30 +++++++++++++--------------
 drivers/gpu/drm/i915/i915_gem_gtt.h           |  2 +-
 drivers/gpu/drm/i915/i915_vgpu.c              | 12 +++++------
 drivers/gpu/drm/i915/i915_vma.c               |  4 ++--
 drivers/gpu/drm/i915/intel_fbdev.c            |  2 +-
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  2 +-
 drivers/gpu/drm/i915/selftests/i915_vma.c     | 22 ++++++++++----------
 drivers/gpu/drm/i915/selftests/mock_gtt.c     |  2 +-
 include/drm/intel-gtt.h                       |  2 +-
 15 files changed, 49 insertions(+), 49 deletions(-)
drivers/char/agp/intel-gtt.c +2 -2
index 9b6b6023193b..2a321ee2943a 100644
@@ -1424,12 +1424,12 @@ EXPORT_SYMBOL(intel_gmch_probe);
 void intel_gtt_get(u64 *gtt_total,
 		   u32 *stolen_size,
 		   phys_addr_t *mappable_base,
-		   u64 *mappable_end)
+		   u64 *mappable_size)
 {
 	*gtt_total = intel_private.gtt_total_entries << PAGE_SHIFT;
 	*stolen_size = intel_private.stolen_size;
 	*mappable_base = intel_private.gma_bus_addr;
-	*mappable_end = intel_private.gtt_mappable_entries << PAGE_SHIFT;
+	*mappable_size = intel_private.gtt_mappable_entries << PAGE_SHIFT;
 }
 EXPORT_SYMBOL(intel_gtt_get);
drivers/gpu/drm/i915/gvt/gvt.h +1 -1
index 393066726993..028d00e61bad 100644
@@ -335,7 +335,7 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt);
 #define HOST_FENCE 4
 
 /* Aperture/GM space definitions for GVT device */
-#define gvt_aperture_sz(gvt)	  (gvt->dev_priv->ggtt.mappable_end)
+#define gvt_aperture_sz(gvt)	  (gvt->dev_priv->ggtt.mappable_size)
 #define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable_base)
 
 #define gvt_ggtt_gm_sz(gvt)	  (gvt->dev_priv->ggtt.base.total)
drivers/gpu/drm/i915/i915_debugfs.c +1 -1
index 28294470ae31..a05e2b92c02c 100644
@@ -523,7 +523,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
 		   dpy_count, dpy_size);
 
 	seq_printf(m, "%llu [%llu] gtt total\n",
-		   ggtt->base.total, ggtt->mappable_end);
+		   ggtt->base.total, ggtt->mappable_size);
 	seq_printf(m, "Supported page sizes: %s\n",
 		   stringify_page_sizes(INTEL_INFO(dev_priv)->page_sizes,
 					buf, sizeof(buf)));
drivers/gpu/drm/i915/i915_drv.c +1 -1
index 0793a27e2b95..e1bb0c8822aa 100644
@@ -729,7 +729,7 @@ static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
 		return -ENOMEM;
 
 	ap->ranges[0].base = ggtt->mappable_base;
-	ap->ranges[0].size = ggtt->mappable_end;
+	ap->ranges[0].size = ggtt->mappable_size;
 
 	primary =
 		pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
drivers/gpu/drm/i915/i915_gem.c +4 -4
index e03d6c2554e2..05cc4f2df1bf 100644
@@ -66,7 +66,7 @@ insert_mappable_node(struct i915_ggtt *ggtt,
 	memset(node, 0, sizeof(*node));
 	return drm_mm_insert_node_in_range(&ggtt->base.mm, node,
 					   size, 0, I915_COLOR_UNEVICTABLE,
-					   0, ggtt->mappable_end,
+					   0, ggtt->mappable_size,
 					   DRM_MM_INSERT_LOW);
 }
 

@@ -4158,7 +4158,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
 		 * the object in and out of the Global GTT and
 		 * waste a lot of cycles under the mutex.
 		 */
-		if (obj->base.size > dev_priv->ggtt.mappable_end)
+		if (obj->base.size > dev_priv->ggtt.mappable_size)
 			return ERR_PTR(-E2BIG);
 
 		/* If NONBLOCK is set the caller is optimistically

@@ -4177,7 +4177,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
 		 * we could try to minimise harm to others.
 		 */
 		if (flags & PIN_NONBLOCK &&
-		    obj->base.size > dev_priv->ggtt.mappable_end / 2)
+		    obj->base.size > dev_priv->ggtt.mappable_size / 2)
 			return ERR_PTR(-ENOSPC);
 	}
 

@@ -4191,7 +4191,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
 				return ERR_PTR(-ENOSPC);
 
 			if (flags & PIN_MAPPABLE &&
-			    vma->fence_size > dev_priv->ggtt.mappable_end / 2)
+			    vma->fence_size > dev_priv->ggtt.mappable_size / 2)
 				return ERR_PTR(-ENOSPC);
 		}
drivers/gpu/drm/i915/i915_gem_execbuffer.c +1 -1
index 14d9e61a1e06..8224abbb0f2d 100644
@@ -986,7 +986,7 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
 			err = drm_mm_insert_node_in_range
 				(&ggtt->base.mm, &cache->node,
 				 PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
-				 0, ggtt->mappable_end,
+				 0, ggtt->mappable_size,
 				 DRM_MM_INSERT_LOW);
 			if (err) /* no inactive aperture space, use cpu reloc */
 				return NULL;
drivers/gpu/drm/i915/i915_gem_gtt.c +15 -15
index 6b567bab2363..94faeaebf0d0 100644
@@ -2001,7 +2001,7 @@ static int gen6_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt)
 	if (ret)
 		goto err_out;
 
-	if (ppgtt->node.start < ggtt->mappable_end)
+	if (ppgtt->node.start < ggtt->mappable_size)
 		DRM_DEBUG("Forced to use aperture for PDEs\n");
 
 	ppgtt->pd.base.ggtt_offset =

@@ -2840,7 +2840,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
 	/* Reserve a mappable slot for our lockless error capture */
 	ret = drm_mm_insert_node_in_range(&ggtt->base.mm, &ggtt->error_capture,
 					  PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
-					  0, ggtt->mappable_end,
+					  0, ggtt->mappable_size,
 					  DRM_MM_INSERT_LOW);
 	if (ret)
 		return ret;

@@ -3289,7 +3289,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
 
 	/* TODO: We're not aware of mappable constraints on gen8 yet */
 	ggtt->mappable_base = pci_resource_start(pdev, 2);
-	ggtt->mappable_end = pci_resource_len(pdev, 2);
+	ggtt->mappable_size = pci_resource_len(pdev, 2);
 
 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));
 	if (!err)

@@ -3346,13 +3346,13 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
 	int err;
 
 	ggtt->mappable_base = pci_resource_start(pdev, 2);
-	ggtt->mappable_end = pci_resource_len(pdev, 2);
+	ggtt->mappable_size = pci_resource_len(pdev, 2);
 
 	/* 64/512MB is the current min/max we actually know of, but this is just
 	 * a coarse sanity check.
 	 */
-	if (ggtt->mappable_end < (64<<20) || ggtt->mappable_end > (512<<20)) {
-		DRM_ERROR("Unknown GMADR size (%llx)\n", ggtt->mappable_end);
+	if (ggtt->mappable_size < (64<<20) || ggtt->mappable_size > (512<<20)) {
+		DRM_ERROR("Unknown GMADR size (%llx)\n", ggtt->mappable_size);
 		return -ENXIO;
 	}
 

@@ -3412,7 +3412,7 @@ static int i915_gmch_probe(struct i915_ggtt *ggtt)
 	intel_gtt_get(&ggtt->base.total,
 		      &ggtt->stolen_size,
 		      &ggtt->mappable_base,
-		      &ggtt->mappable_end);
+		      &ggtt->mappable_size);
 
 	ggtt->do_idle_maps = needs_idle_maps(dev_priv);
 	ggtt->base.insert_page = i915_ggtt_insert_page;

@@ -3460,7 +3460,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 	 */
 	if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading) {
 		ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
-		ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
+		ggtt->mappable_size = min(ggtt->mappable_size, ggtt->base.total);
 	}
 
 	if ((ggtt->base.total - 1) >> 32) {

@@ -3468,20 +3468,20 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 			  " of address space! Found %lldM!\n",
 			  ggtt->base.total >> 20);
 		ggtt->base.total = 1ULL << 32;
-		ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
+		ggtt->mappable_size = min(ggtt->mappable_size, ggtt->base.total);
 	}
 
-	if (ggtt->mappable_end > ggtt->base.total) {
+	if (ggtt->mappable_size > ggtt->base.total) {
 		DRM_ERROR("mappable aperture extends past end of GGTT,"
 			  " aperture=%llx, total=%llx\n",
-			  ggtt->mappable_end, ggtt->base.total);
-		ggtt->mappable_end = ggtt->base.total;
+			  ggtt->mappable_size, ggtt->base.total);
+		ggtt->mappable_size = ggtt->base.total;
 	}
 
 	/* GMADR is the PCI mmio aperture into the global GTT. */
 	DRM_INFO("Memory usable by graphics device = %lluM\n",
 		 ggtt->base.total >> 20);
-	DRM_DEBUG_DRIVER("GMADR size = %lldM\n", ggtt->mappable_end >> 20);
+	DRM_DEBUG_DRIVER("GMADR size = %lldM\n", ggtt->mappable_size >> 20);
 	DRM_DEBUG_DRIVER("GTT stolen size = %uM\n", ggtt->stolen_size >> 20);
 	if (intel_vtd_active())
 		DRM_INFO("VT-d active for gfx access\n");

@@ -3513,12 +3513,12 @@ int i915_ggtt_init_hw(struct drm_i915_private *dev_priv)
 
 	if (!io_mapping_init_wc(&dev_priv->ggtt.mappable,
 				dev_priv->ggtt.mappable_base,
-				dev_priv->ggtt.mappable_end)) {
+				dev_priv->ggtt.mappable_size)) {
 		ret = -EIO;
 		goto out_gtt_cleanup;
 	}
 
-	ggtt->mtrr = arch_phys_wc_add(ggtt->mappable_base, ggtt->mappable_end);
+	ggtt->mtrr = arch_phys_wc_add(ggtt->mappable_base, ggtt->mappable_size);
 
 	/*
 	 * Initialise stolen early so that we may reserve preallocated
drivers/gpu/drm/i915/i915_gem_gtt.h +1 -1
index 93211a96fdad..922d796983d5 100644
@@ -371,7 +371,7 @@ struct i915_ggtt {
 	struct io_mapping mappable;	/* Mapping to our CPU mappable region */
 
 	phys_addr_t mappable_base;	/* PA of our GMADR */
-	u64 mappable_end;		/* End offset that we can CPU map */
+	u64 mappable_size;		/* Total mappable size that we can CPU map */
 
 	/* Stolen memory is segmented in hardware with different portions
 	 * offlimits to certain functions.
drivers/gpu/drm/i915/i915_vgpu.c +6 -6
index 5fe9f3f39467..d1add5c4e312 100644
@@ -220,17 +220,17 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv)
 	DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n",
 		 unmappable_base, unmappable_size / 1024);
 
-	if (mappable_end > ggtt->mappable_end ||
-	    unmappable_base < ggtt->mappable_end ||
+	if (mappable_end > ggtt->mappable_size ||
+	    unmappable_base < ggtt->mappable_size ||
 	    unmappable_end > ggtt_end) {
 		DRM_ERROR("Invalid ballooning configuration!\n");
 		return -EINVAL;
 	}
 
 	/* Unmappable graphic memory ballooning */
-	if (unmappable_base > ggtt->mappable_end) {
+	if (unmappable_base > ggtt->mappable_size) {
 		ret = vgt_balloon_space(ggtt, &bl_info.space[2],
-					ggtt->mappable_end, unmappable_base);
+					ggtt->mappable_size, unmappable_base);
 
 		if (ret)
 			goto err;

@@ -252,9 +252,9 @@ int intel_vgt_balloon(struct drm_i915_private *dev_priv)
 			goto err_upon_unmappable;
 	}
 
-	if (mappable_end < ggtt->mappable_end) {
+	if (mappable_end < ggtt->mappable_size) {
 		ret = vgt_balloon_space(ggtt, &bl_info.space[1],
-					mappable_end, ggtt->mappable_end);
+					mappable_end, ggtt->mappable_size);
 
 		if (ret)
 			goto err_below_mappable;
drivers/gpu/drm/i915/i915_vma.c +2 -2
index bf6d8d1eaabe..a9413b601230 100644
@@ -401,7 +401,7 @@ void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
 	fenceable = (vma->node.size >= vma->fence_size &&
 		     IS_ALIGNED(vma->node.start, vma->fence_alignment));
 
-	mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end;
+	mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_size;
 
 	if (mappable && fenceable)
 		vma->flags |= I915_VMA_CAN_FENCE;

@@ -486,7 +486,7 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
 
 	end = vma->vm->total;
 	if (flags & PIN_MAPPABLE)
-		end = min_t(u64, end, dev_priv->ggtt.mappable_end);
+		end = min_t(u64, end, dev_priv->ggtt.mappable_size);
 	if (flags & PIN_ZONE_4G)
 		end = min_t(u64, end, (1ULL << 32) - I915_GTT_PAGE_SIZE);
 	GEM_BUG_ON(!IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
drivers/gpu/drm/i915/intel_fbdev.c +1 -1
index b8af35187d22..e56262d1bc87 100644
@@ -237,7 +237,7 @@ static int intelfb_create(struct drm_fb_helper *helper,
 
 	/* setup aperture base/size for vesafb takeover */
 	info->apertures->ranges[0].base = dev->mode_config.fb_base;
-	info->apertures->ranges[0].size = ggtt->mappable_end;
+	info->apertures->ranges[0].size = ggtt->mappable_size;
 
 	info->fix.smem_start = dev->mode_config.fb_base + i915_ggtt_offset(vma);
 	info->fix.smem_len = vma->node.size;
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +1 -1
index 6491cf0a4f46..e97ae4b4a684 100644
@@ -1054,7 +1054,7 @@ static int igt_ggtt_page(void *arg)
 	err = drm_mm_insert_node_in_range(&ggtt->base.mm, &tmp,
 					  1024 * PAGE_SIZE, 0,
 					  I915_COLOR_UNEVICTABLE,
-					  0, ggtt->mappable_end,
+					  0, ggtt->mappable_size,
 					  DRM_MM_INSERT_LOW);
 	if (err)
 		goto out_unpin;
drivers/gpu/drm/i915/selftests/i915_vma.c +11 -11
index eb89e301b602..f2e15bc1b82a 100644
@@ -257,30 +257,30 @@ static int igt_vma_pin1(void *arg)
 
 		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | 4096),
 		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | 8192),
-		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
-		VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
+		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_size - 4096)),
+		VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_size - 4096)),
 		VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.base.total - 4096)),
 
-		VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_end - 4096)),
-		INVALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | i915->ggtt.mappable_end),
+		VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_size - 4096)),
+		INVALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | i915->ggtt.mappable_size),
 		VALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.base.total - 4096)),
 		INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | i915->ggtt.base.total),
 		INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | round_down(U64_MAX, PAGE_SIZE)),
 
 		VALID(4096, PIN_GLOBAL),
 		VALID(8192, PIN_GLOBAL),
-		VALID(i915->ggtt.mappable_end - 4096, PIN_GLOBAL | PIN_MAPPABLE),
-		VALID(i915->ggtt.mappable_end, PIN_GLOBAL | PIN_MAPPABLE),
-		NOSPACE(i915->ggtt.mappable_end + 4096, PIN_GLOBAL | PIN_MAPPABLE),
+		VALID(i915->ggtt.mappable_size - 4096, PIN_GLOBAL | PIN_MAPPABLE),
+		VALID(i915->ggtt.mappable_size, PIN_GLOBAL | PIN_MAPPABLE),
+		NOSPACE(i915->ggtt.mappable_size + 4096, PIN_GLOBAL | PIN_MAPPABLE),
 		VALID(i915->ggtt.base.total - 4096, PIN_GLOBAL),
 		VALID(i915->ggtt.base.total, PIN_GLOBAL),
 		NOSPACE(i915->ggtt.base.total + 4096, PIN_GLOBAL),
 		NOSPACE(round_down(U64_MAX, PAGE_SIZE), PIN_GLOBAL),
-		INVALID(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_end - 4096)),
+		INVALID(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_size - 4096)),
 		INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.base.total - 4096)),
 		INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (round_down(U64_MAX, PAGE_SIZE) - 4096)),
 
-		VALID(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
+		VALID(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_size - 4096)),
 
 #if !IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
 		/* Misusing BIAS is a programming error (it is not controllable

@@ -288,9 +288,9 @@ static int igt_vma_pin1(void *arg)
 		 * However, the tests are still quite interesting for checking
 		 * variable start, end and size.
 		 */
-		NOSPACE(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | i915->ggtt.mappable_end),
+		NOSPACE(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | i915->ggtt.mappable_size),
 		NOSPACE(0, PIN_GLOBAL | PIN_OFFSET_BIAS | i915->ggtt.base.total),
-		NOSPACE(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
+		NOSPACE(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_size - 4096)),
 		NOSPACE(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.base.total - 4096)),
 #endif
 		{ },
drivers/gpu/drm/i915/selftests/mock_gtt.c +1 -1
index 336e1afb250f..d3155f36de89 100644
@@ -111,7 +111,7 @@ void mock_init_ggtt(struct drm_i915_private *i915)
 	ggtt->base.i915 = i915;
 
 	ggtt->mappable_base = 0;
-	ggtt->mappable_end = 2048 * PAGE_SIZE;
+	ggtt->mappable_size = 2048 * PAGE_SIZE;
 	ggtt->base.total = 4096 * PAGE_SIZE;
 
 	ggtt->base.clear_range = nop_clear_range;
include/drm/intel-gtt.h +1 -1
index c5db7975c640..e901de0b6dd8 100644
@@ -7,7 +7,7 @@
 void intel_gtt_get(u64 *gtt_total,
 		   u32 *stolen_size,
 		   phys_addr_t *mappable_base,
-		   u64 *mappable_end);
+		   u64 *mappable_size);
 
 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
 		     struct agp_bridge_data *bridge);
Signature · 6 lines
2.14.3

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
author
#6 lore raw

PATCH 5/8 drm/i915: make dsm struct resource centric

In reply to Matthew Auld

v2: check range_overflow when writing to 32b registers (Chris)
pepper in some comments (Chris)

Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/gpu/drm/i915/i915_drv.h        | 13 ++++++++++---
 drivers/gpu/drm/i915/i915_gem_stolen.c | 19 +++++++++++--------
 drivers/gpu/drm/i915/intel_fbc.c       | 10 ++++++++--
 drivers/gpu/drm/i915/intel_pm.c        | 17 +++++++++++++----
 4 files changed, 42 insertions(+), 17 deletions(-)
drivers/gpu/drm/i915/i915_drv.h +10 -3
index d575a56fc100..313ab1e98fc7 100644
@@ -1536,9 +1536,6 @@ struct i915_gem_mm {
 	 */
 	struct pagevec wc_stash;
 
-	/** Usable portion of the GTT for GEM */
-	dma_addr_t stolen_base; /* limited to low memory (32-bit) */
-
 	/**
 	 * tmpfs instance used for shmem backed objects
 	 */

@@ -2252,6 +2249,16 @@ struct drm_i915_private {
 
 	const struct intel_device_info info;
 
+	/**
+	 * Data Stolen Memory - aka "i915 stolen memory" gives us the start and
+	 * end of stolen which we can optionally use to create GEM objects
+	 * backed by stolen memory. Note that ggtt->stolen_usable_size tells us
+	 * exactly how much of this we are actually allowed to use, given that
+	 * some portion of it is in fact reserved for use by hardware functions,
+	 * while ggtt->stolen_size gives us the total size of the stolen region.
+	 */
+	struct resource dsm;
+
 	void __iomem *regs;
 
 	struct intel_uncore uncore;
drivers/gpu/drm/i915/i915_gem_stolen.c +11 -8
index f1b8eeda0058..36c8ec04fd7a 100644
@@ -185,7 +185,7 @@ static void g4x_get_stolen_reserved(struct drm_i915_private *dev_priv,
 	uint32_t reg_val = I915_READ(IS_GM45(dev_priv) ?
 				     CTG_STOLEN_RESERVED :
 				     ELK_STOLEN_RESERVED);
-	dma_addr_t stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
+	dma_addr_t stolen_top = dev_priv->dsm.start + ggtt->stolen_size;
 
 	if ((reg_val & G4X_STOLEN_RESERVED_ENABLE) == 0) {
 		*base = 0;

@@ -316,7 +316,7 @@ static void bdw_get_stolen_reserved(struct drm_i915_private *dev_priv,
 		return;
 	}
 
-	stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
+	stolen_top = dev_priv->dsm.start + ggtt->stolen_size;
 
 	*base = reg_val & GEN6_STOLEN_RESERVED_ADDR_MASK;
 

@@ -352,11 +352,14 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 	if (ggtt->stolen_size == 0)
 		return 0;
 
-	dev_priv->mm.stolen_base = i915_stolen_to_dma(dev_priv);
-	if (dev_priv->mm.stolen_base == 0)
+	dev_priv->dsm.start = i915_stolen_to_dma(dev_priv);
+	if (dev_priv->dsm.start == 0)
 		return 0;
 
-	stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
+	dev_priv->dsm.end = dev_priv->dsm.start + ggtt->stolen_size - 1;
+	dev_priv->dsm.flags = IORESOURCE_MEM;
+
+	stolen_top = dev_priv->dsm.end + 1;
 	reserved_base = 0;
 	reserved_size = 0;
 

@@ -397,12 +400,12 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 		reserved_base = stolen_top;
 	}
 
-	if (reserved_base < dev_priv->mm.stolen_base ||
+	if (reserved_base < dev_priv->dsm.start ||
 	    reserved_base + reserved_size > stolen_top) {
 		dma_addr_t reserved_top = reserved_base + reserved_size;
 		DRM_ERROR("Stolen reserved area [%pad - %pad] outside stolen memory [%pad - %pad]\n",
 			  &reserved_base, &reserved_top,
-			  &dev_priv->mm.stolen_base, &stolen_top);
+			  &dev_priv->dsm.start, &stolen_top);
 		return 0;
 	}
 

@@ -460,7 +463,7 @@ i915_pages_create_for_stolen(struct drm_device *dev,
 	sg->offset = 0;
 	sg->length = size;
 
-	sg_dma_address(sg) = (dma_addr_t)dev_priv->mm.stolen_base + offset;
+	sg_dma_address(sg) = (dma_addr_t)dev_priv->dsm.start + offset;
 	sg_dma_len(sg) = size;
 
 	return st;
drivers/gpu/drm/i915/intel_fbc.c +8 -2
index 4aefc658a5cf..a291bb965e2e 100644
@@ -615,10 +615,16 @@ static int intel_fbc_alloc_cfb(struct intel_crtc *crtc)
 
 		fbc->compressed_llb = compressed_llb;
 
+		GEM_BUG_ON(range_overflows_t(u64, dev_priv->dsm.start,
+					     fbc->compressed_fb.start,
+					     U32_MAX));
+		GEM_BUG_ON(range_overflows_t(u64, dev_priv->dsm.start,
+					     fbc->compressed_llb->start,
+					     U32_MAX));
 		I915_WRITE(FBC_CFB_BASE,
-			   dev_priv->mm.stolen_base + fbc->compressed_fb.start);
+			   dev_priv->dsm.start + fbc->compressed_fb.start);
 		I915_WRITE(FBC_LL_BASE,
-			   dev_priv->mm.stolen_base + compressed_llb->start);
+			   dev_priv->dsm.start + compressed_llb->start);
 	}
 
 	DRM_DEBUG_KMS("reserved %llu bytes of contiguous stolen space for FBC, threshold: %d\n",
drivers/gpu/drm/i915/intel_pm.c +13 -4
index 03d67d8ab647..872d15f599d1 100644
@@ -7070,7 +7070,7 @@ static void valleyview_check_pctx(struct drm_i915_private *dev_priv)
 {
 	unsigned long pctx_addr = I915_READ(VLV_PCBR) & ~4095;
 
-	WARN_ON(pctx_addr != dev_priv->mm.stolen_base +
+	WARN_ON(pctx_addr != dev_priv->dsm.start +
 			     dev_priv->vlv_pctx->stolen->start);
 }
 

@@ -7093,7 +7093,12 @@ static void cherryview_setup_pctx(struct drm_i915_private *dev_priv)
 	pcbr = I915_READ(VLV_PCBR);
 	if ((pcbr >> VLV_PCBR_ADDR_SHIFT) == 0) {
 		DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");
-		paddr = (dev_priv->mm.stolen_base +
+
+		GEM_BUG_ON(range_overflows_t(resource_size_t,
+					     dev_priv->dsm.start,
+					     (ggtt->stolen_size - pctx_size),
+					     U32_MAX));
+		paddr = (dev_priv->dsm.start +
 			 (ggtt->stolen_size - pctx_size));
 
 		pctx_paddr = (paddr & (~4095));

@@ -7115,7 +7120,7 @@ static void valleyview_setup_pctx(struct drm_i915_private *dev_priv)
 		/* BIOS set it up already, grab the pre-alloc'd space */
 		int pcbr_offset;
 
-		pcbr_offset = (pcbr & (~4095)) - dev_priv->mm.stolen_base;
+		pcbr_offset = (pcbr & (~4095)) - dev_priv->dsm.start;
 		pctx = i915_gem_object_create_stolen_for_preallocated(dev_priv,
 								      pcbr_offset,
 								      I915_GTT_OFFSET_NONE,

@@ -7139,7 +7144,11 @@ static void valleyview_setup_pctx(struct drm_i915_private *dev_priv)
 		goto out;
 	}
 
-	pctx_paddr = dev_priv->mm.stolen_base + pctx->stolen->start;
+	GEM_BUG_ON(range_overflows_t(u64,
+				     dev_priv->dsm.start,
+				     pctx->stolen->start,
+				     U32_MAX));
+	pctx_paddr = dev_priv->dsm.start + pctx->stolen->start;
 	I915_WRITE(VLV_PCBR, pctx_paddr);
 
 out:
Signature · 6 lines
2.14.3

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
author
#7 lore raw

PATCH 6/8 drm/i915: make reserved struct resource centric

In reply to Matthew Auld

v2: s/<= end + 1/< end/ (Chris)

Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/gpu/drm/i915/i915_drv.h        |  4 ++++
 drivers/gpu/drm/i915/i915_gem_gtt.h    |  2 --
 drivers/gpu/drm/i915/i915_gem_stolen.c | 16 ++++++++--------
 drivers/gpu/drm/i915/intel_pm.c        |  6 ++----
 4 files changed, 14 insertions(+), 14 deletions(-)
drivers/gpu/drm/i915/i915_drv.h +4 -0
index 313ab1e98fc7..e30a8a7812ba 100644
@@ -2258,6 +2258,10 @@ struct drm_i915_private {
 	 * while ggtt->stolen_size gives us the total size of the stolen region.
 	 */
 	struct resource dsm;
+	/**
+	 * Reseved portion of Data Stolen Memory
+	 */
+	struct resource dsm_reserved;
 
 	void __iomem *regs;
drivers/gpu/drm/i915/i915_gem_gtt.h +0 -2
index 922d796983d5..6eb34fd2c4ba 100644
@@ -383,8 +383,6 @@ struct i915_ggtt {
 	 */
 	u32 stolen_size;		/* Total size of stolen memory */
 	u32 stolen_usable_size;	/* Total size minus reserved ranges */
-	u32 stolen_reserved_base;
-	u32 stolen_reserved_size;
 
 	/** "Graphics Stolen Memory" holds the global PTEs */
 	void __iomem *gsm;
drivers/gpu/drm/i915/i915_gem_stolen.c +8 -8
index 36c8ec04fd7a..2b7af60dfce0 100644
@@ -333,6 +333,7 @@ static void bdw_get_stolen_reserved(struct drm_i915_private *dev_priv,
 int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 {
 	struct i915_ggtt *ggtt = &dev_priv->ggtt;
+	struct resource reserved = DEFINE_RES_MEM(0, 0);
 	dma_addr_t reserved_base, stolen_top;
 	u32 reserved_total, reserved_size;
 	u32 stolen_usable_start;

@@ -400,17 +401,16 @@ int i915_gem_init_stolen(struct drm_i915_private *dev_priv)
 		reserved_base = stolen_top;
 	}
 
-	if (reserved_base < dev_priv->dsm.start ||
-	    reserved_base + reserved_size > stolen_top) {
-		dma_addr_t reserved_top = reserved_base + reserved_size;
-		DRM_ERROR("Stolen reserved area [%pad - %pad] outside stolen memory [%pad - %pad]\n",
-			  &reserved_base, &reserved_top,
-			  &dev_priv->dsm.start, &stolen_top);
+	reserved.start = reserved_base;
+	reserved.end = reserved_base + reserved_size - 1;
+
+	if (!resource_contains(&dev_priv->dsm, &reserved)) {
+		DRM_ERROR("Stolen reserved area %pR outside stolen memory %pR\n",
+			  &reserved, &dev_priv->dsm);
 		return 0;
 	}
 
-	ggtt->stolen_reserved_base = reserved_base;
-	ggtt->stolen_reserved_size = reserved_size;
+	dev_priv->dsm_reserved = reserved;
 
 	/* It is possible for the reserved area to end before the end of stolen
 	 * memory, so just consider the start. */
drivers/gpu/drm/i915/intel_pm.c +2 -4
index 872d15f599d1..a07b7b456b50 100644
@@ -6439,7 +6439,6 @@ static void intel_print_rc6_info(struct drm_i915_private *dev_priv, u32 mode)
 
 static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
 {
-	struct i915_ggtt *ggtt = &dev_priv->ggtt;
 	bool enable_rc6 = true;
 	unsigned long rc6_ctx_base;
 	u32 rc_ctl;

@@ -6464,9 +6463,8 @@ static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
 	 * for this check.
 	 */
 	rc6_ctx_base = I915_READ(RC6_CTX_BASE) & RC6_CTX_BASE_MASK;
-	if (!((rc6_ctx_base >= ggtt->stolen_reserved_base) &&
-	      (rc6_ctx_base + PAGE_SIZE <= ggtt->stolen_reserved_base +
-					ggtt->stolen_reserved_size))) {
+	if (!((rc6_ctx_base >= dev_priv->dsm_reserved.start) &&
+	      (rc6_ctx_base + PAGE_SIZE < dev_priv->dsm_reserved.end))) {
 		DRM_DEBUG_DRIVER("RC6 Base address not as expected.\n");
 		enable_rc6 = false;
 	}
Signature · 6 lines
2.14.3

_______________________________________________
Intel-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
author
#8 lore raw

PATCH 7/8 drm/i915: make mappable struct resource centric

In reply to Matthew Auld
Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/gpu/drm/i915/gvt/gvt.h                |  2 +-
 drivers/gpu/drm/i915/i915_drv.c               |  2 +-
 drivers/gpu/drm/i915/i915_gem.c               |  8 ++++----
 drivers/gpu/drm/i915/i915_gem_execbuffer.c    |  2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c           | 28 ++++++++++++++++-----------
 drivers/gpu/drm/i915/i915_gem_gtt.h           |  4 ++--
 drivers/gpu/drm/i915/i915_gpu_error.c         |  2 +-
 drivers/gpu/drm/i915/i915_vma.c               |  2 +-
 drivers/gpu/drm/i915/intel_display.c          |  2 +-
 drivers/gpu/drm/i915/intel_overlay.c          |  4 ++--
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  4 ++--
 drivers/gpu/drm/i915/selftests/mock_gtt.c     |  3 ++-
 12 files changed, 35 insertions(+), 28 deletions(-)
drivers/gpu/drm/i915/gvt/gvt.h +1 -1
index 028d00e61bad..601e5fee8957 100644
@@ -336,7 +336,7 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt);
 
 /* Aperture/GM space definitions for GVT device */
 #define gvt_aperture_sz(gvt)	  (gvt->dev_priv->ggtt.mappable_size)
-#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable_base)
+#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable.start)
 
 #define gvt_ggtt_gm_sz(gvt)	  (gvt->dev_priv->ggtt.base.total)
 #define gvt_ggtt_sz(gvt) \
drivers/gpu/drm/i915/i915_drv.c +1 -1
index e1bb0c8822aa..be29895a56f6 100644
@@ -728,7 +728,7 @@ static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv)
 	if (!ap)
 		return -ENOMEM;
 
-	ap->ranges[0].base = ggtt->mappable_base;
+	ap->ranges[0].base = ggtt->mappable.start;
 	ap->ranges[0].size = ggtt->mappable_size;
 
 	primary =
drivers/gpu/drm/i915/i915_gem.c +4 -4
index 05cc4f2df1bf..48c5a005a4b6 100644
@@ -1106,7 +1106,7 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
 			page_base += offset & PAGE_MASK;
 		}
 
-		if (gtt_user_read(&ggtt->mappable, page_base, page_offset,
+		if (gtt_user_read(&ggtt->mappable_io, page_base, page_offset,
 				  user_data, page_length)) {
 			ret = -EFAULT;
 			break;

@@ -1314,7 +1314,7 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
 		 * If the object is non-shmem backed, we retry again with the
 		 * path that handles page fault.
 		 */
-		if (ggtt_write(&ggtt->mappable, page_base, page_offset,
+		if (ggtt_write(&ggtt->mappable_io, page_base, page_offset,
 			       user_data, page_length)) {
 			ret = -EFAULT;
 			break;

@@ -1960,9 +1960,9 @@ int i915_gem_fault(struct vm_fault *vmf)
 	/* Finally, remap it using the new GTT offset */
 	ret = remap_io_mapping(area,
 			       area->vm_start + (vma->ggtt_view.partial.offset << PAGE_SHIFT),
-			       (ggtt->mappable_base + vma->node.start) >> PAGE_SHIFT,
+			       (ggtt->mappable.start + vma->node.start) >> PAGE_SHIFT,
 			       min_t(u64, vma->size, area->vm_end - area->vm_start),
-			       &ggtt->mappable);
+			       &ggtt->mappable_io);
 	if (ret)
 		goto err_fence;
drivers/gpu/drm/i915/i915_gem_execbuffer.c +1 -1
index 8224abbb0f2d..da4db769e1e2 100644
@@ -1012,7 +1012,7 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
 		offset += page << PAGE_SHIFT;
 	}
 
-	vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->mappable,
+	vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->mappable_io,
 							 offset);
 	cache->page = page;
 	cache->vaddr = (unsigned long)vaddr;
drivers/gpu/drm/i915/i915_gem_gtt.c +17 -11
index 94faeaebf0d0..35d91cf07123 100644
@@ -2912,7 +2912,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
 	mutex_unlock(&dev_priv->drm.struct_mutex);
 
 	arch_phys_wc_del(ggtt->mtrr);
-	io_mapping_fini(&ggtt->mappable);
+	io_mapping_fini(&ggtt->mappable_io);
 }
 
 static unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)

@@ -3288,8 +3288,9 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
 	int err;
 
 	/* TODO: We're not aware of mappable constraints on gen8 yet */
-	ggtt->mappable_base = pci_resource_start(pdev, 2);
-	ggtt->mappable_size = pci_resource_len(pdev, 2);
+	ggtt->mappable.start = pci_resource_start(pdev, 2);
+	ggtt->mappable.end = ggtt->mappable.start + pci_resource_len(pdev, 2) - 1;
+	ggtt->mappable_size = resource_size(&ggtt->mappable);
 
 	err = pci_set_dma_mask(pdev, DMA_BIT_MASK(39));
 	if (!err)

@@ -3345,8 +3346,9 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
 	u16 snb_gmch_ctl;
 	int err;
 
-	ggtt->mappable_base = pci_resource_start(pdev, 2);
-	ggtt->mappable_size = pci_resource_len(pdev, 2);
+	ggtt->mappable.start = pci_resource_start(pdev, 2);
+	ggtt->mappable.end = ggtt->mappable.start + pci_resource_len(pdev, 2) - 1;
+	ggtt->mappable_size = resource_size(&ggtt->mappable);
 
 	/* 64/512MB is the current min/max we actually know of, but this is just
 	 * a coarse sanity check.

@@ -3401,6 +3403,7 @@ static void i915_gmch_remove(struct i915_address_space *vm)
 static int i915_gmch_probe(struct i915_ggtt *ggtt)
 {
 	struct drm_i915_private *dev_priv = ggtt->base.i915;
+	phys_addr_t mappable_base;
 	int ret;
 
 	ret = intel_gmch_probe(dev_priv->bridge_dev, dev_priv->drm.pdev, NULL);

@@ -3411,9 +3414,12 @@ static int i915_gmch_probe(struct i915_ggtt *ggtt)
 
 	intel_gtt_get(&ggtt->base.total,
 		      &ggtt->stolen_size,
-		      &ggtt->mappable_base,
+		      &mappable_base,
 		      &ggtt->mappable_size);
 
+	ggtt->mappable.start = mappable_base;
+	ggtt->mappable.end = ggtt->mappable.start + ggtt->mappable_size - 1;
+
 	ggtt->do_idle_maps = needs_idle_maps(dev_priv);
 	ggtt->base.insert_page = i915_ggtt_insert_page;
 	ggtt->base.insert_entries = i915_ggtt_insert_entries;

@@ -3481,8 +3487,8 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 	/* GMADR is the PCI mmio aperture into the global GTT. */
 	DRM_INFO("Memory usable by graphics device = %lluM\n",
 		 ggtt->base.total >> 20);
-	DRM_DEBUG_DRIVER("GMADR size = %lldM\n", ggtt->mappable_size >> 20);
-	DRM_DEBUG_DRIVER("GTT stolen size = %uM\n", ggtt->stolen_size >> 20);
+	DRM_DEBUG_DRIVER("GMADR size = %lluM\n", (u64)ggtt->mappable_size >> 20);
+	DRM_DEBUG_DRIVER("GTT stolen size = %lluM\n", (u64)ggtt->stolen_size >> 20);
 	if (intel_vtd_active())
 		DRM_INFO("VT-d active for gfx access\n");
 

@@ -3511,14 +3517,14 @@ int i915_ggtt_init_hw(struct drm_i915_private *dev_priv)
 		ggtt->base.mm.color_adjust = i915_gtt_color_adjust;
 	mutex_unlock(&dev_priv->drm.struct_mutex);
 
-	if (!io_mapping_init_wc(&dev_priv->ggtt.mappable,
-				dev_priv->ggtt.mappable_base,
+	if (!io_mapping_init_wc(&dev_priv->ggtt.mappable_io,
+				dev_priv->ggtt.mappable.start,
 				dev_priv->ggtt.mappable_size)) {
 		ret = -EIO;
 		goto out_gtt_cleanup;
 	}
 
-	ggtt->mtrr = arch_phys_wc_add(ggtt->mappable_base, ggtt->mappable_size);
+	ggtt->mtrr = arch_phys_wc_add(ggtt->mappable.start, ggtt->mappable_size);
 
 	/*
 	 * Initialise stolen early so that we may reserve preallocated
drivers/gpu/drm/i915/i915_gem_gtt.h +2 -2
index 6eb34fd2c4ba..a91281a55b91 100644
@@ -368,9 +368,9 @@ i915_vm_has_scratch_64K(struct i915_address_space *vm)
  */
 struct i915_ggtt {
 	struct i915_address_space base;
-	struct io_mapping mappable;	/* Mapping to our CPU mappable region */
 
-	phys_addr_t mappable_base;	/* PA of our GMADR */
+	struct io_mapping mappable_io;	/* Mapping to our CPU mappable region */
+	struct resource mappable;       /* GMADR resource */
 	u64 mappable_size;		/* Total mappable size that we can CPU map */
 
 	/* Stolen memory is segmented in hardware with different portions
drivers/gpu/drm/i915/i915_gpu_error.c +1 -1
index 3d18d67d065f..95e76786f4d8 100644
@@ -953,7 +953,7 @@ i915_error_object_create(struct drm_i915_private *i915,
 		ggtt->base.insert_page(&ggtt->base, dma, slot,
 				       I915_CACHE_NONE, 0);
 
-		s = io_mapping_map_atomic_wc(&ggtt->mappable, slot);
+		s = io_mapping_map_atomic_wc(&ggtt->mappable_io, slot);
 		ret = compress_page(&compress, (void  __force *)s, dst);
 		io_mapping_unmap_atomic(s);
drivers/gpu/drm/i915/i915_vma.c +1 -1
index a9413b601230..e4f080ebdebb 100644
@@ -305,7 +305,7 @@ void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
 
 	ptr = vma->iomap;
 	if (ptr == NULL) {
-		ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->mappable,
+		ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->mappable_io,
 					vma->node.start,
 					vma->node.size);
 		if (ptr == NULL) {
drivers/gpu/drm/i915/intel_display.c +1 -1
index d67c7c498b34..1d231c5f9ee9 100644
@@ -14592,7 +14592,7 @@ int intel_modeset_init(struct drm_device *dev)
 		dev->mode_config.cursor_height = MAX_CURSOR_HEIGHT;
 	}
 
-	dev->mode_config.fb_base = ggtt->mappable_base;
+	dev->mode_config.fb_base = ggtt->mappable.start;
 
 	DRM_DEBUG_KMS("%d display pipe%s available.\n",
 		      INTEL_INFO(dev_priv)->num_pipes,
drivers/gpu/drm/i915/intel_overlay.c +2 -2
index 1b397b41cb4f..d3d3aa147695 100644
@@ -219,7 +219,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)
 	if (OVERLAY_NEEDS_PHYSICAL(dev_priv))
 		regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr;
 	else
-		regs = io_mapping_map_wc(&dev_priv->ggtt.mappable,
+		regs = io_mapping_map_wc(&dev_priv->ggtt.mappable_io,
 					 overlay->flip_addr,
 					 PAGE_SIZE);
 

@@ -1508,7 +1508,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
 		regs = (struct overlay_registers __iomem *)
 			overlay->reg_bo->phys_handle->vaddr;
 	else
-		regs = io_mapping_map_atomic_wc(&dev_priv->ggtt.mappable,
+		regs = io_mapping_map_atomic_wc(&dev_priv->ggtt.mappable_io,
 						overlay->flip_addr);
 
 	return regs;
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +2 -2
index e97ae4b4a684..82f8e745842b 100644
@@ -1074,7 +1074,7 @@ static int igt_ggtt_page(void *arg)
 				       i915_gem_object_get_dma_address(obj, 0),
 				       offset, I915_CACHE_NONE, 0);
 
-		vaddr = io_mapping_map_atomic_wc(&ggtt->mappable, offset);
+		vaddr = io_mapping_map_atomic_wc(&ggtt->mappable_io, offset);
 		iowrite32(n, vaddr + n);
 		io_mapping_unmap_atomic(vaddr);
 

@@ -1092,7 +1092,7 @@ static int igt_ggtt_page(void *arg)
 				       i915_gem_object_get_dma_address(obj, 0),
 				       offset, I915_CACHE_NONE, 0);
 
-		vaddr = io_mapping_map_atomic_wc(&ggtt->mappable, offset);
+		vaddr = io_mapping_map_atomic_wc(&ggtt->mappable_io, offset);
 		val = ioread32(vaddr + n);
 		io_mapping_unmap_atomic(vaddr);
drivers/gpu/drm/i915/selftests/mock_gtt.c +2 -1
index d3155f36de89..61e50eea38f4 100644
@@ -110,8 +110,9 @@ void mock_init_ggtt(struct drm_i915_private *i915)
 
 	ggtt->base.i915 = i915;
 
-	ggtt->mappable_base = 0;
+	ggtt->mappable.start = 0;
 	ggtt->mappable_size = 2048 * PAGE_SIZE;
+	ggtt->mappable.end = ggtt->mappable_size - 1;
 	ggtt->base.total = 4096 * PAGE_SIZE;
 
 	ggtt->base.clear_range = nop_clear_range;
Signature · 6 lines
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author
#9 lore raw

PATCH 8/8 drm/i915: prefer resource_size_t for everything stolen

In reply to Matthew Auld

Keeps things consistent now that we make use of struct resource. This should keep us covered in case we ever get huge amounts of stolen memory.

v2: bunch of missing conversions (Chris)

Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>
---
 drivers/char/agp/intel-gtt.c           | 14 +++++-----
 drivers/gpu/drm/i915/i915_debugfs.c    |  2 +-
 drivers/gpu/drm/i915/i915_drv.h        |  9 +++---
 drivers/gpu/drm/i915/i915_gem_gtt.c    | 10 +++----
 drivers/gpu/drm/i915/i915_gem_gtt.h    |  6 ++--
 drivers/gpu/drm/i915/i915_gem_stolen.c | 51 +++++++++++++++++-----------------
 drivers/gpu/drm/i915/intel_pm.c        | 10 +++----
 include/drm/intel-gtt.h                |  4 +--
 8 files changed, 54 insertions(+), 52 deletions(-)
drivers/char/agp/intel-gtt.c +7 -7
index 2a321ee2943a..312c4cc440bc 100644
@@ -80,7 +80,7 @@ static struct _intel_private {
 	unsigned int needs_dmar : 1;
 	phys_addr_t gma_bus_addr;
 	/*  Size of memory reserved for graphics by the BIOS */
-	unsigned int stolen_size;
+	resource_size_t stolen_size;
 	/* Total number of gtt entries. */
 	unsigned int gtt_total_entries;
 	/* Part of the gtt that is mappable by the cpu, for those chips where

@@ -333,13 +333,13 @@ static void i810_write_entry(dma_addr_t addr, unsigned int entry,
 	writel_relaxed(addr | pte_flags, intel_private.gtt + entry);
 }
 
-static unsigned int intel_gtt_stolen_size(void)
+static resource_size_t intel_gtt_stolen_size(void)
 {
 	u16 gmch_ctrl;
 	u8 rdct;
 	int local = 0;
 	static const int ddt[4] = { 0, 16, 32, 64 };
-	unsigned int stolen_size = 0;
+	resource_size_t stolen_size = 0;
 
 	if (INTEL_GTT_GEN == 1)
 		return 0; /* no stolen mem on i81x */

@@ -417,8 +417,8 @@ static unsigned int intel_gtt_stolen_size(void)
 	}
 
 	if (stolen_size > 0) {
-		dev_info(&intel_private.bridge_dev->dev, "detected %dK %s memory\n",
-		       stolen_size / KB(1), local ? "local" : "stolen");
+		dev_info(&intel_private.bridge_dev->dev, "detected %lluK %s memory\n",
+		       (u64)stolen_size / KB(1), local ? "local" : "stolen");
 	} else {
 		dev_info(&intel_private.bridge_dev->dev,
 		       "no pre-allocated video memory detected\n");

@@ -1422,9 +1422,9 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
 EXPORT_SYMBOL(intel_gmch_probe);
 
 void intel_gtt_get(u64 *gtt_total,
-		   u32 *stolen_size,
+		   resource_size_t *stolen_size,
 		   phys_addr_t *mappable_base,
-		   u64 *mappable_size)
+		   resource_size_t *mappable_size)
 {
 	*gtt_total = intel_private.gtt_total_entries << PAGE_SHIFT;
 	*stolen_size = intel_private.stolen_size;
drivers/gpu/drm/i915/i915_debugfs.c +1 -1
index a05e2b92c02c..248d18a255d8 100644
@@ -523,7 +523,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
 		   dpy_count, dpy_size);
 
 	seq_printf(m, "%llu [%llu] gtt total\n",
-		   ggtt->base.total, ggtt->mappable_size);
+		   ggtt->base.total, (u64)ggtt->mappable_size);
 	seq_printf(m, "Supported page sizes: %s\n",
 		   stringify_page_sizes(INTEL_INFO(dev_priv)->page_sizes,
 					buf, sizeof(buf)));
drivers/gpu/drm/i915/i915_drv.h +5 -4
index e30a8a7812ba..eedffb941f9d 100644
@@ -3908,12 +3908,13 @@ void i915_gem_stolen_remove_node(struct drm_i915_private *dev_priv,
 int i915_gem_init_stolen(struct drm_i915_private *dev_priv);
 void i915_gem_cleanup_stolen(struct drm_device *dev);
 struct drm_i915_gem_object *
-i915_gem_object_create_stolen(struct drm_i915_private *dev_priv, u32 size);
+i915_gem_object_create_stolen(struct drm_i915_private *dev_priv,
+			      resource_size_t size);
 struct drm_i915_gem_object *
 i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private *dev_priv,
-					       u32 stolen_offset,
-					       u32 gtt_offset,
-					       u32 size);
+					       resource_size_t stolen_offset,
+					       resource_size_t gtt_offset,
+					       resource_size_t size);
 
 /* i915_gem_internal.c */
 struct drm_i915_gem_object *
drivers/gpu/drm/i915/i915_gem_gtt.c +5 -5
index 35d91cf07123..390de1c74329 100644
@@ -3354,7 +3354,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
 	 * a coarse sanity check.
 	 */
 	if (ggtt->mappable_size < (64<<20) || ggtt->mappable_size > (512<<20)) {
-		DRM_ERROR("Unknown GMADR size (%llx)\n", ggtt->mappable_size);
+		DRM_ERROR("Unknown GMADR size (%pa)\n", &ggtt->mappable_size);
 		return -ENXIO;
 	}
 

@@ -3466,7 +3466,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 	 */
 	if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading) {
 		ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
-		ggtt->mappable_size = min(ggtt->mappable_size, ggtt->base.total);
+		ggtt->mappable_size = min_t(u64, ggtt->mappable_size, ggtt->base.total);
 	}
 
 	if ((ggtt->base.total - 1) >> 32) {

@@ -3474,13 +3474,13 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
 			  " of address space! Found %lldM!\n",
 			  ggtt->base.total >> 20);
 		ggtt->base.total = 1ULL << 32;
-		ggtt->mappable_size = min(ggtt->mappable_size, ggtt->base.total);
+		ggtt->mappable_size = min_t(u64, ggtt->mappable_size, ggtt->base.total);
 	}
 
 	if (ggtt->mappable_size > ggtt->base.total) {
 		DRM_ERROR("mappable aperture extends past end of GGTT,"
-			  " aperture=%llx, total=%llx\n",
-			  ggtt->mappable_size, ggtt->base.total);
+			  " aperture=%pa, total=%llx\n",
+			  &ggtt->mappable_size, ggtt->base.total);
 		ggtt->mappable_size = ggtt->base.total;
 	}
drivers/gpu/drm/i915/i915_gem_gtt.h +3 -3
index a91281a55b91..6f7c640885ed 100644
@@ -371,7 +371,7 @@ struct i915_ggtt {
 
 	struct io_mapping mappable_io;	/* Mapping to our CPU mappable region */
 	struct resource mappable;       /* GMADR resource */
-	u64 mappable_size;		/* Total mappable size that we can CPU map */
+	resource_size_t mappable_size;	/* Total mappable size that we can CPU map */
 
 	/* Stolen memory is segmented in hardware with different portions
 	 * offlimits to certain functions.

@@ -381,8 +381,8 @@ struct i915_ggtt {
 	 * avoid the first page! The upper end of stolen memory is reserved for
 	 * hardware functions and similarly removed from the accessible range.
 	 */
-	u32 stolen_size;		/* Total size of stolen memory */
-	u32 stolen_usable_size;	/* Total size minus reserved ranges */
+	resource_size_t stolen_size;		/* Total size of stolen memory */
+	resource_size_t stolen_usable_size;	/* Total size minus reserved ranges */
 
 	/** "Graphics Stolen Memory" holds the global PTEs */
 	void __iomem *gsm;
drivers/gpu/drm/i915/i915_gem_stolen.c +26 -25

151 lines not on this page · raw message

drivers/gpu/drm/i915/intel_pm.c +5 -5
index a07b7b456b50..e2ece838e356 100644
@@ -7084,9 +7084,9 @@ static void cherryview_check_pctx(struct drm_i915_private *dev_priv)
 static void cherryview_setup_pctx(struct drm_i915_private *dev_priv)
 {
 	struct i915_ggtt *ggtt = &dev_priv->ggtt;
-	unsigned long pctx_paddr, paddr;
+	resource_size_t pctx_paddr, paddr;
+	resource_size_t pctx_size = 32*1024;
 	u32 pcbr;
-	int pctx_size = 32*1024;
 
 	pcbr = I915_READ(VLV_PCBR);
 	if ((pcbr >> VLV_PCBR_ADDR_SHIFT) == 0) {

@@ -7109,14 +7109,14 @@ static void cherryview_setup_pctx(struct drm_i915_private *dev_priv)
 static void valleyview_setup_pctx(struct drm_i915_private *dev_priv)
 {
 	struct drm_i915_gem_object *pctx;
-	unsigned long pctx_paddr;
+	resource_size_t pctx_paddr;
+	resource_size_t pctx_size = 24*1024;
 	u32 pcbr;
-	int pctx_size = 24*1024;
 
 	pcbr = I915_READ(VLV_PCBR);
 	if (pcbr) {
 		/* BIOS set it up already, grab the pre-alloc'd space */
-		int pcbr_offset;
+		resource_size_t pcbr_offset;
 
 		pcbr_offset = (pcbr & (~4095)) - dev_priv->dsm.start;
 		pctx = i915_gem_object_create_stolen_for_preallocated(dev_priv,
include/drm/intel-gtt.h +2 -2
index e901de0b6dd8..71505a5e376d 100644
@@ -5,9 +5,9 @@
 #define	_DRM_INTEL_GTT_H
 
 void intel_gtt_get(u64 *gtt_total,
-		   u32 *stolen_size,
+		   resource_size_t *stolen_size,
 		   phys_addr_t *mappable_base,
-		   u64 *mappable_size);
+		   resource_size_t *mappable_size);
 
 int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
 		     struct agp_bridge_data *bridge);
Signature · 6 lines
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#10 lore raw

Re: [PATCH 8/8] drm/i915: prefer resource_size_t for everything stolen

Quoting Matthew Auld (2017-11-24 16:42:57)

Quoted 16 lines

Keeps things consistent now that we make use of struct resource. This should keep us covered in case we ever get huge amounts of stolen memory.

v2: bunch of missing conversions (Chris)

Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>

---

drivers/gpu/drm/i915/i915_debugfs.c +0 -0
index a05e2b92c02c..248d18a255d8 100644

drivers/gpu/drm/i915/i915_debugfs.c static int i915_gem_object_info(struct seq_file *m, void *data) · line 526

Quoted 5 lines
drivers/gpu/drm/i915/i915_debugfs.c +1 -1
@@ -523,7 +523,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
                   dpy_count, dpy_size);
 
        seq_printf(m, "%llu [%llu] gtt total\n",
-                  ggtt->base.total, ggtt->mappable_size);
+                  ggtt->base.total, (u64)ggtt->mappable_size);

resource_size_t uses %pa (same as phys_addr_t), which you used below. Did it not work with seq_printf?
-Chris

drivers/gpu/drm/i915/i915_gem_gtt.c static int gen6_gmch_probe(struct i915_ggtt *ggtt) · line 3359

Quoted 12 lines
drivers/gpu/drm/i915/i915_gem_gtt.c +1 -1
index 35d91cf07123..390de1c74329 100644
@@ -3354,7 +3354,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
         * a coarse sanity check.
         */
        if (ggtt->mappable_size < (64<<20) || ggtt->mappable_size > (512<<20)) {
-               DRM_ERROR("Unknown GMADR size (%llx)\n", ggtt->mappable_size);
+               DRM_ERROR("Unknown GMADR size (%pa)\n", &ggtt->mappable_size);
                return -ENXIO;
        }

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#11 lore raw

Re: [PATCH 8/8] drm/i915: prefer resource_size_t for everything stolen

Quoted 19 lines · Chris Wilson

Quoting Matthew Auld (2017-11-24 16:42:57)

Quoted 18 lines

Keeps things consistent now that we make use of struct resource. This should keep us covered in case we ever get huge amounts of stolen memory.

v2: bunch of missing conversions (Chris)

Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>

---

drivers/gpu/drm/i915/i915_debugfs.c +0 -0
index a05e2b92c02c..248d18a255d8 100644
@@ -523,7 +523,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
                   dpy_count, dpy_size);
Quoted 6 lines

drivers/gpu/drm/i915/i915_debugfs.c static int i915_gem_object_info(struct seq_file *m, void *data) · line 526

Quoted 3 lines
drivers/gpu/drm/i915/i915_debugfs.c +1 -1
        seq_printf(m, "%llu [%llu] gtt total\n",
-                  ggtt->base.total, ggtt->mappable_size);
+                  ggtt->base.total, (u64)ggtt->mappable_size);

resource_size_t uses %pa (same as phys_addr_t), which you used below. Did it not work with seq_printf?

It does work, I just didn't fancy having a mix of decimal-integers with hexadecimal-integers when printing. Or don't we care?
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#12 lore raw

Re: [PATCH 8/8] drm/i915: prefer resource_size_t for everything stolen

Quoting Matthew Auld (2017-11-24 17:56:34)

Quoted 27 lines · Chris Wilson
Quoted 19 lines

Quoting Matthew Auld (2017-11-24 16:42:57)

Quoted 18 lines

Keeps things consistent now that we make use of struct resource. This should keep us covered in case we ever get huge amounts of stolen memory.

v2: bunch of missing conversions (Chris)

Signed-off-by Matthew Auld <[email protected]>
Cc Joonas Lahtinen <[email protected]>
Cc Chris Wilson <[email protected]>
Cc Paulo Zanoni <[email protected]>

---

drivers/gpu/drm/i915/i915_debugfs.c +0 -0
index a05e2b92c02c..248d18a255d8 100644
@@ -523,7 +523,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
                   dpy_count, dpy_size);
Quoted 6 lines

drivers/gpu/drm/i915/i915_debugfs.c static int i915_gem_object_info(struct seq_file *m, void *data) · line 526

Quoted 3 lines
drivers/gpu/drm/i915/i915_debugfs.c +1 -1
        seq_printf(m, "%llu [%llu] gtt total\n",
-                  ggtt->base.total, ggtt->mappable_size);
+                  ggtt->base.total, (u64)ggtt->mappable_size);

resource_size_t uses %pa (same as phys_addr_t), which you used below. Did it not work with seq_printf?

Quoted 2 lines

It does work, I just didn't fancy having a mix of decimal-integers with hexadecimal-integers when printing. Or don't we care?

Don't care that much, go hex.
-Chris
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CI
#13 lore raw

✓ Fi.CI.BAT: success for make stolen resource centric (rev2)

In reply to Matthew Auld
== Series Details ==

== Series Details ==

Series: make stolen resource centric (rev2)
URL : https://patchwork.freedesktop.org/series/34256/
State : success

== Summary ==

Series 34256v2 make stolen resource centric
https://patchwork.freedesktop.org/api/1.0/series/34256/revisions/2/mbox/

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:442s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:455s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:382s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:533s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:276s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:504s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:511s
fi-byt-j1900     total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  time:501s
fi-byt-n2820     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:490s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:430s
fi-gdg-551       total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 time:266s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:542s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:425s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:442s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:429s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:485s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:461s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:482s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:527s
fi-kbl-7567u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:472s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:535s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:569s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:465s
fi-skl-6600u     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:540s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:564s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:521s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:497s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:457s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:554s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:419s
Blacklisted hosts:
fi-cfl-s2        total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:605s
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:547s
fi-glk-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:496s

2cc63d7f56b7d8c9287a431773b3fec01b53e5cb drm-tip: 2017y-11m-24d-16h-04m-11s UTC integration manifest cb677cdb2272 drm/i915: prefer resource_size_t for everything stolen
a7238c8fd709 drm/i915: make mappable struct resource centric
27e73fbf543f drm/i915: make reserved struct resource centric
1f90b9ab4ed0 drm/i915: make dsm struct resource centric
1dc9173fac06 drm/i915: s/mappable_end/mappable_size/
1b4a59faddbd drm/i915: nuke the duplicated stolen discovery
32992386a7dc x86/early-quirks: replace the magical increment start values ef8723396370 x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7283/
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CI
#14 lore raw

✗ Fi.CI.IGT: failure for make stolen resource centric (rev2)

In reply to Matthew Auld
== Series Details ==

== Series Details ==

Series: make stolen resource centric (rev2)
URL : https://patchwork.freedesktop.org/series/34256/
State : failure

== Summary ==

Test kms_frontbuffer_tracking:

        Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
                pass       -> FAIL       (shard-snb) fdo#101623 +1
        Subgroup fbc-1p-primscrn-pri-shrfb-draw-render:
                pass       -> FAIL       (shard-snb)
        Subgroup fbc-rgb101010-draw-mmap-gtt:
                pass       -> SKIP       (shard-hsw)
        Subgroup fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
                pass       -> SKIP       (shard-hsw) fdo#103167
Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-hsw) fdo#99912
Test kms_cursor_legacy:
        Subgroup cursora-vs-flipa-toggle:
                pass       -> SKIP       (shard-hsw)
Test gem_busy:
        Subgroup close-race:
                pass       -> FAIL       (shard-snb) fdo#103829
Test drv_selftest:
        Subgroup mock_sanitycheck:
                pass       -> DMESG-WARN (shard-snb) fdo#103717

fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#103829 https://bugs.freedesktop.org/show_bug.cgi?id=103829
fdo#103717 https://bugs.freedesktop.org/show_bug.cgi?id=103717

shard-hsw        total:2667 pass:1532 dwarn:1   dfail:0   fail:10  skip:1124 time:9415s
shard-snb        total:2667 pass:1308 dwarn:2   dfail:0   fail:15  skip:1342 time:8023s

Blacklisted hosts:
shard-kbl total:2667 pass:1804 dwarn:2 dfail:0 fail:25 skip:836 time:10861s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7283/shards.html
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