Documentation: binding: Update endianness usage
Subsystems (2)
PATCH RESEND 1/1 Documentation: binding: Update endianness usage
IFC controller version < 2.0 support IFC register access as big endian. These controller version also require IFC NOR signals to be connected in reverse order with NOR flash.
IFC >= 2.0 is other way around.
So updating IFC binding to take care of both using endianness field.
--- Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +4 -2
@@ -18,8 +18,10 @@ Properties: interrupt (NAND_EVTER_STAT). If there is only one, that interrupt reports both types of event. -- little-endian : If this property is absent, the big-endian mode will - be in use as default for registers. +- little-endian or big-endin : It represents how IFC registers to be accessed. + It also represents connection between controller and + NOR flash. If this property is absent, the big-endian + mode will be in use as default. - ranges : Each range corresponds to a single chipselect, and covers the entire access window as configured.
Signature · 1 line
1.9.1
PATCH RESEND 1/1 Documentation: binding: Update endianness usage
Quoted 9 lines · Prabhakar Kushwaha
IFC controller version < 2.0 support IFC register access as big endian. These controller version also require IFC NOR signals to be connected in reverse order with NOR flash.
IFC >= 2.0 is other way around.
So updating IFC binding to take care of both using endianness field.
Signed-off-by Prabhakar Kushwaha <[email protected]>
I would suggest something like 'dt-bindings: ifc: ...' to be the prefix.
Shawn
Quoted 29 lines
--- Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +4
-2@@ -18,8 +18,10 @@ Properties: interrupt (NAND_EVTER_STAT). If there is only one, that interrupt reports both types of event. -- little-endian : If this property is absent, the big-endian mode will - be in use as default for registers. +- little-endian or big-endin : It represents how IFC registers to be accessed. + It also represents connection between controller and + NOR flash. If this property is absent, the big-endian + mode will be in use as default. - ranges : Each range corresponds to a single chipselect, and covers the entire access window as configured.Signature · 7 lines
1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel at lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Rob Herring
maintainerPATCH RESEND 1/1 Documentation: binding: Update endianness usage
Quoted 5 lines · Shawn Guo
Quoted 4 lines · Prabhakar Kushwaha
IFC controller version < 2.0 support IFC register access as big endian. These controller version also require IFC NOR signals to be connected in reverse order with NOR flash.
Quoted 7 lines
Quoted 5 lines
IFC >= 2.0 is other way around.
So updating IFC binding to take care of both using endianness field.
Signed-off-by Prabhakar Kushwaha <[email protected]>I would suggest something like 'dt-bindings: ifc: ...' to be the prefix.
Yes
Quoted 14 lines
Shawn
Quoted 12 lines
--- Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-)Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +0
-0@@ -18,8 +18,10 @@ Properties: interrupt (NAND_EVTER_STAT). If there is only one, that interrupt reports both types of event.
Quoted 3 lines
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt Properties: · line 21
Quoted 3 lines
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +1
-2-- little-endian : If this property is absent, the big-endian mode will - be in use as default for registers. +- little-endian or big-endin : It represents how IFC registers to be accessed.
s/endin/endian/
Quoted 3 lines
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt Properties: · line 24
Quoted 3 lines
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +3
-0+ It also represents connection between controller and + NOR flash. If this property is absent, the big-endian + mode will be in use as default.
How you wire up the NOR to the controller would be independent of the register endianness. Are you sure this is not just because the data register(s) is BE?
Quoted 11 lines
Quoted 11 lines
Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +0
-0- ranges : Each range corresponds to a single chipselect, and covers the entire access window as configured.Signature · 7 lines
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