Nexell S5P6818 SoC support

At the moment the serial_s5p driver takes care of both Exynos UARTs as well as those from older Samsung SoCs (s3c/s5p series). Looking more closely the only difference between those two groups is how the fractional baud rate is programmed: via a "divslot" (s3c) or as a proper fractional value (Exynos).
Instead of intricately expressing this via a special header file (which is otherwise identical), let's use the blessings of DT to tackle this:
The S5P series of SoCs use their own compatible string, in line with what the official DTs from the Linux kernel do. We then switch between divslot and fractional value based on the compatible string used. This allows us to get rid of the uart.h header files and make the driver more flexible.

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/dts/s5pc1xx-goni.dts             |  2 +-
 arch/arm/dts/s5pc1xx-smdkc100.dts         |  2 +-
 arch/arm/mach-exynos/include/mach/uart.h  | 44 ------------------------------
 arch/arm/mach-s5pc1xx/include/mach/uart.h | 44 ------------------------------
 drivers/serial/serial_s5p.c               | 45 +++++++++++++++++++++++++++----
 5 files changed, 42 insertions(+), 95 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/include/mach/uart.h
 delete mode 100644 arch/arm/mach-s5pc1xx/include/mach/uart.h

arch/arm/dts/s5pc1xx-goni.dts +0 -0

index 182325a091..964c7a6b67 100644

Quoted 31 lines · Andre Przywara

At the moment the serial_s5p driver takes care of both Exynos UARTs as well as those from older Samsung SoCs (s3c/s5p series). Looking more closely the only difference between those two groups is how the fractional baud rate is programmed: via a "divslot" (s3c) or as a proper fractional value (Exynos).
Instead of intricately expressing this via a special header file (which is otherwise identical), let's use the blessings of DT to tackle this:
The S5P series of SoCs use their own compatible string, in line with what the official DTs from the Linux kernel do. We then switch between divslot and fractional value based on the compatible string used. This allows us to get rid of the uart.h header files and make the driver more flexible.

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/dts/s5pc1xx-goni.dts             |  2 +-
 arch/arm/dts/s5pc1xx-smdkc100.dts         |  2 +-
 arch/arm/mach-exynos/include/mach/uart.h  | 44 ------------------------------
 arch/arm/mach-s5pc1xx/include/mach/uart.h | 44 ------------------------------
 drivers/serial/serial_s5p.c               | 45 +++++++++++++++++++++++++++----
 5 files changed, 42 insertions(+), 95 deletions(-)
 delete mode 100644 arch/arm/mach-exynos/include/mach/uart.h
 delete mode 100644 arch/arm/mach-s5pc1xx/include/mach/uart.h

arch/arm/dts/s5pc1xx-goni.dts +0 -0

index 182325a091..964c7a6b67 100644
@@ -28,7 +28,7 @@
        };
 

arch/arm/dts/s5pc1xx-goni.dts line 31

Quoted 3 lines

arch/arm/dts/s5pc1xx-goni.dts +1 -1

        serial at e2900800 {
-               compatible = "samsung,exynos4210-uart";
+               compatible = "samsung,s5pv210-uart";

Does this match linux?

Apart from that:

Reviewed-by Simon Glass <[email protected]>

Currently the UART used by some Samsung SoCs is selected by the generic CONFIG_S5P define. This makes it hard to re-use that UART without pulling in the whole of the S5P code. Also the Exynos SoCs use this driver, which is in fact a generic Samsung UART driver.

So create a new Kconfig symbol CONFIG_SAMSUNG_UART to reflect this and change the existing boards to use this symbol.

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/Kconfig              | 1 +
 arch/arm/mach-s5pc1xx/Kconfig | 2 ++
 drivers/serial/Kconfig        | 6 ++++++
 drivers/serial/Makefile       | 2 +-
 4 files changed, 10 insertions(+), 1 deletion(-)

SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch timer) in U-Boot.
At the moment it is mandatory for ARMv8 and used by two ARMv7 boards. Add a proper Kconfig symbol to express this dependency properly, allowing certain board configuration to later disable arch timer in case there are any problems with it.

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/Kconfig                     | 11 +++++++++++
 arch/arm/cpu/armv8/Makefile          |  2 +-
 arch/arm/mach-imx/mx7ulp/Kconfig     |  1 +
 include/configs/mx7ulp_evk.h         |  1 -
 include/configs/ti_armv7_keystone2.h |  1 -
 scripts/config_whitelist.txt         |  1 -
 6 files changed, 13 insertions(+), 4 deletions(-)

SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch timer) in U-Boot.
At the moment it is mandatory for ARMv8 and used by two ARMv7 boards. Add a proper Kconfig symbol to express this dependency properly, allowing certain board configuration to later disable arch timer in case there are any problems with it.

Signed-off-by Andre Przywara <[email protected]>

---
  arch/arm/Kconfig                     | 11 +++++++++++
  arch/arm/cpu/armv8/Makefile          |  2 +-
  arch/arm/mach-imx/mx7ulp/Kconfig     |  1 +
  include/configs/mx7ulp_evk.h         |  1 -
  include/configs/ti_armv7_keystone2.h |  1 -
  scripts/config_whitelist.txt         |  1 -
  6 files changed, 13 insertions(+), 4 deletions(-)

Hi Andre,

Quoted 8 lines · Andre Przywara

SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch timer) in U-Boot.
At the moment it is mandatory for ARMv8 and used by two ARMv7 boards. Add a proper Kconfig symbol to express this dependency properly, allowing certain board configuration to later disable arch timer in case there are any problems with it.

Signed-off-by Andre Przywara <[email protected]>

Quoted 8 lines

---
  arch/arm/Kconfig                     | 11 +++++++++++ arch/arm/cpu/armv8/Makefile          |  2 +- arch/arm/mach-imx/mx7ulp/Kconfig     |  1 + include/configs/mx7ulp_evk.h         |  1 - include/configs/ti_armv7_keystone2.h |  1 - scripts/config_whitelist.txt         |  1 -

  6 files changed, 13 insertions(+), 4 deletions(-)

This patch needs refreshing, as on master there are more usages of the symbol that need conversion:

include/configs/qemu-arm.h:#define CONFIG_SYS_ARCH_TIMER include/configs/stm32h743-disco.h:#define CONFIG_SYS_ARCH_TIMER include/configs/stm32h743-eval.h:#define CONFIG_SYS_ARCH_TIMER

Otherwise looks good.

SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch timer) in U-Boot.
At the moment it is mandatory for ARMv8 and used by two ARMv7 boards. Add a proper Kconfig symbol to express this dependency properly, allowing certain board configuration to later disable arch timer in case there are any problems with it.

Signed-off-by Andre Przywara <[email protected]>

From: Amit Singh Tomar <[email protected]>

The simplest and most generic form of a reset controller just exposes multiple MMIO registers, where each bit toggles a separate reset line. Add a generic driver to describe this kind of reset controller.

This is used on the Nexell S5P6818, for instance, but also by other SoCs.

Signed-off-by Amit Singh Tomar <[email protected]>

[Andre: make more generic, let it cover multiple registers, slight rework]

Signed-off-by Andre Przywara <[email protected]>

---
 drivers/reset/Kconfig         |   6 +++
 drivers/reset/Makefile        |   1 +
 drivers/reset/reset-generic.c | 111 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 118 insertions(+)
 create mode 100644 drivers/reset/reset-generic.c

drivers/reset/Kconfig +0 -0

index ce46e2752c..3032b0064c 100644

drivers/reset/Kconfig +1 -0

+
 config SANDBOX_RESET
        bool "Enable the sandbox reset test driver"
        depends on DM_MAILBOX && SANDBOX

drivers/reset/Makefile +1 -0

index 252cefeed5..81680837ef 100644
@@ -12,3 +12,4 @@ obj-$(CONFIG_TEGRA186_RESET) += tegra186-reset.o
 obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
 obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
 obj-$(CONFIG_AST2500_RESET) += ast2500-reset.o
+obj-$(CONFIG_GENERIC_RESET) += reset-generic.o

drivers/reset/reset-generic.c new file +9 -0

new file mode 100644
index 0000000000..0a7740202d
@@ -0,0 +1,111 @@
+/*
+ * Copyright (C) 2017 Amit Singh Tomar <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>

drivers/reset/reset-generic.c new file +4 -0

+static int generic_reset_toggle(struct reset_ctl *rst, bool assert)
+{
+       struct generic_reset_priv *priv = dev_get_priv(rst->dev);
+       int reg_width = sizeof(u32);

drivers/reset/reset-generic.c new file +19 -0

+       if (assert)
+               writel(reg & ~BIT(offset), priv->membase + (bank * reg_width));
+       else
+               writel(reg | BIT(offset), priv->membase + (bank * reg_width));
+
+       return 0;
+}
+
+static int generic_reset_assert(struct reset_ctl *rst)
+{
+       return generic_reset_toggle(rst, true);
+}
+
+static int generic_reset_deassert(struct reset_ctl *rst)
+{
+       return generic_reset_toggle(rst, false);
+}
+
+static int generic_reset_free(struct reset_ctl *rst)

drivers/reset/reset-generic.c new file +14 -0

+
+       return generic_reset_assert(rst);
+}
+
+struct reset_ops generic_reset_reset_ops = {
+       .free = generic_reset_free,
+       .request = generic_reset_request,
+       .rst_assert = generic_reset_assert,
+       .rst_deassert = generic_reset_deassert,
+};
+
+static const struct udevice_id generic_reset_ids[] = {
+       { .compatible = "generic-reset" },
+       { .compatible = "nexell,s5p6818-reset" },

drivers/reset/reset-generic.c new file +22 -1

+       if (addr == FDT_ADDR_T_NONE)
+               return -EINVAL;
+
+       priv->max_reset = dev_read_u32_default(dev, "num-resets", -1);
+       if (priv->max_reset == -1)
+               priv->max_reset = size * BITS_PER_BYTE;
+
+       priv->membase = devm_ioremap(dev, addr, size);
+       if (!priv->membase)
+               return -EFAULT;
+
+       return 0;
+}
+
+U_BOOT_DRIVER(generic_reset) = {
+       .name = "generic_reset",
+       .id = UCLASS_RESET,
+       .of_match = generic_reset_ids,
+       .ops = &generic_reset_reset_ops,
+       .probe = generic_reset_probe,
+       .priv_auto_alloc_size = sizeof(struct generic_reset_priv),
+};
--

2.14.1

From: Amit Singh Tomar <[email protected]>

The Nexell SoCs contain multiple MMC devices, which can be driven by U-Boot's DesignWare MMC driver, if supported by the required glue driver file.
Provide that file along with the Makefile/Kconfig changes.

Signed-off-by Amit Singh Tomar <[email protected]>

Signed-off-by Andre Przywara <[email protected]>

---
 drivers/mmc/Kconfig         |   8 +++
 drivers/mmc/Makefile        |   1 +
 drivers/mmc/nexell_dw_mmc.c | 159 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 168 insertions(+)
 create mode 100644 drivers/mmc/nexell_dw_mmc.c

drivers/mmc/Kconfig +8 -0

index 62ce0af7d3..243878aa65 100644
@@ -91,6 +91,14 @@ config MMC_DW_K3
          Synopsys DesignWare Memory Card Interface driver. Select this option
          for platforms based on Hisilicon K3 SoC's.
 
+config MMC_DW_NEXELL
+        bool "NEXELL SD/MMC controller support"
+        depends on ARCH_NEXELL && DM_MMC && OF_CONTROL
+        depends on MMC_DW
+        help
+          This enables support for the Nexell SD/MMM controller, which is
+          based on Designware IP.
+
 config MMC_DW_ROCKCHIP
        bool "Rockchip SD/MMC controller support"
        depends on DM_MMC && OF_CONTROL

drivers/mmc/Makefile +1 -0

index d505f37f01..0fb6eb7803 100644
@@ -26,6 +26,7 @@ obj-$(CONFIG_MMC_DAVINCI)             += davinci_mmc.o
 obj-$(CONFIG_MMC_DW)                   += dw_mmc.o
 obj-$(CONFIG_MMC_DW_EXYNOS)            += exynos_dw_mmc.o
 obj-$(CONFIG_MMC_DW_K3)                        += hi6220_dw_mmc.o
+obj-$(CONFIG_MMC_DW_NEXELL)            += nexell_dw_mmc.o
 obj-$(CONFIG_MMC_DW_ROCKCHIP)          += rockchip_dw_mmc.o
 obj-$(CONFIG_MMC_DW_SOCFPGA)           += socfpga_dw_mmc.o
 obj-$(CONFIG_FSL_ESDHC) += fsl_esdhc.o

drivers/mmc/nexell_dw_mmc.c new file +30 -0

new file mode 100644
index 0000000000..e96395cdaf
@@ -0,0 +1,159 @@
+/*
+ * Copyright (C) 2017 Amit Singh Tomar <[email protected]>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dt-structs.h>
+#include <dwmmc.h>
+#include <errno.h>
+#include <mapmem.h>
+#include <linux/err.h>
+#include <reset.h>
+#include <asm/arch/clk.h>
+
+#define SDMMCCLKENB 0xC00C5000
+#define SDMMCCLKGEN0L 0xC00C5004
+#define PLL_SEL_MASK GENMASK(4, 2)
+#define CLK_DIV_MASK GENMASK(12, 5)
+#define PLLSEL_SHIFT 0x2
+#define PLL0_SEL 0
+#define PLL1_SEL 1
+#define PLL2_SEL 2
+#define SDMMC_CLK_ENB 0xc /* Magic bit to enable/generate SDMMC clock */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct nexell_mmc_plat {

drivers/mmc/nexell_dw_mmc.c new file +22 -0

+       if (fifo_depth < 0) {
+               printf("DWMMC: Can't get FIFO depth\n");
+               return -EINVAL;
+       }
+
+       host->name = dev->name;
+       host->ioaddr = (void *)devfdt_get_addr(dev);
+       host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+                                       "bus-width", 4);
+
+       ret = reset_assert(&priv->reset_ctl);
+       if (ret)
+               return ret;
+
+       host->clksel = nexell_dwmci_clksel;
+
+       ret = reset_deassert(&priv->reset_ctl);
+       if (ret)
+               return ret;
+
+       host->dev_index = 0;
+       host->bus_hz = get_mmc_clk(host->dev_index);

drivers/mmc/nexell_dw_mmc.c new file +54 -1

+       struct nexell_mmc_plat *plat = dev_get_platdata(dev);
+#endif
+       struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
+       struct nexell_dwmmc_priv *priv = dev_get_priv(dev);
+       struct dwmci_host *host = &priv->host;
+
+#ifdef CONFIG_BLK
+       dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000);
+       host->mmc = &plat->mmc;
+#else
+       int ret;
+
+       ret = add_dwmci(host, host->bus_hz, 400000);
+       if (ret)
+               return ret;
+#endif
+
+       host->mmc->priv = &priv->host;
+       upriv->mmc = host->mmc;
+       host->mmc->dev = dev;
+
+       return 0;
+}
+
+static int nexell_dwmmc_bind(struct udevice *dev)
+{
+#ifdef CONFIG_BLK
+       struct nexell_mmc_plat *plat = dev_get_platdata(dev);
+       int ret;
+
+       ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
+       if (ret)
+               return ret;
+#endif
+
+       return 0;
+}
+
+static const struct udevice_id nexell_dwmmc_ids[] = {
+       { .compatible = "nexell,s5p6818-dw-mshc" },
+       { }
+};
+
+U_BOOT_DRIVER(nexell_dwmmc_drv) = {
+       .name           = "nexell_s5p6818_dw_mshc",
+       .id             = UCLASS_MMC,
+       .of_match       = nexell_dwmmc_ids,
+       .ops            = &dm_dwmci_ops,
+       .ofdata_to_platdata = nexell_dwmmc_ofdata_to_platdata,
+       .bind           = nexell_dwmmc_bind,
+       .probe          = nexell_dwmmc_probe,
+       .priv_auto_alloc_size = sizeof(struct nexell_dwmmc_priv),
+       .platdata_auto_alloc_size = sizeof(struct nexell_mmc_plat),
+};
--

2.14.1

The Nexell S5P6818 is a typical SoC with ARM Cortex-A53 cores. It has many peripherals derived from Samsung SoCs (MMC, serial, I2C, Ethernet, ...).
Add the required files to introduce this new SoC (family?) to U-Boot.

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/Kconfig              |  6 ++++++
 arch/arm/Makefile             |  1 +
 arch/arm/mach-nexell/Kconfig  |  9 +++++++++
 arch/arm/mach-nexell/Makefile |  7 +++++++
 arch/arm/mach-nexell/board.c  | 41 +++++++++++++++++++++++++++++++++++++++++
 include/configs/s5p6818.h     | 33 +++++++++++++++++++++++++++++++++
 6 files changed, 97 insertions(+)
 create mode 100644 arch/arm/mach-nexell/Kconfig
 create mode 100644 arch/arm/mach-nexell/Makefile
 create mode 100644 arch/arm/mach-nexell/board.c
 create mode 100644 include/configs/s5p6818.h

The primary boot loaders provided by the SoC vendor or derived from that use an image format called "NSIH" to learn the load address and size of the boot payload. This header occupies 512 bytes, but contains only a few essential words of information.
Use the boot0 feature to prepend this header before the actual U-Boot proper. We automatically fill it with the required information, also add a branch instruction to be able to enter at the beginning of the header.

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/Kconfig                         |  1 +
 arch/arm/include/asm/arch-nexell/boot0.h | 35 ++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-nexell/boot0.h

From: Amit Singh Tomar <[email protected]>

ARMv8 boards require a struct describing the memory regions for the mandatory MMU setup.
Add the respective data for the Nexell S5P6818 SoC.

Signed-off-by Amit Singh Tomar <[email protected]>

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/mach-nexell/Makefile    |  1 +
 arch/arm/mach-nexell/mmu-arm64.c | 39 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 40 insertions(+)
 create mode 100644 arch/arm/mach-nexell/mmu-arm64.c

The Nexell S5P6818 SoC uses a UART very similar to those used in the Samsung S5P SoCs.
Enable the driver in the config and add the necessary glue headers and clock functions to make the S5P driver happy.

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/Kconfig                       |  3 ++
 arch/arm/include/asm/arch-nexell/clk.h | 13 +++++++++
 arch/arm/mach-nexell/board.c           | 50 ++++++++++++++++++++++++++++++++++
 3 files changed, 66 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-nexell/clk.h

arch/arm/Kconfig +3 -0

index b0f3ee7289..9c317ddf3f 100644
@@ -656,6 +656,9 @@ config ARCH_NEXELL
        bool "Nexell S5P support"
        select ARM64
        select ENABLE_ARM_SOC_BOOT0_HOOK
+       select DM
+       select DM_SERIAL
+       select SAMSUNG_UART
 
 config ARCH_QEMU
        bool "QEMU Virtual Platform"

arch/arm/include/asm/arch-nexell/clk.h new file +13 -0

new file mode 100644
index 0000000000..bfd145f555
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2017 ARM Ltd.
+ * Andre Przywara <[email protected]>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_CLK_H_
+#define __ASM_ARCH_CLK_H_
+
+unsigned long get_uart_clk(int dev_index);
+
+#endif

arch/arm/mach-nexell/board.c +0 -0

index f0d258b71c..54a9d8c1f5 100644

From: Amit Singh Tomar <[email protected]>

Nexell based SoCs (S5P4414 and S5P6818) contain the same timer block as present on Samsungs SoCs.

Add this timer code when compiling for Nexell SoC and provide the necessary glue functions to make the Samsung timer driver happy.

Signed-off-by Amit Singh Tomar <[email protected]>

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/include/asm/arch-nexell/clk.h |  1 +
 arch/arm/include/asm/arch-nexell/pwm.h | 62 ++++++++++++++++++++++++++++++++++
 arch/arm/mach-nexell/Makefile          |  2 ++
 arch/arm/mach-nexell/board.c           | 37 +++++++++++++++++---
 4 files changed, 97 insertions(+), 5 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-nexell/pwm.h

The Nexell S5P6818 SoC is an octa-core SoC with ARM Cortex-A53 cores. The chip contains the usual peripherals for an smartphone/tablet/set-top box SoC.
Add the .dtsi file describing the peripherals supported so far, but keep them still disabled.

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/Kconfig          |   1 +
 arch/arm/dts/s5p6818.dtsi | 196 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 197 insertions(+)
 create mode 100644 arch/arm/dts/s5p6818.dtsi

The NanoPi M3 is a single board computer containing a Nexell S5P6818 SoC (with 8 ARMv8 Cortex-A53 cores).
Add the respective defconfig and a (preliminary) device tree listing the devices that we support so far.

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/Kconfig                       |  6 ++++++
 arch/arm/dts/s5p6818-nanopi-m3.dts     | 30 ++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-nexell/clk.h |  1 +
 arch/arm/mach-nexell/board.c           | 10 ++++++++++
 configs/nanopi_m3_defconfig            | 12 ++++++++++++
 include/configs/s5p6818.h              |  2 ++
 6 files changed, 61 insertions(+)
 create mode 100644 arch/arm/dts/s5p6818-nanopi-m3.dts
 create mode 100644 configs/nanopi_m3_defconfig

The vendor provided SPL blob (called "secondboot") runs completely in AArch32, so expects U-Boot to be AArch32 as well.
Also the lack of a working arch timer limits Linux to 32-bits, as the mainline arm64 kernel heavily relies on the arch timer.

This commit switches the NanoPiM3 board over to generate an ARM(32) binary, to allow easy testing for now. Also this adds a README file to describe the generation of a bootable SD card image.

Signed-off-by Andre Przywara <[email protected]>

---
 arch/arm/Kconfig            |  2 +-
 arch/arm/mach-nexell/README | 49 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 50 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/mach-nexell/README

Hi,

this is a first draft of the things Amit and I have been working on in the last months. It introduces support for an SoC called "Nexell S5P6818". This is an Octa-core ARMv8 SoC with Cortex-A53 cores, which apparently is closely related to (older) Samsung SoCs. Many peripherals are compatible to Samsung IP (UART, MMC, Ethernet, timers, ...), but some core peripherals like the clocks and the pin controller seem to be completely different. We used the NanoPi M3 board [1] for testing, which uses this SoC along with the usual suspects of on-board components and connectors. This port is done completely from scratch, by just looking at the manual. This allows a much cleaner and modern U-Boot support than the BSP code.

The ARM Generic Timer (aka. arch timer) does not seem to work on this SoC. Ideally there would be some (hidden?) register enabling the right clock source, though we haven't found one (yet). But as also other code for this SoC out there on the net does not seem to be able to use the arch timer, I am not too hopeful here. While this does not impose a real problem to U-Boot (patch 3/13 takes care of that), it is a showstopper for mainline arm64 Linux, which heavily relies on the arch timer (since it's a mandatory part of the ARMv8 architecture). There is only a very small chance that the arch timer ever becomes optional in the mainline arm64 kernel. However our arm(32) kernel ports works quite nicely so far, also a (hacked) arm64 kernel boots to the prompt. We will submit Linux patches at a later time.

We would be grateful to get some comments on the patches. The first five patches adapt existing code to simplify support for this SoC. The following six patches then successively enable and add SoC support, culmulating in the addition of a nanopi_m3_defconfig file in patch 11/13. The SoC support code is actually architecture agnostic, though up until the last patch it generates an AArch64 binary. To overcome the problems with the arch timer mentioned above, the final patch switches the port over to AArch32, which can more naturally launch arm kernels.

This code so far does not include an SPL, instead it relies on some vendor provided code to initialise the DRAM and load U-Boot proper. The original BSP code provided a binary blob for that (called "secondboot"), although there is some GPLed version of that available on github([2]). We can load a 32-bit U-Boot with both the vendor blob and Rafaello's GPL version, the 64-bit version is only usable with the GPL code. Instruction on how to create a bootable SD card are contained in the arch/arm/mach-nexell/README file.

We would be very grateful to get some first feedback on those patches and the approach in general taken here.

Cheers,
Andre.

[1] http://nanopi.io/nanopi-m3.html
[2] https://github.com/rafaello7/bl1-nanopi-m3

Amit Singh Tomar (4):
reset: add driver for generic reset controllers
mmc: add MMC (glue) driver for Nexell SoCs
arm: nexell: add ARM64 MMU regions
arm: nexell: add timer support

Andre Przywara (9):
serial: s5p: rework Samsung UART driver to get rid of uart.h
serial: S5P/Samsung: refactor and Kconfig-ize UART selection
arm: move SYS_ARCH_TIMER to KConfig
arm: add basic framework for Nexell S5P6818 support
arm: nexell: embed NSIH header
arm: nexell: add UART support
arm: nexell: add preliminary S5P6818 SoC device tree
arm: add NanoPi M3 board support
arm: nexell: switch to 32-bit

 arch/arm/Kconfig                          |  29 +++++
 arch/arm/Makefile                         |   1 +
 arch/arm/cpu/armv8/Makefile               |   2 +-
 arch/arm/dts/s5p6818-nanopi-m3.dts        |  30 +++++
 arch/arm/dts/s5p6818.dtsi                 | 196
++++++++++++++++++++++++++++++
arch/arm/dts/s5pc1xx-goni.dts             |   2 +-
arch/arm/dts/s5pc1xx-smdkc100.dts         |   2 +-
arch/arm/include/asm/arch-nexell/boot0.h  |  35 ++++++
arch/arm/include/asm/arch-nexell/clk.h    |  15 +++
arch/arm/include/asm/arch-nexell/pwm.h    |  62 ++++++++++
arch/arm/mach-exynos/include/mach/uart.h  |  44 -------
arch/arm/mach-imx/mx7ulp/Kconfig          |   1 +
arch/arm/mach-nexell/Kconfig              |   9 ++
arch/arm/mach-nexell/Makefile             |  10 ++
arch/arm/mach-nexell/README               |  49 ++++++++
arch/arm/mach-nexell/board.c              | 128 +++++++++++++++++++
arch/arm/mach-nexell/mmu-arm64.c          |  39 ++++++
arch/arm/mach-s5pc1xx/Kconfig             |   2 +
arch/arm/mach-s5pc1xx/include/mach/uart.h |  44 -------
configs/nanopi_m3_defconfig               |  12 ++
drivers/mmc/Kconfig                       |   8 ++
drivers/mmc/Makefile                      |   1 +
drivers/mmc/nexell_dw_mmc.c               | 159
++++++++++++++++++++++++ drivers/reset/Kconfig
|   6 + drivers/reset/Makefile                    |   1 +
drivers/reset/reset-generic.c             | 111 +++++++++++++++++
drivers/serial/Kconfig                    |   6 +
drivers/serial/Makefile                   |   2 +-
drivers/serial/serial_s5p.c               |  45 ++++++-
include/configs/mx7ulp_evk.h              |   1 -
include/configs/s5p6818.h                 |  35 ++++++
include/configs/ti_armv7_keystone2.h      |   1 -
scripts/config_whitelist.txt              |   1 - 33 files changed,

989 insertions(+), 100 deletions(-) create mode 100644 arch/arm/dts/s5p6818-nanopi-m3.dts create mode 100644 arch/arm/dts/s5p6818.dtsi create mode 100644 arch/arm/include/asm/arch-nexell/boot0.h create mode 100644 arch/arm/include/asm/arch-nexell/clk.h create mode 100644 arch/arm/include/asm/arch-nexell/pwm.h delete mode 100644 arch/arm/mach-exynos/include/mach/uart.h create mode 100644 arch/arm/mach-nexell/Kconfig create mode 100644 arch/arm/mach-nexell/Makefile create mode 100644

arch/arm/mach-nexell/README create mode 100644 arch/arm/mach-nexell/board.c create mode 100644 arch/arm/mach-nexell/mmu-arm64.c delete mode 100644 arch/arm/mach-s5pc1xx/include/mach/uart.h create mode 100644 configs/nanopi_m3_defconfig create mode 100644 drivers/mmc/nexell_dw_mmc.c create mode 100644 drivers/reset/reset-generic.c create mode 100644 include/configs/s5p6818.h

Hi Andre,

Quoted 47 lines

Hi,

this is a first draft of the things Amit and I have been working on in the last months. It introduces support for an SoC called "Nexell S5P6818". This is an Octa-core ARMv8 SoC with Cortex-A53 cores, which apparently is closely related to (older) Samsung SoCs. Many peripherals are compatible to Samsung IP (UART, MMC, Ethernet, timers, ...), but some core peripherals like the clocks and the pin controller seem to be completely different. We used the NanoPi M3 board [1] for testing, which uses this SoC along with the usual suspects of on-board components and connectors. This port is done completely from scratch, by just looking at the manual. This allows a much cleaner and modern U-Boot support than the BSP code.

The ARM Generic Timer (aka. arch timer) does not seem to work on this SoC. Ideally there would be some (hidden?) register enabling the right clock source, though we haven't found one (yet). But as also other code for this SoC out there on the net does not seem to be able to use the arch timer, I am not too hopeful here. While this does not impose a real problem to U-Boot (patch 3/13 takes care of that), it is a showstopper for mainline arm64 Linux, which heavily relies on the arch timer (since it's a mandatory part of the ARMv8 architecture). There is only a very small chance that the arch timer ever becomes optional in the mainline arm64 kernel. However our arm(32) kernel ports works quite nicely so far, also a (hacked) arm64 kernel boots to the prompt. We will submit Linux patches at a later time.

We would be grateful to get some comments on the patches. The first five patches adapt existing code to simplify support for this SoC. The following six patches then successively enable and add SoC support, culmulating in the addition of a nanopi_m3_defconfig file in patch 11/13. The SoC support code is actually architecture agnostic, though up until the last patch it generates an AArch64 binary. To overcome the problems with the arch timer mentioned above, the final patch switches the port over to AArch32, which can more naturally launch arm kernels.

This code so far does not include an SPL, instead it relies on some vendor provided code to initialise the DRAM and load U-Boot proper. The original BSP code provided a binary blob for that (called "secondboot"), although there is some GPLed version of that available on github([2]). We can load a 32-bit U-Boot with both the vendor blob and Rafaello's GPL version, the 64-bit version is only usable with the GPL code. Instruction on how to create a bootable SD card are contained in the arch/arm/mach-nexell/README file.

Quoted 2 lines

We would be very grateful to get some first feedback on those patches and the approach in general taken here.

Just to ask - why it is not possible to add this to:

/arch/arm/mach-exynos ? And start new mach-nexell ?

As fair as I remember, many Samsung SoCs (especially S5P) share IP blocks, so maybe there is a place for unification?

Also, it would be quite challenging to support first armv8 Samsung soc in the current directory structure.....

+CC Jaehoon - who may have some comments here.

Quoted 67 lines

Cheers,
Andre.

[1] http://nanopi.io/nanopi-m3.html
[2] https://github.com/rafaello7/bl1-nanopi-m3

Amit Singh Tomar (4):
reset: add driver for generic reset controllers
mmc: add MMC (glue) driver for Nexell SoCs
arm: nexell: add ARM64 MMU regions
arm: nexell: add timer support

Andre Przywara (9):
serial: s5p: rework Samsung UART driver to get rid of uart.h
serial: S5P/Samsung: refactor and Kconfig-ize UART selection
arm: move SYS_ARCH_TIMER to KConfig
arm: add basic framework for Nexell S5P6818 support
arm: nexell: embed NSIH header
arm: nexell: add UART support
arm: nexell: add preliminary S5P6818 SoC device tree
arm: add NanoPi M3 board support
arm: nexell: switch to 32-bit

 arch/arm/Kconfig                          |  29 +++++
 arch/arm/Makefile                         |   1 +
 arch/arm/cpu/armv8/Makefile               |   2 +-
 arch/arm/dts/s5p6818-nanopi-m3.dts        |  30 +++++
 arch/arm/dts/s5p6818.dtsi                 | 196
++++++++++++++++++++++++++++++
arch/arm/dts/s5pc1xx-goni.dts             |   2 +-
arch/arm/dts/s5pc1xx-smdkc100.dts         |   2 +-
arch/arm/include/asm/arch-nexell/boot0.h  |  35 ++++++
arch/arm/include/asm/arch-nexell/clk.h    |  15 +++
arch/arm/include/asm/arch-nexell/pwm.h    |  62 ++++++++++
arch/arm/mach-exynos/include/mach/uart.h  |  44 -------
arch/arm/mach-imx/mx7ulp/Kconfig          |   1 +
arch/arm/mach-nexell/Kconfig              |   9 ++
arch/arm/mach-nexell/Makefile             |  10 ++
arch/arm/mach-nexell/README               |  49 ++++++++
arch/arm/mach-nexell/board.c              | 128 +++++++++++++++++++
arch/arm/mach-nexell/mmu-arm64.c          |  39 ++++++
arch/arm/mach-s5pc1xx/Kconfig             |   2 +
arch/arm/mach-s5pc1xx/include/mach/uart.h |  44 -------
configs/nanopi_m3_defconfig               |  12 ++
drivers/mmc/Kconfig                       |   8 ++
drivers/mmc/Makefile                      |   1 +
drivers/mmc/nexell_dw_mmc.c               | 159
++++++++++++++++++++++++ drivers/reset/Kconfig
|   6 + drivers/reset/Makefile                    |   1 +
drivers/reset/reset-generic.c             | 111 +++++++++++++++++
drivers/serial/Kconfig                    |   6 +
drivers/serial/Makefile                   |   2 +-
drivers/serial/serial_s5p.c               |  45 ++++++-
include/configs/mx7ulp_evk.h              |   1 -
include/configs/s5p6818.h                 |  35 ++++++
include/configs/ti_armv7_keystone2.h      |   1 -
scripts/config_whitelist.txt              |   1 - 33 files changed,

989 insertions(+), 100 deletions(-) create mode 100644 arch/arm/dts/s5p6818-nanopi-m3.dts create mode 100644 arch/arm/dts/s5p6818.dtsi create mode 100644 arch/arm/include/asm/arch-nexell/boot0.h create mode 100644 arch/arm/include/asm/arch-nexell/clk.h create mode 100644 arch/arm/include/asm/arch-nexell/pwm.h delete mode 100644 arch/arm/mach-exynos/include/mach/uart.h create mode 100644 arch/arm/mach-nexell/Kconfig create mode 100644 arch/arm/mach-nexell/Makefile create mode 100644

Quoted 9 lines

arch/arm/mach-nexell/README create mode 100644 arch/arm/mach-nexell/board.c create mode 100644 arch/arm/mach-nexell/mmu-arm64.c delete mode 100644 arch/arm/mach-s5pc1xx/include/mach/uart.h create mode 100644 configs/nanopi_m3_defconfig create mode 100644 drivers/mmc/nexell_dw_mmc.c create mode 100644 drivers/reset/reset-generic.c create mode 100644 include/configs/s5p6818.h

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de

Hi,

Quoted 52 lines

Hi Andre,

Quoted 49 lines

Hi,

this is a first draft of the things Amit and I have been working on in the last months. It introduces support for an SoC called "Nexell S5P6818". This is an Octa-core ARMv8 SoC with Cortex-A53 cores, which apparently is closely related to (older) Samsung SoCs. Many peripherals are compatible to Samsung IP (UART, MMC, Ethernet, timers, ...), but some core peripherals like the clocks and the pin controller seem to be completely different. We used the NanoPi M3 board [1] for testing, which uses this SoC along with the usual suspects of on-board components and connectors. This port is done completely from scratch, by just looking at the manual. This allows a much cleaner and modern U-Boot support than the BSP code.

The ARM Generic Timer (aka. arch timer) does not seem to work on this SoC. Ideally there would be some (hidden?) register enabling the right clock source, though we haven't found one (yet). But as also other code for this SoC out there on the net does not seem to be able to use the arch timer, I am not too hopeful here. While this does not impose a real problem to U-Boot (patch 3/13 takes care of that), it is a showstopper for mainline arm64 Linux, which heavily relies on the arch timer (since it's a mandatory part of the ARMv8 architecture). There is only a very small chance that the arch timer ever becomes optional in the mainline arm64 kernel. However our arm(32) kernel ports works quite nicely so far, also a (hacked) arm64 kernel boots to the prompt. We will submit Linux patches at a later time.

We would be grateful to get some comments on the patches. The first five patches adapt existing code to simplify support for this SoC. The following six patches then successively enable and add SoC support, culmulating in the addition of a nanopi_m3_defconfig file in patch 11/13. The SoC support code is actually architecture agnostic, though up until the last patch it generates an AArch64 binary. To overcome the problems with the arch timer mentioned above, the final patch switches the port over to AArch32, which can more naturally launch arm kernels.

This code so far does not include an SPL, instead it relies on some vendor provided code to initialise the DRAM and load U-Boot proper. The original BSP code provided a binary blob for that (called "secondboot"), although there is some GPLed version of that available on github([2]). We can load a 32-bit U-Boot with both the vendor blob and Rafaello's GPL version, the 64-bit version is only usable with the GPL code. Instruction on how to create a bootable SD card are contained in the arch/arm/mach-nexell/README file.

We would be very grateful to get some first feedback on those patches and the approach in general taken here.

Quoted 3 lines

Just to ask - why it is not possible to add this to:

/arch/arm/mach-exynos ? And start new mach-nexell ?

Ok. I was too fast :-)

Nexell is a separate company - also from Korea - so mach-nexell is a correct approach.

Sorry.

Quoted 3 lines

As fair as I remember, many Samsung SoCs (especially S5P) share IP blocks, so maybe there is a place for unification?

But unification if possible is more than welcome - as it was done in this patch set with uart code.

Quoted 2 lines

Also, it would be quite challenging to support first armv8 Samsung soc in the current directory structure.....

Considering above - mach-nexell is probably the way to go.

Quoted 79 lines

+CC Jaehoon - who may have some comments here.

Quoted 76 lines

Cheers,
Andre.

[1] http://nanopi.io/nanopi-m3.html
[2] https://github.com/rafaello7/bl1-nanopi-m3

Amit Singh Tomar (4):
reset: add driver for generic reset controllers
mmc: add MMC (glue) driver for Nexell SoCs
arm: nexell: add ARM64 MMU regions
arm: nexell: add timer support

Andre Przywara (9):
serial: s5p: rework Samsung UART driver to get rid of uart.h
serial: S5P/Samsung: refactor and Kconfig-ize UART selection
arm: move SYS_ARCH_TIMER to KConfig
arm: add basic framework for Nexell S5P6818 support
arm: nexell: embed NSIH header
arm: nexell: add UART support
arm: nexell: add preliminary S5P6818 SoC device tree
arm: add NanoPi M3 board support
arm: nexell: switch to 32-bit

 arch/arm/Kconfig                          |  29 +++++
 arch/arm/Makefile                         |   1 +
 arch/arm/cpu/armv8/Makefile               |   2 +-
 arch/arm/dts/s5p6818-nanopi-m3.dts        |  30 +++++
 arch/arm/dts/s5p6818.dtsi                 | 196
++++++++++++++++++++++++++++++
arch/arm/dts/s5pc1xx-goni.dts             |   2 +-
arch/arm/dts/s5pc1xx-smdkc100.dts         |   2 +-
arch/arm/include/asm/arch-nexell/boot0.h  |  35 ++++++
arch/arm/include/asm/arch-nexell/clk.h    |  15 +++
arch/arm/include/asm/arch-nexell/pwm.h    |  62 ++++++++++
arch/arm/mach-exynos/include/mach/uart.h  |  44 -------
arch/arm/mach-imx/mx7ulp/Kconfig          |   1 +
arch/arm/mach-nexell/Kconfig              |   9 ++
arch/arm/mach-nexell/Makefile             |  10 ++
arch/arm/mach-nexell/README               |  49 ++++++++
arch/arm/mach-nexell/board.c              | 128 +++++++++++++++++++
arch/arm/mach-nexell/mmu-arm64.c          |  39 ++++++
arch/arm/mach-s5pc1xx/Kconfig             |   2 +
arch/arm/mach-s5pc1xx/include/mach/uart.h |  44 -------
configs/nanopi_m3_defconfig               |  12 ++
drivers/mmc/Kconfig                       |   8 ++
drivers/mmc/Makefile                      |   1 +
drivers/mmc/nexell_dw_mmc.c               | 159
++++++++++++++++++++++++ drivers/reset/Kconfig
|   6 + drivers/reset/Makefile                    |   1 +
drivers/reset/reset-generic.c             | 111 +++++++++++++++++
drivers/serial/Kconfig                    |   6 +
drivers/serial/Makefile                   |   2 +-
drivers/serial/serial_s5p.c               |  45 ++++++-
include/configs/mx7ulp_evk.h              |   1 -
include/configs/s5p6818.h                 |  35 ++++++
include/configs/ti_armv7_keystone2.h      |   1 -
scripts/config_whitelist.txt              |   1 - 33 files changed,

989 insertions(+), 100 deletions(-) create mode 100644 arch/arm/dts/s5p6818-nanopi-m3.dts create mode 100644 arch/arm/dts/s5p6818.dtsi create mode 100644 arch/arm/include/asm/arch-nexell/boot0.h create mode 100644 arch/arm/include/asm/arch-nexell/clk.h create mode 100644 arch/arm/include/asm/arch-nexell/pwm.h delete mode 100644 arch/arm/mach-exynos/include/mach/uart.h create mode 100644 arch/arm/mach-nexell/Kconfig create mode 100644 arch/arm/mach-nexell/Makefile create mode 100644 arch/arm/mach-nexell/README create mode 100644 arch/arm/mach-nexell/board.c create mode 100644 arch/arm/mach-nexell/mmu-arm64.c delete mode 100644 arch/arm/mach-s5pc1xx/include/mach/uart.h create mode 100644 configs/nanopi_m3_defconfig create mode 100644 drivers/mmc/nexell_dw_mmc.c create mode 100644 drivers/reset/reset-generic.c create mode 100644 include/configs/s5p6818.h

Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de