ARM: dts: Add ethernet PHYs to the a bunch of Geminis
PATCH v2 1/1 ARM: dts: Add ethernet PHYs to the a bunch of Geminis
These Gemini boards have Ethernet PHY on GPIO bit-banged MDIO, clearly defined in the corresponding OpenWRT ethernet patches since ages. Add them in accordance with the OpenWRT patch so we can use them when we add ethernet support.
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ChangeLog v1->v2:
- Fix the unit names on all PHYs to correspond to the actual reg.
--- arch/arm/boot/dts/gemini-nas4220b.dts | 13 +++++++++++++ arch/arm/boot/dts/gemini-rut1xx.dts | 13 +++++++++++++ arch/arm/boot/dts/gemini-wbd111.dts | 13 +++++++++++++ arch/arm/boot/dts/gemini-wbd222.dts | 18 ++++++++++++++++++ 4 files changed, 57 insertions(+)
arch/arm/boot/dts/gemini-nas4220b.dts +13 -0
@@ -64,6 +64,19 @@ }; }; + mdio0: ethernet-phy { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy at 1 { + reg = <1>; + device_type = "ethernet-phy"; + }; + }; + soc { flash at 30000000 { status = "okay";
arch/arm/boot/dts/gemini-rut1xx.dts +13 -0
@@ -58,6 +58,19 @@ }; }; + mdio0: ethernet-phy { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy at 1 { + reg = <1>; + device_type = "ethernet-phy"; + }; + }; + soc { flash at 30000000 { status = "okay";
arch/arm/boot/dts/gemini-wbd111.dts +13 -0
@@ -69,6 +69,19 @@ }; }; + mdio0: ethernet-phy { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy at 1 { + reg = <1>; + device_type = "ethernet-phy"; + }; + }; + soc { flash at 30000000 { status = "okay";
arch/arm/boot/dts/gemini-wbd222.dts +18 -0
@@ -69,6 +69,24 @@ }; }; + mdio0: ethernet-phy { + compatible = "virtual,mdio-gpio"; + gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ + <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy at 1 { + reg = <1>; + device_type = "ethernet-phy"; + }; + + phy1: ethernet-phy at 3 { + reg = <3>; + device_type = "ethernet-phy"; + }; + }; + soc { flash at 30000000 { status = "okay";
Signature · 1 line
2.14.3
PATCH v2 1/1 ARM: dts: Add ethernet PHYs to the a bunch of Geminis
Quoted 8 lines · Linus Walleij
These Gemini boards have Ethernet PHY on GPIO bit-banged MDIO, clearly defined in the corresponding OpenWRT ethernet patches since ages. Add them in accordance with the OpenWRT patch so we can use them when we add ethernet support.
Cc Andrew Lunn <[email protected]>Signed-off-by Linus Walleij <[email protected]>
This is good as is, but i just wonder if the mdio node can be moved into the .dtsi file. Four from six have the exact same setup. So i'm guessing the reference design has been copied. So it is likely the other two at the same. So you could move the mdio, set it to status disable, and have these board enable it in their .dts file.
Andrew
PATCH v2 1/1 ARM: dts: Add ethernet PHYs to the a bunch of Geminis
Quoted 11 lines · Andrew Lunn
Quoted 8 lines · Linus Walleij
These Gemini boards have Ethernet PHY on GPIO bit-banged MDIO, clearly defined in the corresponding OpenWRT ethernet patches since ages. Add them in accordance with the OpenWRT patch so we can use them when we add ethernet support.
Cc Andrew Lunn <[email protected]>Signed-off-by Linus Walleij <[email protected]>Reviewed-by Andrew Lunn <[email protected]>
Thanks man.
Quoted 3 lines
This is good as is, but i just wonder if the mdio node can be moved into the .dtsi file. Four from six have the exact same setup. So i'm guessing the reference design has been copied.
Yeah they all have the GPIO lines similarly so far. I might break out a DTSI with common stuff based on the reference design. The main DTSI should be the chipset but we can surely have a gemi-standard-board.dtsi as well.
Yours,
Linus Walleij