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ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK

PATCH New Marek Vasut 3 participants 4 messages Dec 11, 2017 – Dec 17, 2017 Arm i.MX and Layerscape

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Marek Vasut

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#0 lore raw

PATCH 1/1 ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK

The DDR DRAM calibration doesn't work on T-topology sometimes, so disable it.

Signed-off-by Marek Vasut <[email protected]>
Cc Stefano Babic <[email protected]>
---
 board/dhelectronics/dh_imx6/dh_imx6_spl.c | 4 ----
 1 file changed, 4 deletions(-)
board/dhelectronics/dh_imx6/dh_imx6_spl.c +0 -4
index bb98f39f02..57ae7f15ce 100644
@@ -387,10 +387,6 @@ void board_init_f(ulong dummy)
 				  &dhcom6sdl_grp_ioregs);
 	mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr);
 
-	/* Perform DDR DRAM calibration */
-	udelay(100);
-	mmdc_do_dqs_calibration(&dhcom_ddr_info);
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);
Signature · 1 line
2.15.0
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#1 lore raw

PATCH 1/1 ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK

Hi Marek,

Quoted 13 lines · Marek Vasut

The DDR DRAM calibration doesn't work on T-topology sometimes, so disable it.

Signed-off-by Marek Vasut <[email protected]>
Cc Stefano Babic <[email protected]>
---
 board/dhelectronics/dh_imx6/dh_imx6_spl.c | 4 ----
 1 file changed, 4 deletions(-)
board/dhelectronics/dh_imx6/dh_imx6_spl.c +0 -0
index bb98f39f02..57ae7f15ce 100644

board/dhelectronics/dh_imx6/dh_imx6_spl.c void board_init_f(ulong dummy) · line 392

Quoted 6 lines
board/dhelectronics/dh_imx6/dh_imx6_spl.c +0 -3
@@ -387,10 +387,6 @@ void board_init_f(ulong dummy)
                                  &dhcom6sdl_grp_ioregs);
        mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr);
 
-       /* Perform DDR DRAM calibration */
-       udelay(100);
-       mmdc_do_dqs_calibration(&dhcom_ddr_info);

I also observed mmdc_do_dqs_calibration() failures and after applying this patch from Eric they were gone:
https://lists.denx.de/pipermail/u-boot/2016-November/271596.html

Does this help to solve the mmdc_do_dqs_calibration() on your case too?

author
#2 lore raw

PATCH 1/1 ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK

Quoted 1 line · Fabio Estevam

Hi Marek,

Hi!

Quoted 25 lines · Marek Vasut
Quoted 13 lines

The DDR DRAM calibration doesn't work on T-topology sometimes, so disable it.

Signed-off-by Marek Vasut <[email protected]>
Cc Stefano Babic <[email protected]>
---
 board/dhelectronics/dh_imx6/dh_imx6_spl.c | 4 ----
 1 file changed, 4 deletions(-)
board/dhelectronics/dh_imx6/dh_imx6_spl.c +0 -0
index bb98f39f02..57ae7f15ce 100644

board/dhelectronics/dh_imx6/dh_imx6_spl.c void board_init_f(ulong dummy) · line 392

Quoted 6 lines
board/dhelectronics/dh_imx6/dh_imx6_spl.c +0 -3
@@ -387,10 +387,6 @@ void board_init_f(ulong dummy)
                                  &dhcom6sdl_grp_ioregs);
        mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr);
 
-       /* Perform DDR DRAM calibration */
-       udelay(100);
-       mmdc_do_dqs_calibration(&dhcom_ddr_info);

I also observed mmdc_do_dqs_calibration() failures and after applying this patch from Eric they were gone:
https://lists.denx.de/pipermail/u-boot/2016-November/271596.html

Quoted 1 line

Does this help to solve the mmdc_do_dqs_calibration() on your case too?

Nope, I'm not getting calibration failures, I'm getting bitflips at runtime IFF I use the calibration. The calibration itself passes just fine.

Signature · 2 lines
Best regards,
Marek Vasut
#3 lore raw

PATCH 1/1 ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK

In reply to Marek Vasut
Quoted 14 lines · Marek Vasut

The DDR DRAM calibration doesn't work on T-topology sometimes, so disable it.

Signed-off-by Marek Vasut <[email protected]>
Cc Stefano Babic <[email protected]>
---
 board/dhelectronics/dh_imx6/dh_imx6_spl.c | 4 ----
 1 file changed, 4 deletions(-)
board/dhelectronics/dh_imx6/dh_imx6_spl.c +0 -0
index bb98f39f02..57ae7f15ce 100644

board/dhelectronics/dh_imx6/dh_imx6_spl.c void board_init_f(ulong dummy) · line 392

Quoted 10 lines
board/dhelectronics/dh_imx6/dh_imx6_spl.c +0 -4
@@ -387,10 +387,6 @@ void board_init_f(ulong dummy)
 				  &dhcom6sdl_grp_ioregs);
 	mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr);
 
-	/* Perform DDR DRAM calibration */
-	udelay(100);
-	mmdc_do_dqs_calibration(&dhcom_ddr_info);
-
 	/* Clear the BSS. */
 	memset(__bss_start, 0, __bss_end - __bss_start);

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic

Signature · 5 lines
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