Remove assert()

index 661bc8b..b1b6725 100644
@@ -173,7 +173,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM

index 7e805ec..f9d8cc6 100644
@@ -117,7 +117,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000
 #define CONFIG_SYS_MEMTEST_END		0x00400000
-#define CONFIG_PANIC_HANG
 
 /* DDR Setup */
 #define CONFIG_DDR_SPD

index 3319a6f..ad339f1 100644
@@ -69,7 +69,6 @@
 
 #define CONFIG_SYS_MEMTEST_START 0x00010000	/* skip exception vectors */
 #define CONFIG_SYS_MEMTEST_END   0x1f000000	/* skip u-boot at top of RAM */
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  * Config the L2 Cache as L2 SRAM

index 2aea892..8b8e1f5 100644
@@ -46,7 +46,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR

index b277cdb..634a9e1 100644
@@ -58,7 +58,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x7fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  * Config the L2 Cache as L2 SRAM

index cbc15ae..d50035d 100644
@@ -215,7 +215,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG		/* do not reset board on panic */
 
 /* DDR Setup */
 #define CONFIG_SYS_DDR_RAW_TIMING

index 1b78a4f..17ae6cf 100644
@@ -52,8 +52,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_MEMTEST_START	0x01000000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x02000000
 
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
-
 /* Implement conversion of addresses in the LBC */
 #define CONFIG_SYS_LBC_LBCR		0x00000000
 #define CONFIG_SYS_LBC_LCRR		LCRR_CLKDIV_8

index 6008237..7e3a9f1 100644
@@ -116,7 +116,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM

index 259e8a0..30632ca 100644
@@ -196,7 +196,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM

index 7dee2f0..791c6ef 100644
@@ -219,7 +219,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM

index c694e50..4e75a3f 100644
@@ -127,7 +127,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM

index 2dbeffd..27a1439 100644
@@ -226,7 +226,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM

index 625130a..ad192fe 100644
@@ -96,7 +96,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM

index 902abc4..a526f83 100644
@@ -138,7 +138,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR

index 5644a61..f75274e 100644
@@ -21,7 +21,6 @@
 #define CONFIG_SKIP_TRUNOFF_WATCHDOG
 
 #define CONFIG_CMDLINE_EDITING
-#define CONFIG_PANIC_HANG
 
 #define CONFIG_ARCH_MAP_SYSMEM
 

index 0dbf149..a463235 100644
@@ -128,7 +128,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM

index 1b20d85..685bff1 100644
@@ -89,7 +89,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM

index d2fa50a..e73d988 100644
@@ -109,7 +109,6 @@
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS		64	/* max command args */
 
-#define CONFIG_PANIC_HANG
 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
 
 #include <asm/arch/soc.h>

index 6b71d47..e543903 100644
@@ -228,8 +228,6 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS		64	/* max command args */
 
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
-
 #ifdef CONFIG_SPL
 #define CONFIG_SPL_BSS_START_ADDR      0x80100000
 #define CONFIG_SPL_BSS_MAX_SIZE                0x00100000

index f897869..ea74f4a 100644
@@ -221,8 +221,6 @@ unsigned long long get_qixis_addr(void);
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_MAXARGS		64	/* max command args */
 
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
-
 #define CONFIG_SPL_BSS_START_ADDR	0x80100000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x00100000
 #define CONFIG_SPL_FRAMEWORK

index 1b665b2..ac2921a 100644
@@ -272,7 +272,6 @@
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR

index e969204..9792ba3 100644
@@ -71,7 +71,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x1fffffff
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR

index eb4cfae..8b78f08 100644
@@ -31,7 +31,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /* Needed to fill the ccsrbar pointer */
 

index 4938f43..47b78a2 100644
@@ -54,7 +54,6 @@
 #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
 #define CONFIG_SYS_MEMTEST_END		0x00400000
 #define CONFIG_SYS_ALT_MEMTEST
-#define CONFIG_PANIC_HANG	/* do not reset board on panic */
 
 /*
  *  Config the L3 Cache as L3 SRAM

index d9ab91c..f892a57 100644
@@ -90,7 +90,6 @@
 
 
 /* hang() the board on panic() */
-#define CONFIG_PANIC_HANG
 
 /* environment placement (for NAND), is different for FLASHCARD but does not
  * harm there */

index 453f3db..12cbe9b 100644
@@ -218,8 +218,6 @@
 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
 #define CONFIG_SYS_MEM_TOP_HIDE		64
 
-#define CONFIG_PANIC_HANG
-
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE)
 
 /* only for SPL */

index beedc9e..4326984 100644
@@ -487,7 +487,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_LOAD_ADDR	0x2000000	/* default load address */
 #define CONFIG_CMDLINE_EDITING	1		/* Command-line editing */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 

index f589d1d..5a56162 100644
@@ -291,7 +291,6 @@
 #define CONFIG_CMDLINE_EDITING	1		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE	1		/* add autocompletion support */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 #define CONFIG_INTERRUPTS		/* enable pci, srio, ddr interrupts */

index d217eb3..b262237 100644
@@ -341,7 +341,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_CMDLINE_EDITING	1		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE	1		/* add autocompletion support */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 

index 6c0981b..624e9a8 100644
@@ -339,7 +339,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_CMDLINE_EDITING	1		/* add command line history	*/
 #define CONFIG_AUTO_COMPLETE	1		/* add autocompletion support */
 #define CONFIG_LOADADDR		0x1000000	/* default location for tftp and bootm */
-#define CONFIG_PANIC_HANG			/* do not reset board on panic */
 #define CONFIG_PREBOOT				/* enable preboot variable */
 #define CONFIG_INTEGRITY			/* support booting INTEGRITY OS */
 

index 3050f17..3119f00 100644
@@ -130,10 +130,6 @@
 #define CONFIG_MX_CYCLIC
 #define CONFIG_SHOW_BOOT_PROGRESS
 
-#ifdef DEBUG
-#define CONFIG_PANIC_HANG		1	/* Require manual reboot */
-#endif
-
 
 /*=========================================*/
 /* FPGA Registers (board info and control) */

index f07bb71..ac1c7de 100644
@@ -6,17 +6,24 @@
 #include <linux/compiler.h>
 #include <linux/printk.h>
 
+#ifdef CONFIG_ENABLE_BUG_CHECKS
 #define BUG() do { \
 	printk("BUG at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
 	panic("BUG!"); \
 } while (0)
+#define __WARN() 	\
+	printk("WARNING at %s:%d/%s()!\n", __FILE__, __LINE__, __func__)
+#else
+#define BUG()
+#define __WARN()
+#endif
 
 #define BUG_ON(condition) do { if (unlikely(condition)) BUG(); } while (0)
 
 #define WARN_ON(condition) ({						\
 	int __ret_warn_on = !!(condition);				\
 	if (unlikely(__ret_warn_on))					\
-		printk("WARNING at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
+		__WARN();						\
 	unlikely(__ret_warn_on);					\
 })
 

index 3d31f9d..a146103 100644
@@ -1405,8 +1405,8 @@ static int clock_calc_best_scalar(unsigned int main_scaler_bits,
 	debug("Input Rate is %u, Target is %u, Cap is %u\n", input_rate,
 			target_rate, cap);
 
-	assert(best_fine_scalar != NULL);
-	assert(main_scaler_bits <= fine_scalar_bits);
+	BUG_ON(!best_fine_scalar);
+	BUG_ON(main_scaler_bits > fine_scalar_bits);
 
 	*best_fine_scalar = 1;
 

index dc58b30..47cf867 100644
@@ -74,7 +74,7 @@ static struct clk_pll *get_pll(enum clock_id clkid)
 	struct clk_rst_ctlr *clkrst =
 			(struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
 
-	assert(clock_id_is_pll(clkid));
+	BUG_ON(!clock_id_is_pll(clkid));
 	if (clkid >= (enum clock_id)TEGRA_CLK_PLLS) {
 		debug("%s: Invalid PLL %d\n", __func__, clkid);
 		return NULL;

@@ -94,7 +94,7 @@ int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn,
 	struct clk_pll_info *pllinfo = &tegra_pll_info_table[clkid];
 	u32 data;
 
-	assert(clkid != CLOCK_ID_USB);
+	BUG_ON(clkid == CLOCK_ID_USB);
 
 	/* Safety check, adds to code size but is small */
 	if (!clock_id_is_pll(clkid) || clkid == CLOCK_ID_USB)

@@ -454,7 +454,7 @@ unsigned clock_adjust_periph_pll_div(enum periph_id periph_id,
 	if (extra_div)
 		*extra_div = xdiv;
 
-	assert(divider >= 0);
+	BUG_ON(0 > divider);
 	if (adjust_periph_pll(periph_id, source, mux_bits, divider))
 		return -1U;
 	debug("periph %d, rate=%d, reg=%p = %x\n", periph_id, rate,

@@ -515,7 +515,7 @@ void reset_cmplx_set_enable(int cpu, int which, int reset)
 	u32 mask;
 
 	/* Form the mask, which depends on the cpu chosen (2 or 4) */
-	assert(cpu >= 0 && cpu < MAX_NUM_CPU);
+	BUG_ON(!(cpu >= 0 && cpu < MAX_NUM_CPU));
 	mask = which << cpu;
 
 	/* either enable or disable those reset for that CPU */

@@ -665,7 +665,7 @@ int clock_decode_periph_id(struct udevice *dev)
 	if (err)
 		return -1;
 	id = clk_id_to_periph_id(cell[1]);
-	assert(clock_periph_id_isvalid(id));
+	BUG_ON(!clock_periph_id_isvalid(id));
 	return id;
 }
 #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */

206 lines not on this page · raw message

index 177ab6b..0f91141 100644
@@ -486,9 +486,9 @@ u32 *get_periph_source_reg(enum periph_id periph_id)
 	if (periph_id == PERIPH_ID_CSI)
 		return &clkrst->crc_clk_src[PERIPH_ID_CSI+1];
 
-	assert(periph_id >= PERIPH_ID_FIRST && periph_id < PERIPH_ID_COUNT);
+	BUG_ON(!(periph_id >= PERIPH_ID_FIRST && periph_id < PERIPH_ID_COUNT));
 	internal_id = periph_id_to_internal_id[periph_id];
-	assert(internal_id != -1);
+	BUG_ON(internal_id == -1);
 	if (internal_id >= PERIPHC_VW_FIRST) {
 		internal_id -= PERIPHC_VW_FIRST;
 		return &clkrst->crc_clk_src_vw[internal_id];

@@ -560,7 +560,7 @@ int get_periph_clock_source(enum periph_id periph_id,
 	int mux, err;
 
 	err = get_periph_clock_info(periph_id, mux_bits, divider_bits, &type);
-	assert(!err);
+	BUG_ON(err);
 
 	for (mux = 0; mux < CLOCK_MAX_MUX; mux++)
 		if (clock_source[type][mux] == parent)

@@ -580,7 +580,7 @@ void clock_set_enable(enum periph_id periph_id, int enable)
 	u32 reg;
 
 	/* Enable/disable the clock to this peripheral */
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	if ((int)periph_id < (int)PERIPH_ID_VW_FIRST)
 		clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)];
 	else

@@ -601,7 +601,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
 	u32 reg;
 
 	/* Enable/disable reset to the peripheral */
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	if (periph_id < PERIPH_ID_VW_FIRST)
 		reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)];
 	else

index 5ae718b..2108273 100644
@@ -628,9 +628,9 @@ u32 *get_periph_source_reg(enum periph_id periph_id)
 	if (periph_id == PERIPH_ID_CSI)
 		return &clkrst->crc_clk_src[PERIPH_ID_CSI+1];
 
-	assert(periph_id >= PERIPH_ID_FIRST && periph_id < PERIPH_ID_COUNT);
+	BUG_ON(!(periph_id >= PERIPH_ID_FIRST && periph_id < PERIPH_ID_COUNT));
 	internal_id = periph_id_to_internal_id[periph_id];
-	assert(internal_id != -1);
+	BUG_ON(internal_id == -1);
 	if (internal_id >= PERIPHC_X_FIRST) {
 		internal_id -= PERIPHC_X_FIRST;
 		return &clkrst->crc_clk_src_x[internal_id];

@@ -706,7 +706,7 @@ int get_periph_clock_source(enum periph_id periph_id,
 	int mux, err;
 
 	err = get_periph_clock_info(periph_id, mux_bits, divider_bits, &type);
-	assert(!err);
+	BUG_ON(err);
 
 	for (mux = 0; mux < CLOCK_MAX_MUX; mux++)
 		if (clock_source[type][mux] == parent)

@@ -726,7 +726,7 @@ void clock_set_enable(enum periph_id periph_id, int enable)
 	u32 reg;
 
 	/* Enable/disable the clock to this peripheral */
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	if ((int)periph_id < (int)PERIPH_ID_VW_FIRST)
 		clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)];
 	else if ((int)periph_id < PERIPH_ID_X_FIRST)

@@ -749,7 +749,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
 	u32 reg;
 
 	/* Enable/disable reset to the peripheral */
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	if (periph_id < PERIPH_ID_VW_FIRST)
 		reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)];
 	else if ((int)periph_id < PERIPH_ID_X_FIRST)

index 81fb1d8..903900f 100644
@@ -407,9 +407,9 @@ u32 *get_periph_source_reg(enum periph_id periph_id)
 			(struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE;
 	enum periphc_internal_id internal_id;
 
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	internal_id = periph_id_to_internal_id[periph_id];
-	assert(internal_id != -1);
+	BUG_ON(internal_id == -1);
 	return &clkrst->crc_clk_src[internal_id];
 }
 

@@ -483,7 +483,7 @@ int get_periph_clock_source(enum periph_id periph_id,
 	int mux, err;
 
 	err = get_periph_clock_info(periph_id, mux_bits, divider_bits, &type);
-	assert(!err);
+	BUG_ON(err);
 
 	for (mux = 0; mux < CLOCK_MAX_MUX; mux++)
 		if (clock_source[type][mux] == parent)

@@ -494,8 +494,8 @@ int get_periph_clock_source(enum periph_id periph_id,
 	 * which is not in our table. If not, then they are asking for a
 	 * source which this peripheral can't access through its mux.
 	 */
-	assert(type == CLOCK_TYPE_PCXTS);
-	assert(parent == CLOCK_ID_SFROM32KHZ);
+	BUG_ON(type != CLOCK_TYPE_PCXTS);
+	BUG_ON(parent != CLOCK_ID_SFROM32KHZ);
 	if (type == CLOCK_TYPE_PCXTS && parent == CLOCK_ID_SFROM32KHZ)
 		return 4;	/* mux value for this clock */
 

@@ -513,7 +513,7 @@ void clock_set_enable(enum periph_id periph_id, int enable)
 	u32 reg;
 
 	/* Enable/disable the clock to this peripheral */
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	reg = readl(clk);
 	if (enable)
 		reg |= PERIPH_MASK(periph_id);

@@ -530,7 +530,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
 	u32 reg;
 
 	/* Enable/disable reset to the peripheral */
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	reg = readl(reset);
 	if (enable)
 		reg |= PERIPH_MASK(periph_id);

index c8bb946..463e91a 100644
@@ -707,9 +707,9 @@ u32 *get_periph_source_reg(enum periph_id periph_id)
 	if (periph_id == PERIPH_ID_CSI)
 		return &clkrst->crc_clk_src[PERIPH_ID_CSI+1];
 
-	assert(periph_id >= PERIPH_ID_FIRST && periph_id < PERIPH_ID_COUNT);
+	BUG_ON(!(periph_id >= PERIPH_ID_FIRST && periph_id < PERIPH_ID_COUNT));
 	internal_id = INTERNAL_ID(periph_id_to_internal_id[periph_id]);
-	assert(internal_id != -1);
+	BUG_ON(internal_id == -1);
 
 	if (internal_id < PERIPHC_VW_FIRST)
 		/* L, H, U */

@@ -796,7 +796,7 @@ int get_periph_clock_source(enum periph_id periph_id,
 	int mux, err;
 
 	err = get_periph_clock_info(periph_id, mux_bits, divider_bits, &type);
-	assert(!err);
+	BUG_ON(err);
 
 	for (mux = 0; mux < CLOCK_MAX_MUX; mux++)
 		if (clock_source[type][mux] == parent)

@@ -816,7 +816,7 @@ void clock_set_enable(enum periph_id periph_id, int enable)
 	u32 reg;
 
 	/* Enable/disable the clock to this peripheral */
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	if ((int)periph_id < (int)PERIPH_ID_VW_FIRST)
 		clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)];
 	else if ((int)periph_id < (int)PERIPH_ID_X_FIRST)

@@ -842,7 +842,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
 	u32 reg;
 
 	/* Enable/disable reset to the peripheral */
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	if (periph_id < PERIPH_ID_VW_FIRST)
 		reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)];
 	else if ((int)periph_id < (int)PERIPH_ID_X_FIRST)

index 282f34f..b3ec1de 100644
@@ -466,9 +466,9 @@ u32 *get_periph_source_reg(enum periph_id periph_id)
 	if (periph_id == PERIPH_ID_CSI)
 		return &clkrst->crc_clk_src[PERIPH_ID_CSI+1];
 
-	assert(periph_id >= PERIPH_ID_FIRST && periph_id < PERIPH_ID_COUNT);
+	BUG_ON(!(periph_id >= PERIPH_ID_FIRST && periph_id < PERIPH_ID_COUNT));
 	internal_id = periph_id_to_internal_id[periph_id];
-	assert(internal_id != -1);
+	BUG_ON(internal_id == -1);
 	if (internal_id >= PERIPHC_VW_FIRST) {
 		internal_id -= PERIPHC_VW_FIRST;
 		return &clkrst->crc_clk_src_vw[internal_id];

@@ -540,7 +540,7 @@ int get_periph_clock_source(enum periph_id periph_id,
 	int mux, err;
 
 	err = get_periph_clock_info(periph_id, mux_bits, divider_bits, &type);
-	assert(!err);
+	BUG_ON(err);
 
 	for (mux = 0; mux < CLOCK_MAX_MUX; mux++)
 		if (clock_source[type][mux] == parent)

@@ -560,7 +560,7 @@ void clock_set_enable(enum periph_id periph_id, int enable)
 	u32 reg;
 
 	/* Enable/disable the clock to this peripheral */
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	if ((int)periph_id < (int)PERIPH_ID_VW_FIRST)
 		clk = &clkrst->crc_clk_out_enb[PERIPH_REG(periph_id)];
 	else

@@ -581,7 +581,7 @@ void reset_set_enable(enum periph_id periph_id, int enable)
 	u32 reg;
 
 	/* Enable/disable reset to the peripheral */
-	assert(clock_periph_id_isvalid(periph_id));
+	BUG_ON(!clock_periph_id_isvalid(periph_id));
 	if (periph_id < PERIPH_ID_VW_FIRST)
 		reset = &clkrst->crc_rst_dev[PERIPH_REG(periph_id)];
 	else

index 0758448..c8665d7 100644
@@ -333,7 +333,7 @@ int state_setprop(int node, const char *prop_name, const void *data, int size)
 
 struct sandbox_state *state_get_current(void)
 {
-	assert(state);
+	BUG_ON(!state);
 	return state;
 }
 

@@ -367,7 +367,7 @@ int state_init(void)
 
 	state->ram_size = CONFIG_SYS_SDRAM_SIZE;
 	state->ram_buf = os_malloc(state->ram_size);
-	assert(state->ram_buf);
+	BUG_ON(!state->ram_buf);
 
 	state_reset_for_test(state);
 	/*

index f1a249a..0e0f4f2 100644
@@ -42,7 +42,7 @@ ulong mrc_common_board_get_usable_ram_top(ulong total_size)
 	}
 
 	/* If no suitable area was found, return an error. */
-	assert(largest);
+	BUG_ON(!largest);
 	if (!largest || largest->size < (2 << 20))
 		panic("No available memory found for relocation");
 

index b1746fa..d98dac3 100644
@@ -55,7 +55,7 @@ ulong board_get_usable_ram_top(ulong total_size)
 	}
 
 	/* If no suitable area was found, return an error. */
-	assert(largest);
+	BUG_ON(!largest);
 	if (!largest || (largest->num_pages << EFI_PAGE_SHIFT) < (2 << 20))
 		goto err;
 

index e0c49be..400b96b 100644
@@ -91,7 +91,7 @@ void fsp_continue(u32 status, void *hob_list)
 {
 	post_code(POST_MRC);
 
-	assert(status == 0);
+	BUG_ON(status);
 
 	/* The boot loader main function entry */
 	fsp_init_done(hob_list);

@@ -126,7 +126,7 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)
 			fsp_hdr->cfg_region_off);
 
 	/* Verify the VPD data region is valid */
-	assert(fsp_vpd->sign == VPD_IMAGE_ID);
+	BUG_ON(fsp_vpd->sign != VPD_IMAGE_ID);
 
 	fsp_upd = &config_data.fsp_upd;
 

@@ -135,7 +135,7 @@ void fsp_init(u32 stack_top, u32 boot_mode, void *nvs_buf)
 	       sizeof(struct upd_region));
 
 	/* Verify the UPD data region is valid */
-	assert(fsp_upd->terminator == UPD_TERMINATOR);
+	BUG_ON(fsp_upd->terminator != UPD_TERMINATOR);
 #endif
 
 	memset(&rt_buf, 0, sizeof(struct fspinit_rtbuf));

index c3c709e..6839bae 100644
@@ -141,8 +141,7 @@ static void x86_phys_memset_page(phys_addr_t map_addr, uintptr_t offset, int c,
 	const uintptr_t window = LARGE_PAGE_SIZE;
 
 	/* Make sure the window is below U-Boot. */
-	assert(window + LARGE_PAGE_SIZE <
-	       gd->relocaddr - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_STACK_SIZE);
+	BUG_ON(window + LARGE_PAGE_SIZE >= gd->relocaddr - CONFIG_SYS_MALLOC_LEN - CONFIG_SYS_STACK_SIZE);
 	/* Map the page into the window and then memset the appropriate part. */
 	x86_phys_map_page(window, map_addr, 1);
 	memset((void *)(window + offset), c, size);

@@ -165,7 +164,7 @@ phys_addr_t arch_phys_memset(phys_addr_t start, int c, phys_size_t size)
 		phys_size_t low_size = min(max_addr + 1 - start, size);
 		void *start_ptr = (void *)(uintptr_t)start;
 
-		assert(((phys_addr_t)(uintptr_t)start) == start);
+		BUG_ON(((phys_addr_t)(uintptr_t)start) != start);
 		memset(start_ptr, c, low_size);
 		start += low_size;
 		size -= low_size;

index cf5023c..fde83aa 100644
@@ -109,7 +109,7 @@ static int pci_map_region(void *fdt, int pci_node, int range_id,
 		return -1;
 
 	/* Map virtual memory for range */
-	assert(!tlb_map_range(map_addr, addr, size, TLB_MAP_IO));
+	BUG_ON(tlb_map_range(map_addr, addr, size, TLB_MAP_IO));
 	*pmap_addr = map_addr + size;
 
 	if (pvaddr)

@@ -286,15 +286,13 @@ void init_tlbs(void)
 	init_used_tlb_cams();
 
 	/* Create a dynamic AS=0 CCSRBAR mapping */
-	assert(!tlb_map_range(CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
-			      1024 * 1024, TLB_MAP_IO));
+	BUG_ON(tlb_map_range(CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS, 1024 * 1024, TLB_MAP_IO));
 
 	/* Create a RAM map that spans all accessible RAM */
 	setup_ddr_tlbs(ram_size >> 20);
 
 	/* Create a map for the TLB */
-	assert(!tlb_map_range((ulong)get_fdt_virt(), get_fdt_phys(),
-			      1024 * 1024, TLB_MAP_RAM));
+	BUG_ON(tlb_map_range((ulong)get_fdt_virt(), get_fdt_phys(), 1024 * 1024, TLB_MAP_RAM));
 }
 
 void init_laws(void)

index 478bc11..d77e8fd 100644
@@ -147,7 +147,7 @@ static unsigned long do_bootefi_exec(void *efi, void *fdt,
 		memdp = efi_dp_from_mem(0, 0, 0);
 		device_path = image_path = memdp;
 	} else {
-		assert(device_path && image_path);
+		BUG_ON(!(device_path && image_path));
 	}
 
 	/* Initialize and populate EFI object list */

index 3275eb9..d1d358d 100644
@@ -852,7 +852,7 @@ static int device_parse(const char *const mtd_dev, const char **ret, struct mtd_
 
 	debug("===device_parse===\n");
 
-	assert(retdev);
+	BUG_ON(!retdev);
 	*retdev = NULL;
 
 	if (ret)

index 37ad2ff..f9fc558 100644
@@ -180,13 +180,13 @@ static int test_fast_enable(void)
 		TPM_CHECK(tpm_get_flags(&disable, &deactivated, NULL));
 		printf("\tdisable is %d, deactivated is %d\n", disable,
 		       deactivated);
-		assert(disable == 1 && deactivated == 1);
+		BUG_ON(!(disable == 1 && deactivated == 1));
 		TPM_CHECK(tpm_physical_enable());
 		TPM_CHECK(tpm_physical_set_deactivated(0));
 		TPM_CHECK(tpm_get_flags(&disable, &deactivated, NULL));
 		printf("\tdisable is %d, deactivated is %d\n", disable,
 		       deactivated);
-		assert(disable == 0 && deactivated == 0);
+		BUG_ON(!(disable == 0 && deactivated == 0));
 	}
 	printf("\tdone\n");
 	return 0;

@@ -213,22 +213,22 @@ static int test_global_lock(void)
 	/* Verifies that write to index0 fails */
 	x = 1;
 	result = tpm_nv_write_value(INDEX0, (uint8_t *)&x, sizeof(x));
-	assert(result == TPM_AREA_LOCKED);
+	BUG_ON(result != TPM_AREA_LOCKED);
 	TPM_CHECK(tpm_nv_read_value(INDEX0, (uint8_t *)&x, sizeof(x)));
-	assert(x == 0);
+	BUG_ON(x);
 	/* Verifies that write to index1 is still possible */
 	x = 2;
 	TPM_CHECK(tpm_nv_write_value(INDEX1, (uint8_t *)&x, sizeof(x)));
 	TPM_CHECK(tpm_nv_read_value(INDEX1, (uint8_t *)&x, sizeof(x)));
-	assert(x == 2);
+	BUG_ON(x != 2);
 	/* Turns off PP */
 	tpm_tsc_physical_presence(PHYS_PRESENCE);
 	/* Verifies that write to index1 fails */
 	x = 3;
 	result = tpm_nv_write_value(INDEX1, (uint8_t *)&x, sizeof(x));
-	assert(result == TPM_BAD_PRESENCE);
+	BUG_ON(result != TPM_BAD_PRESENCE);
 	TPM_CHECK(tpm_nv_read_value(INDEX1, (uint8_t *)&x, sizeof(x)));
-	assert(x == 2);
+	BUG_ON(x != 2);
 	printf("\tdone\n");
 	return 0;
 }

@@ -325,7 +325,7 @@ static int test_redefine_unowned(void)
 	TPM_CHECK(TlclStartupIfNeeded());
 	TPM_CHECK(tpm_self_test_full());
 	TPM_CHECK(tpm_tsc_physical_presence(PRESENCE));
-	assert(!tpm_is_owned());
+	BUG_ON(tpm_is_owned());
 
 	/* Ensures spaces exist. */
 	TPM_CHECK(tpm_nv_read_value(INDEX0, (uint8_t *)&x, sizeof(x)));

@@ -344,7 +344,7 @@ static int test_redefine_unowned(void)
 
 	/* Verifies that index0 cannot be redefined */
 	result = tpm_nv_define_space(INDEX0, perm, sizeof(uint32_t));
-	assert(result == TPM_AREA_LOCKED);
+	BUG_ON(result != TPM_AREA_LOCKED);
 
 	/* Checks that index1 can */
 	TPM_CHECK(tpm_nv_define_space(INDEX1, perm, 2 * sizeof(uint32_t)));

@@ -355,9 +355,9 @@ static int test_redefine_unowned(void)
 
 	/* Verifies that neither index0 nor index1 can be redefined */
 	result = tpm_nv_define_space(INDEX0, perm, sizeof(uint32_t));
-	assert(result == TPM_BAD_PRESENCE);
+	BUG_ON(result != TPM_BAD_PRESENCE);
 	result = tpm_nv_define_space(INDEX1, perm, sizeof(uint32_t));
-	assert(result == TPM_BAD_PRESENCE);
+	BUG_ON(result != TPM_BAD_PRESENCE);
 
 	printf("done\n");
 	return 0;

@@ -376,9 +376,9 @@ static int test_space_perm(void)
 	TPM_CHECK(tpm_continue_self_test());
 	TPM_CHECK(tpm_tsc_physical_presence(PRESENCE));
 	TPM_CHECK(tpm_get_permissions(INDEX0, &perm));
-	assert((perm & PERMPPGL) == PERMPPGL);
+	BUG_ON((perm & PERMPPGL) != PERMPPGL);
 	TPM_CHECK(tpm_get_permissions(INDEX1, &perm));
-	assert((perm & PERMPP) == PERMPP);
+	BUG_ON((perm & PERMPP) != PERMPP);
 	printf("done\n");
 	return 0;
 }

@@ -469,7 +469,7 @@ static int test_write_limit(void)
 		case TPM_SUCCESS:
 			break;
 		case TPM_MAXNVWRITES:
-			assert(i >= TPM_MAX_NV_WRITES_NOOWNER);
+			BUG_ON(TPM_MAX_NV_WRITES_NOOWNER > i);
 		default:
 			pr_err("\tunexpected error code %d (0x%x)\n",
 			      result, result);

216 lines not on this page · raw message

index 6896dcb..6a25844 100644
@@ -1107,7 +1107,7 @@ static struct of_bus *of_match_bus(const void *blob, int parentoffset)
 	 * in the of_busses array or something equally catastrophic has
 	 * gone wrong.
 	 */
-	assert(0);
+	BUG();
 	return NULL;
 }
 

index e5186d7..fe42a95 100644
@@ -248,37 +248,37 @@ int main()
 
 	ret = hwconfig_arg("key1", &len);
 	printf("%zd %.*s\n", len, (int)len, ret);
-	assert(len == 29);
-	assert(hwconfig_arg_cmp("key1", "subkey1=value1,subkey2=value2"));
-	assert(!strncmp(ret, "subkey1=value1,subkey2=value2", len));
+	BUG_ON(len != 29);
+	BUG_ON(!hwconfig_arg_cmp("key1", "subkey1=value1,subkey2=value2"));
+	BUG_ON(strncmp(ret, "subkey1=value1,subkey2=value2", len));
 
 	ret = hwconfig_subarg("key1", "subkey1", &len);
 	printf("%zd %.*s\n", len, (int)len, ret);
-	assert(len == 6);
-	assert(hwconfig_subarg_cmp("key1", "subkey1", "value1"));
-	assert(!strncmp(ret, "value1", len));
+	BUG_ON(len != 6);
+	BUG_ON(!hwconfig_subarg_cmp("key1", "subkey1", "value1"));
+	BUG_ON(strncmp(ret, "value1", len));
 
 	ret = hwconfig_subarg("key1", "subkey2", &len);
 	printf("%zd %.*s\n", len, (int)len, ret);
-	assert(len == 6);
-	assert(hwconfig_subarg_cmp("key1", "subkey2", "value2"));
-	assert(!strncmp(ret, "value2", len));
+	BUG_ON(len != 6);
+	BUG_ON(!hwconfig_subarg_cmp("key1", "subkey2", "value2"));
+	BUG_ON(strncmp(ret, "value2", len));
 
 	ret = hwconfig_arg("key2", &len);
 	printf("%zd %.*s\n", len, (int)len, ret);
-	assert(len == 6);
-	assert(hwconfig_arg_cmp("key2", "value3"));
-	assert(!strncmp(ret, "value3", len));
+	BUG_ON(len != 6);
+	BUG_ON(!hwconfig_arg_cmp("key2", "value3"));
+	BUG_ON(strncmp(ret, "value3", len));
 
-	assert(hwconfig("key3"));
-	assert(hwconfig_arg("key4", &len) == NULL);
-	assert(hwconfig_arg("bogus", &len) == NULL);
+	BUG_ON(!hwconfig("key3"));
+	BUG_ON(hwconfig_arg("key4", &len));
+	BUG_ON(hwconfig_arg("bogus", &len));
 
 	unenv_set("hwconfig");
 
-	assert(hwconfig(NULL) == 0);
-	assert(hwconfig("") == 0);
-	assert(hwconfig("key3") == 0);
+	BUG_ON(hwconfig(NULL));
+	BUG_ON(hwconfig(""));
+	BUG_ON(hwconfig("key3"));
 
 	return 0;
 }

index 83ba133..52af798 100644
@@ -64,7 +64,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 
 	debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
 
-	assert(clk);
+	BUG_ON(!clk);
 	clk->dev = NULL;
 
 	ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,

index 280ebb9..c719a12 100644
@@ -58,8 +58,7 @@ static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id,
 		 vco=%u Hz, output=%u Hz\n",
 			pll, div->fbdiv, div->refdiv, div->postdiv1,
 			div->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+	BUG_ON(!(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ));
 
 	/* use integer mode */
 	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);

@@ -100,10 +99,10 @@ static void rkclk_init(struct rk3036_cru *cru)
 	 * core hz : apll = 1:1
 	 */
 	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
+	BUG_ON(!((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7));
 
 	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
+	BUG_ON(!((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf));
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,

@@ -120,13 +119,13 @@ static void rkclk_init(struct rk3036_cru *cru)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	BUG_ON(!((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f));
 
 	pclk_div = GPLL_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
+	BUG_ON(!((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7));
 
 	hclk_div = GPLL_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
+	BUG_ON(!((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3));
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,

@@ -143,15 +142,13 @@ static void rkclk_init(struct rk3036_cru *cru)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	BUG_ON(!((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f));
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
+	BUG_ON(!((1 << hclk_div) * PERI_HCLK_HZ == PERI_ACLK_HZ && (hclk_div < 0x4)));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && pclk_div < 0x8);
+	BUG_ON(!((1 << pclk_div) * PERI_PCLK_HZ == PERI_ACLK_HZ && pclk_div < 0x8));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],
 		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |

@@ -251,7 +248,7 @@ static ulong rockchip_mmc_set_clk(struct rk3036_cru *cru, uint clk_general_rate,
 
 	if (src_clk_div > 128) {
 		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
-		assert(src_clk_div - 1 < 128);
+		BUG_ON(src_clk_div - 1 >= 128);
 		mux = EMMC_SEL_24M;
 	} else {
 		mux = EMMC_SEL_GPLL;

index 132d50d..1a0d7fc 100644
@@ -51,8 +51,7 @@ static int rkclk_set_pll(struct rk3128_cru *cru, enum rk_clk_id clk_id,
 	debug("PLL at %p:fd=%d,rd=%d,pd1=%d,pd2=%d,vco=%uHz,output=%uHz\n",
 	      pll, div->fbdiv, div->refdiv, div->postdiv1,
 	      div->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+	BUG_ON(!(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ));
 
 	/* use integer mode */
 	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);

@@ -162,10 +161,10 @@ static void rkclk_init(struct rk3128_cru *cru)
 	 * core hz : apll = 1:1
 	 */
 	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
+	BUG_ON(!((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7));
 
 	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
+	BUG_ON(!((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf));
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,

@@ -182,13 +181,13 @@ static void rkclk_init(struct rk3128_cru *cru)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	BUG_ON(!((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f));
 
 	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7);
+	BUG_ON(!((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7));
 
 	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3);
+	BUG_ON(!((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3));
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,

@@ -205,15 +204,13 @@ static void rkclk_init(struct rk3128_cru *cru)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	BUG_ON(!((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f));
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
+	BUG_ON(!((1 << hclk_div) * PERI_HCLK_HZ == PERI_ACLK_HZ && (hclk_div < 0x4)));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && pclk_div < 0x8);
+	BUG_ON(!((1 << pclk_div) * PERI_PCLK_HZ == PERI_ACLK_HZ && pclk_div < 0x8));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],
 		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |

@@ -372,7 +369,7 @@ static ulong rk3128_peri_set_pclk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = PERI_ACLK_HZ / hz;
-	assert(src_clk_div - 1 < 4);
+	BUG_ON(src_clk_div - 1 >= 4);
 
 	switch (clk_id) {
 	case PCLK_I2C0:

@@ -407,7 +404,7 @@ static ulong rk3128_saradc_set_clk(struct rk3128_cru *cru, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
-	assert(src_clk_div < 128);
+	BUG_ON(src_clk_div >= 128);
 
 	rk_clrsetreg(&cru->cru_clksel_con[24],
 		     SARADC_DIV_CON_MASK,

@@ -422,7 +419,7 @@ static ulong rk3128_vop_set_clk(struct rk3128_cru *cru, ulong clk_id, uint hz)
 	struct pll_div cpll_config = {0};
 
 	src_clk_div = GPLL_HZ / hz;
-	assert(src_clk_div - 1 < 31);
+	BUG_ON(src_clk_div - 1 >= 31);
 
 	switch (clk_id) {
 	case ACLK_VIO0:

index fca6899..6a34459 100644
@@ -96,9 +96,7 @@ static int rkclk_set_pll(struct rk3188_cru *cru, enum rk_clk_id clk_id,
 
 	debug("PLL at %x: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n",
 	      (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ &&
-	       (div->no == 1 || !(div->no % 2)));
+	BUG_ON(!(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ && (div->no == 1 || !(div->no % 2))));
 
 	/* enter reset */
 	rk_setreg(&pll->con3, 1 << PLL_RESET_SHIFT);

@@ -295,7 +293,7 @@ static ulong rockchip_mmc_set_clk(struct rk3188_cru *cru, uint gclk_rate,
 	debug("%s: gclk_rate=%u\n", __func__, gclk_rate);
 	/* mmc clock defaulg div 2 internal, need provide double in cru */
 	src_clk_div = DIV_ROUND_UP(gclk_rate / 2, freq) - 1;
-	assert(src_clk_div <= 0x3f);
+	BUG_ON(src_clk_div > 0x3f);
 
 	switch (periph) {
 	case HCLK_EMMC:

@@ -350,16 +348,16 @@ static ulong rockchip_spi_set_clk(struct rk3188_cru *cru, uint gclk_rate,
 {
 	int src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1;
 
-	assert(src_clk_div < 128);
+	BUG_ON(src_clk_div >= 128);
 	switch (periph) {
 	case SCLK_SPI0:
-		assert(src_clk_div <= SPI0_DIV_MASK);
+		BUG_ON(src_clk_div > SPI0_DIV_MASK);
 		rk_clrsetreg(&cru->cru_clksel_con[25],
 			     SPI0_DIV_MASK << SPI0_DIV_SHIFT,
 			     src_clk_div << SPI0_DIV_SHIFT);
 		break;
 	case SCLK_SPI1:
-		assert(src_clk_div <= SPI1_DIV_MASK);
+		BUG_ON(src_clk_div > SPI1_DIV_MASK);
 		rk_clrsetreg(&cru->cru_clksel_con[25],
 			     SPI1_DIV_MASK << SPI1_DIV_SHIFT,
 			     src_clk_div << SPI1_DIV_SHIFT);

@@ -400,7 +398,7 @@ static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = DIV_ROUND_UP(GPLL_HZ, CPU_ACLK_HZ) - 1;
-	assert((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	BUG_ON(!((aclk_div + 1) * CPU_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f));
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     CPU_ACLK_PLL_MASK << CPU_ACLK_PLL_SHIFT |

@@ -409,11 +407,11 @@ static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 		     aclk_div << A9_CPU_DIV_SHIFT);
 
 	hclk_div = ilog2(CPU_ACLK_HZ / CPU_HCLK_HZ);
-	assert((1 << hclk_div) * CPU_HCLK_HZ == CPU_ACLK_HZ && hclk_div < 0x3);
+	BUG_ON(!((1 << hclk_div) * CPU_HCLK_HZ == CPU_ACLK_HZ && hclk_div < 0x3));
 	pclk_div = ilog2(CPU_ACLK_HZ / CPU_PCLK_HZ);
-	assert((1 << pclk_div) * CPU_PCLK_HZ == CPU_ACLK_HZ && pclk_div < 0x4);
+	BUG_ON(!((1 << pclk_div) * CPU_PCLK_HZ == CPU_ACLK_HZ && pclk_div < 0x4));
 	h2p_div = ilog2(CPU_HCLK_HZ / CPU_H2P_HZ);
-	assert((1 << h2p_div) * CPU_H2P_HZ == CPU_HCLK_HZ && pclk_div < 0x3);
+	BUG_ON(!((1 << h2p_div) * CPU_H2P_HZ == CPU_HCLK_HZ && pclk_div < 0x3));
 
 	rk_clrsetreg(&cru->cru_clksel_con[1],
 		     AHB2APB_DIV_MASK << AHB2APB_DIV_SHIFT |

@@ -428,15 +426,13 @@ static void rkclk_init(struct rk3188_cru *cru, struct rk3188_grf *grf,
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	BUG_ON(!((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f));
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
+	BUG_ON(!((1 << hclk_div) * PERI_HCLK_HZ == PERI_ACLK_HZ && (hclk_div < 0x4)));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && (pclk_div < 0x4));
+	BUG_ON(!((1 << pclk_div) * PERI_PCLK_HZ == PERI_ACLK_HZ && (pclk_div < 0x4)));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],
 		     PERI_PCLK_DIV_MASK << PERI_PCLK_DIV_SHIFT |

index ff52b55..300f7f8 100644
@@ -54,8 +54,7 @@ static int rkclk_set_pll(struct rk322x_cru *cru, enum rk_clk_id clk_id,
 	debug("PLL@%p: fb=%d, ref=%d, pst1=%d, pst2=%d, vco=%u Hz, output=%u Hz\n",
 	      pll, div->fbdiv, div->refdiv, div->postdiv1,
 	      div->postdiv2, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ);
+	BUG_ON(!(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ));
 
 	/* use integer mode */
 	rk_setreg(&pll->con1, 1 << PLL_DSMPD_SHIFT);

@@ -101,10 +100,10 @@ static void rkclk_init(struct rk322x_cru *cru)
 	 * core hz : apll = 1:1
 	 */
 	aclk_div = APLL_HZ / CORE_ACLK_HZ - 1;
-	assert((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7);
+	BUG_ON(!((aclk_div + 1) * CORE_ACLK_HZ == APLL_HZ && aclk_div < 0x7));
 
 	pclk_div = APLL_HZ / CORE_PERI_HZ - 1;
-	assert((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf);
+	BUG_ON(!((pclk_div + 1) * CORE_PERI_HZ == APLL_HZ && pclk_div < 0xf));
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     CORE_CLK_PLL_SEL_MASK | CORE_DIV_CON_MASK,

@@ -121,13 +120,13 @@ static void rkclk_init(struct rk322x_cru *cru)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f);
+	BUG_ON(!((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f));
 
 	pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7);
+	BUG_ON(!((pclk_div + 1) * BUS_PCLK_HZ == GPLL_HZ && pclk_div <= 0x7));
 
 	hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3);
+	BUG_ON(!((hclk_div + 1) * BUS_HCLK_HZ == GPLL_HZ && hclk_div <= 0x3));
 
 	rk_clrsetreg(&cru->cru_clksel_con[0],
 		     BUS_ACLK_PLL_SEL_MASK | BUS_ACLK_DIV_MASK,

@@ -144,15 +143,13 @@ static void rkclk_init(struct rk322x_cru *cru)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	BUG_ON(!((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f));
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
+	BUG_ON(!((1 << hclk_div) * PERI_HCLK_HZ == PERI_ACLK_HZ && (hclk_div < 0x4)));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && pclk_div < 0x8);
+	BUG_ON(!((1 << pclk_div) * PERI_PCLK_HZ == PERI_ACLK_HZ && pclk_div < 0x8));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],
 		     PERI_PLL_SEL_MASK | PERI_PCLK_DIV_MASK |

@@ -252,7 +249,7 @@ static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate,
 
 	if (src_clk_div > 128) {
 		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
-		assert(src_clk_div - 1 < 128);
+		BUG_ON(src_clk_div - 1 >= 128);
 		mux = EMMC_SEL_24M;
 	} else {
 		mux = EMMC_SEL_GPLL;

index ac53239..c97bbc4 100644
@@ -152,9 +152,7 @@ static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
 
 	debug("PLL at %x: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n",
 	      (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz);
-	assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
-	       output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ &&
-	       (div->no == 1 || !(div->no % 2)));
+	BUG_ON(!(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ && output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ && (div->no == 1 || !(div->no % 2))));
 
 	/* enter reset */
 	rk_setreg(&pll->con3, 1 << PLL_RESET_SHIFT);

@@ -374,14 +372,12 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PD_BUS_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PD_BUS_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	BUG_ON(!((aclk_div + 1) * PD_BUS_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f));
 	hclk_div = PD_BUS_ACLK_HZ / PD_BUS_HCLK_HZ - 1;
-	assert((hclk_div + 1) * PD_BUS_HCLK_HZ ==
-		PD_BUS_ACLK_HZ && (hclk_div < 0x4) && (hclk_div != 0x2));
+	BUG_ON(!((hclk_div + 1) * PD_BUS_HCLK_HZ == PD_BUS_ACLK_HZ && (hclk_div < 0x4) && (hclk_div != 0x2)));
 
 	pclk_div = PD_BUS_ACLK_HZ / PD_BUS_PCLK_HZ - 1;
-	assert((pclk_div + 1) * PD_BUS_PCLK_HZ ==
-		PD_BUS_ACLK_HZ && pclk_div < 0x7);
+	BUG_ON(!((pclk_div + 1) * PD_BUS_PCLK_HZ == PD_BUS_ACLK_HZ && pclk_div < 0x7));
 
 	rk_clrsetreg(&cru->cru_clksel_con[1],
 		     PD_BUS_PCLK_DIV_MASK | PD_BUS_HCLK_DIV_MASK |

@@ -396,15 +392,13 @@ static void rkclk_init(struct rk3288_cru *cru, struct rk3288_grf *grf)
 	 * set up dependent divisors for PCLK/HCLK and ACLK clocks.
 	 */
 	aclk_div = GPLL_HZ / PERI_ACLK_HZ - 1;
-	assert((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f);
+	BUG_ON(!((aclk_div + 1) * PERI_ACLK_HZ == GPLL_HZ && aclk_div < 0x1f));
 
 	hclk_div = ilog2(PERI_ACLK_HZ / PERI_HCLK_HZ);
-	assert((1 << hclk_div) * PERI_HCLK_HZ ==
-		PERI_ACLK_HZ && (hclk_div < 0x4));
+	BUG_ON(!((1 << hclk_div) * PERI_HCLK_HZ == PERI_ACLK_HZ && (hclk_div < 0x4)));
 
 	pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ);
-	assert((1 << pclk_div) * PERI_PCLK_HZ ==
-		PERI_ACLK_HZ && (pclk_div < 0x4));
+	BUG_ON(!((1 << pclk_div) * PERI_PCLK_HZ == PERI_ACLK_HZ && (pclk_div < 0x4)));
 
 	rk_clrsetreg(&cru->cru_clksel_con[10],
 		     PERI_PCLK_DIV_MASK | PERI_HCLK_DIV_MASK |

@@ -542,14 +536,12 @@ static ulong rockchip_mmc_set_clk(struct rk3288_cru *cru, uint gclk_rate,
 
 	if (src_clk_div > 0x3f) {
 		src_clk_div = DIV_ROUND_UP(OSC_HZ / 2, freq);
-		assert(src_clk_div < 0x40);
+		BUG_ON(src_clk_div >= 0x40);
 		mux = EMMC_PLL_SELECT_24MHZ;
-		assert((int)EMMC_PLL_SELECT_24MHZ ==
-		       (int)MMC0_PLL_SELECT_24MHZ);
+		BUG_ON((int)EMMC_PLL_SELECT_24MHZ != (int)MMC0_PLL_SELECT_24MHZ);
 	} else {
 		mux = EMMC_PLL_SELECT_GENERAL;
-		assert((int)EMMC_PLL_SELECT_GENERAL ==
-		       (int)MMC0_PLL_SELECT_GENERAL);
+		BUG_ON((int)EMMC_PLL_SELECT_GENERAL != (int)MMC0_PLL_SELECT_GENERAL);
 	}
 	switch (periph) {
 	case HCLK_EMMC:

@@ -605,7 +597,7 @@ static ulong rockchip_spi_get_clk(struct rk3288_cru *cru, uint gclk_rate,
 	default:
 		return -EINVAL;
 	}
-	assert(mux == SPI0_PLL_SELECT_GENERAL);
+	BUG_ON(mux != SPI0_PLL_SELECT_GENERAL);
 
 	return DIV_TO_RATE(gclk_rate, div);
 }

@@ -617,7 +609,7 @@ static ulong rockchip_spi_set_clk(struct rk3288_cru *cru, uint gclk_rate,
 
 	debug("%s: clk_general_rate=%u\n", __func__, gclk_rate);
 	src_clk_div = DIV_ROUND_UP(gclk_rate, freq) - 1;
-	assert(src_clk_div < 128);
+	BUG_ON(src_clk_div >= 128);
 	switch (periph) {
 	case SCLK_SPI0:
 		rk_clrsetreg(&cru->cru_clksel_con[25],

@@ -660,7 +652,7 @@ static ulong rockchip_saradc_set_clk(struct rk3288_cru *cru, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
-	assert(src_clk_div < 128);
+	BUG_ON(src_clk_div >= 128);
 
 	rk_clrsetreg(&cru->cru_clksel_con[24],
 		     CLK_SARADC_DIV_CON_MASK,

@@ -766,7 +758,7 @@ static ulong rk3288_clk_set_rate(struct clk *clk, ulong rate)
 
 		/* vop aclk source clk: cpll */
 		div = CPLL_HZ / rate;
-		assert((div - 1 < 64) && (div * rate == CPLL_HZ));
+		BUG_ON(!((div - 1 < 64) && (div * rate == CPLL_HZ)));
 
 		switch (clk->id) {
 		case ACLK_VOP0:

index 4d522a7..21a7a88 100644
@@ -239,9 +239,7 @@ static void rkclk_set_pll(struct rk3328_cru *cru, enum rk_clk_id clk_id,
 	      postdiv2=%d, vco=%u khz, output=%u khz\n",
 	      pll_con, div->fbdiv, div->refdiv, div->postdiv1,
 	      div->postdiv2, vco_khz, output_khz);
-	assert(vco_khz >= VCO_MIN_KHZ && vco_khz <= VCO_MAX_KHZ &&
-	       output_khz >= OUTPUT_MIN_KHZ && output_khz <= OUTPUT_MAX_KHZ &&
-	       div->fbdiv >= PLL_DIV_MIN && div->fbdiv <= PLL_DIV_MAX);
+	BUG_ON(!(vco_khz >= VCO_MIN_KHZ && vco_khz <= VCO_MAX_KHZ && output_khz >= OUTPUT_MIN_KHZ && output_khz <= OUTPUT_MAX_KHZ && div->fbdiv >= PLL_DIV_MIN && div->fbdiv <= PLL_DIV_MAX));
 
 	/*
 	 * When power on or changing PLL setting,

@@ -354,7 +352,7 @@ static ulong rk3328_i2c_set_clk(struct rk3328_cru *cru, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = GPLL_HZ / hz;
-	assert(src_clk_div - 1 < 127);
+	BUG_ON(src_clk_div - 1 >= 127);
 
 	switch (clk_id) {
 	case SCLK_I2C0:

@@ -496,7 +494,7 @@ static ulong rk3328_saradc_set_clk(struct rk3328_cru *cru, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
-	assert(src_clk_div < 128);
+	BUG_ON(src_clk_div >= 128);
 
 	rk_clrsetreg(&cru->clksel_con[23],
 		     CLK_SARADC_DIV_CON_MASK,

index bfeef39..e295afb 100644
@@ -377,7 +377,7 @@ static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(GPLL_HZ, hz);
-	assert(src_clk_div < 127);
+	BUG_ON(src_clk_div >= 127);
 
 	switch (clk_id) {
 	case SCLK_SPI0 ... SCLK_SPI2:

@@ -414,7 +414,7 @@ static ulong rk3368_saradc_set_clk(struct rk3368_cru *cru, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
-	assert(src_clk_div < 128);
+	BUG_ON(src_clk_div >= 128);
 
 	rk_clrsetreg(&cru->clksel_con[25],
 		     CLK_SARADC_DIV_CON_MASK,

143 lines not on this page · raw message

index a119548..38d7548 100644
@@ -147,7 +147,7 @@ static ulong rv1108_saradc_set_clk(struct rv1108_cru *cru, uint hz)
 	int src_clk_div;
 
 	src_clk_div = DIV_ROUND_UP(OSC_HZ, hz) - 1;
-	assert(src_clk_div < 128);
+	BUG_ON(src_clk_div >= 128);
 
 	rk_clrsetreg(&cru->clksel_con[22],
 		     CLK_SARADC_DIV_CON_MASK,

index 3c6ab42..de96024 100644
@@ -32,7 +32,7 @@ static int device_chld_unbind(struct udevice *dev)
 	struct udevice *pos, *n;
 	int ret, saved_ret = 0;
 
-	assert(dev);
+	BUG_ON(!dev);
 
 	list_for_each_entry_safe(pos, n, &dev->child_head, sibling_node) {
 		ret = device_unbind(pos);

@@ -54,7 +54,7 @@ static int device_chld_remove(struct udevice *dev, uint flags)
 	struct udevice *pos, *n;
 	int ret;
 
-	assert(dev);
+	BUG_ON(!dev);
 
 	list_for_each_entry_safe(pos, n, &dev->child_head, sibling_node) {
 		ret = device_remove(pos, flags);

@@ -80,7 +80,7 @@ int device_unbind(struct udevice *dev)
 		return -EINVAL;
 
 	drv = dev->driver;
-	assert(drv);
+	BUG_ON(!drv);
 
 	if (drv->unbind) {
 		ret = drv->unbind(dev);

@@ -173,7 +173,7 @@ int device_remove(struct udevice *dev, uint flags)
 		return 0;
 
 	drv = dev->driver;
-	assert(drv);
+	BUG_ON(!drv);
 
 	ret = uclass_pre_remove_device(dev);
 	if (ret)

index 9a46a7b..df1b6e4 100644
@@ -307,7 +307,7 @@ int device_probe(struct udevice *dev)
 		return 0;
 
 	drv = dev->driver;
-	assert(drv);
+	BUG_ON(!drv);
 
 	/* Allocate private data if requested and not reentered */
 	if (drv->priv_auto_alloc_size && !dev->priv) {

index 0030ab9..e059efe 100644
@@ -18,7 +18,7 @@
 
 int ofnode_read_u32(ofnode node, const char *propname, u32 *outp)
 {
-	assert(ofnode_valid(node));
+	BUG_ON(!ofnode_valid(node));
 	debug("%s: %s: ", __func__, propname);
 
 	if (ofnode_is_np(node)) {

@@ -42,7 +42,7 @@ int ofnode_read_u32(ofnode node, const char *propname, u32 *outp)
 
 int ofnode_read_u32_default(ofnode node, const char *propname, u32 def)
 {
-	assert(ofnode_valid(node));
+	BUG_ON(!ofnode_valid(node));
 	ofnode_read_u32(node, propname, &def);
 
 	return def;

@@ -50,7 +50,7 @@ int ofnode_read_u32_default(ofnode node, const char *propname, u32 def)
 
 int ofnode_read_s32_default(ofnode node, const char *propname, s32 def)
 {
-	assert(ofnode_valid(node));
+	BUG_ON(!ofnode_valid(node));
 	ofnode_read_u32(node, propname, (u32 *)&def);
 
 	return def;

@@ -60,7 +60,7 @@ bool ofnode_read_bool(ofnode node, const char *propname)
 {
 	const void *prop;
 
-	assert(ofnode_valid(node));
+	BUG_ON(!ofnode_valid(node));
 	debug("%s: %s: ", __func__, propname);
 
 	prop = ofnode_get_property(node, propname, NULL);

@@ -75,7 +75,7 @@ const char *ofnode_read_string(ofnode node, const char *propname)
 	const char *str = NULL;
 	int len = -1;
 
-	assert(ofnode_valid(node));
+	BUG_ON(!ofnode_valid(node));
 	debug("%s: %s: ", __func__, propname);
 
 	if (ofnode_is_np(node)) {

@@ -107,7 +107,7 @@ ofnode ofnode_find_subnode(ofnode node, const char *subnode_name)
 {
 	ofnode subnode;
 
-	assert(ofnode_valid(node));
+	BUG_ON(!ofnode_valid(node));
 	debug("%s: %s: ", __func__, subnode_name);
 
 	if (ofnode_is_np(node)) {

@@ -132,7 +132,7 @@ ofnode ofnode_find_subnode(ofnode node, const char *subnode_name)
 int ofnode_read_u32_array(ofnode node, const char *propname,
 			  u32 *out_values, size_t sz)
 {
-	assert(ofnode_valid(node));
+	BUG_ON(!ofnode_valid(node));
 	debug("%s: %s: ", __func__, propname);
 
 	if (ofnode_is_np(node)) {

@@ -147,7 +147,7 @@ int ofnode_read_u32_array(ofnode node, const char *propname,
 
 ofnode ofnode_first_subnode(ofnode node)
 {
-	assert(ofnode_valid(node));
+	BUG_ON(!ofnode_valid(node));
 	if (ofnode_is_np(node))
 		return np_to_ofnode(node.np->child);
 

@@ -157,7 +157,7 @@ ofnode ofnode_first_subnode(ofnode node)
 
 ofnode ofnode_next_subnode(ofnode node)
 {
-	assert(ofnode_valid(node));
+	BUG_ON(!ofnode_valid(node));
 	if (ofnode_is_np(node))
 		return np_to_ofnode(node.np->sibling);
 

@@ -167,7 +167,7 @@ ofnode ofnode_next_subnode(ofnode node)
 
 const char *ofnode_get_name(ofnode node)
 {
-	assert(ofnode_valid(node));
+	BUG_ON(!ofnode_valid(node));
 	if (ofnode_is_np(node))
 		return strrchr(node.np->full_name, '/') + 1;
 

@@ -271,7 +271,7 @@ int ofnode_read_string_count(ofnode node, const char *property)
 static void ofnode_from_fdtdec_phandle_args(struct fdtdec_phandle_args *in,
 					    struct ofnode_phandle_args *out)
 {
-	assert(OF_MAX_PHANDLE_ARGS == MAX_PHANDLE_ARGS);
+	BUG_ON(OF_MAX_PHANDLE_ARGS != MAX_PHANDLE_ARGS);
 	out->node = offset_to_ofnode(in->node);
 	out->args_count = in->args_count;
 	memcpy(out->args, in->args, sizeof(out->args));

@@ -280,7 +280,7 @@ static void ofnode_from_fdtdec_phandle_args(struct fdtdec_phandle_args *in,
 static void ofnode_from_of_phandle_args(struct of_phandle_args *in,
 					struct ofnode_phandle_args *out)
 {
-	assert(OF_MAX_PHANDLE_ARGS == MAX_PHANDLE_ARGS);
+	BUG_ON(OF_MAX_PHANDLE_ARGS != MAX_PHANDLE_ARGS);
 	out->node = np_to_ofnode(in->np);
 	out->args_count = in->args_count;
 	memcpy(out->args, in->args, sizeof(out->args));

index f5e4067..3a47cdc 100644
@@ -371,7 +371,7 @@ int uclass_get_device_tail(struct udevice *dev, int ret, struct udevice **devp)
 	if (ret)
 		return ret;
 
-	assert(dev);
+	BUG_ON(!dev);
 	ret = device_probe(dev);
 	if (ret)
 		return ret;

@@ -569,7 +569,7 @@ int uclass_resolve_seq(struct udevice *dev)
 	int seq;
 	int ret;
 
-	assert(dev->seq == -1);
+	BUG_ON(dev->seq != -1);
 	ret = uclass_find_device_by_seq(dev->uclass->uc_drv->id, dev->req_seq,
 					false, &dup);
 	if (!ret) {

index 9faf335..b3e544a 100644
@@ -480,7 +480,7 @@ const char *gpio_get_bank_info(struct udevice *dev, int *bit_count)
 
 	/* Must be called on an active device */
 	priv = dev_get_uclass_priv(dev);
-	assert(priv);
+	BUG_ON(!priv);
 
 	*bit_count = priv->gpio_count;
 	return priv->bank_name;

index 920811a..3143056 100644
@@ -51,7 +51,7 @@ static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
 	msg->buf = offset_buf;
 	if (!chip->offset_len)
 		return -EADDRNOTAVAIL;
-	assert(chip->offset_len <= I2C_MAX_OFFSET_LEN);
+	BUG_ON(chip->offset_len > I2C_MAX_OFFSET_LEN);
 	offset_len = chip->offset_len;
 	while (offset_len--)
 		*offset_buf++ = offset >> (8 * offset_len);

index 26da3a9..7fb72f0 100644
@@ -248,7 +248,7 @@ static struct input_key_xlate *process_modifier(struct input_config *config,
 	int i;
 
 	/* Start with the main table, and see what modifiers change it */
-	assert(config->num_tables > 0);
+	BUG_ON(0 >= config->num_tables);
 	table = &config->table[0];
 	for (i = 1; i < config->num_tables; i++) {
 		struct input_key_xlate *tab = &config->table[i];

@@ -356,7 +356,7 @@ static int sort_array_by_ordering(int *dest, int count, int *order,
 		if (array_search(order, ocount, temp[i]) == -1)
 			dest[dest_count++] = temp[i];
 	}
-	assert(dest_count == count);
+	BUG_ON(dest_count != count);
 	return same;
 }
 

index cd5bce3..a30f4c9 100644
@@ -184,7 +184,7 @@ int key_matrix_init(struct key_matrix *config, int rows, int cols,
 	config->num_cols = cols;
 	config->key_count = rows * cols;
 	config->ghost_filter = ghost_filter;
-	assert(config->key_count > 0);
+	BUG_ON(0 >= config->key_count);
 
 	return 0;
 }

index eefaaa5..7d700c5 100644
@@ -308,7 +308,7 @@ static int ec_command_inptr(struct cros_ec_dev *dev, uint8_t cmd,
 	debug("%s: len=%d, din=%p\n", __func__, len, din);
 	if (dinp) {
 		/* If we have any data to return, it must be 64bit-aligned */
-		assert(len <= 0 || !((uintptr_t)din & 7));
+		BUG_ON(!(len <= 0 || !((uintptr_t)din & 7)));
 		*dinp = din;
 	}
 

@@ -338,7 +338,7 @@ static int ec_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
 	uint8_t *in_buffer;
 	int len;
 
-	assert((din_len == 0) || din);
+	BUG_ON(!((din_len == 0) || din));
 	len = ec_command_inptr(dev, cmd, cmd_version, dout, dout_len,
 			&in_buffer, din_len);
 	if (len > 0) {

@@ -347,7 +347,7 @@ static int ec_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
 		 * disregard the result.
 		 */
 		if (din && in_buffer) {
-			assert(len <= din_len);
+			BUG_ON(len > din_len);
 			memmove(din, in_buffer, len);
 		}
 	}

@@ -756,7 +756,7 @@ static int cros_ec_flash_write_block(struct cros_ec_dev *dev,
 
 	p->offset = offset;
 	p->size = size;
-	assert(data && p->size <= EC_FLASH_WRITE_VER0_SIZE);
+	BUG_ON(!(data && p->size <= EC_FLASH_WRITE_VER0_SIZE));
 	memcpy(p + 1, data, p->size);
 
 	ret = ec_command_inptr(dev, EC_CMD_FLASH_WRITE, 0,

@@ -787,7 +787,7 @@ static int cros_ec_flash_write_burst_size(struct cros_ec_dev *dev)
  */
 static int cros_ec_data_is_erased(const uint32_t *data, int size)
 {
-	assert(!(size & 3));
+	BUG_ON((size & 3));
 	size /= sizeof(uint32_t);
 	for (; size > 0; size -= 4, data++)
 		if (*data != -1U)

index 6e09340..6e87014 100644
@@ -135,8 +135,8 @@ static int cros_ec_i2c_command(struct udevice *udev, uint8_t cmd,
 		debug("%s: Cannot receive %d bytes\n", __func__, din_len);
 		return -1;
 	}
-	assert(dout_len >= 0);
-	assert(dinp);
+	BUG_ON(0 > dout_len);
+	BUG_ON(!dinp);
 
 	i2c_msg[0].addr = chip->chip_addr;
 	i2c_msg[0].len = out_bytes;

index c03c9cb..a5251aa 100644
@@ -259,7 +259,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,
 
 	/* Emulate NAND_CMD_READOOB */
 	if (command == NAND_CMD_READOOB) {
-		assert(mtd->writesize != 0);
+		BUG_ON(!mtd->writesize);
 		column += mtd->writesize;
 		command = NAND_CMD_READ0;
 	}

index 1ba6815..28ff86d 100644
@@ -138,7 +138,7 @@ static int sandbox_sf_probe(struct udevice *dev)
 	if (!pdata->filename) {
 		struct sandbox_state *state = state_get_current();
 
-		assert(bus->seq != -1);
+		BUG_ON(bus->seq == -1);
 		if (bus->seq < CONFIG_SANDBOX_SPI_MAX_BUS)
 			spec = state->spi[bus->seq][cs].spec;
 		if (!spec) {

@@ -416,7 +416,7 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen,
 
 			cnt = bytes - pos;
 			debug(" tx: read(%u)\n", cnt);
-			assert(tx);
+			BUG_ON(!tx);
 			ret = os_read(sbsf->fd, tx + pos, cnt);
 			if (ret < 0) {
 				puts("sandbox_sf: os_read() failed\n");

index c76f582..4572adb 100644
@@ -591,7 +591,7 @@ static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
 	struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
 
 	dmb();
-	assert(timeout_ms > 0);
+	BUG_ON(0 >= timeout_ms);
 	for (;;) {
 		udelay(1000);	/* throttle polling */
 		reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);

index 68e518f..203816a 100644
@@ -44,7 +44,7 @@ int generic_phy_get_by_index(struct udevice *dev, int index,
 
 	debug("%s(dev=%p, index=%d, phy=%p)\n", __func__, dev, index, phy);
 
-	assert(phy);
+	BUG_ON(!phy);
 	phy->dev = NULL;
 	ret = dev_read_phandle_with_args(dev, "phys", "#phy-cells", 0, index,
 					 &args);

index f50c4d1..12b51b9 100644
@@ -151,7 +151,7 @@ int tps6586x_set_pwm_mode(int mask)
 	uchar val;
 	int ret;
 
-	assert(tps6586x_dev);
+	BUG_ON(!tps6586x_dev);
 	ret = tps6586x_read(PFM_MODE);
 	if (ret != -1) {
 		val = (uchar)ret;

@@ -172,7 +172,7 @@ int tps6586x_adjust_sm0_sm1(int sm0_target, int sm1_target, int step, int rate,
 	int sm0, sm1;
 	int bad;
 
-	assert(tps6586x_dev);
+	BUG_ON(!tps6586x_dev);
 
 	/* get current voltage settings */
 	if (read_voltages(&sm0, &sm1)) {

index 89312c5..29d86ba 100644
@@ -14,7 +14,7 @@ int dm_rtc_get(struct udevice *dev, struct rtc_time *time)
 {
 	struct rtc_ops *ops = rtc_get_ops(dev);
 
-	assert(ops);
+	BUG_ON(!ops);
 	if (!ops->get)
 		return -ENOSYS;
 	return ops->get(dev, time);

@@ -24,7 +24,7 @@ int dm_rtc_set(struct udevice *dev, struct rtc_time *time)
 {
 	struct rtc_ops *ops = rtc_get_ops(dev);
 
-	assert(ops);
+	BUG_ON(!ops);
 	if (!ops->set)
 		return -ENOSYS;
 	return ops->set(dev, time);

@@ -34,7 +34,7 @@ int dm_rtc_reset(struct udevice *dev)
 {
 	struct rtc_ops *ops = rtc_get_ops(dev);
 
-	assert(ops);
+	BUG_ON(!ops);
 	if (!ops->reset)
 		return -ENOSYS;
 	return ops->reset(dev);

@@ -44,7 +44,7 @@ int rtc_read8(struct udevice *dev, unsigned int reg)
 {
 	struct rtc_ops *ops = rtc_get_ops(dev);
 
-	assert(ops);
+	BUG_ON(!ops);
 	if (!ops->read8)
 		return -ENOSYS;
 	return ops->read8(dev, reg);

@@ -54,7 +54,7 @@ int rtc_write8(struct udevice *dev, unsigned int reg, int val)
 {
 	struct rtc_ops *ops = rtc_get_ops(dev);
 
-	assert(ops);
+	BUG_ON(!ops);
 	if (!ops->write8)
 		return -ENOSYS;
 	return ops->write8(dev, reg, val);

index 9dda2db..3ad31c9 100644
@@ -15,7 +15,7 @@ void sound_create_square_wave(unsigned short *data, int size, uint32_t freq)
 	const int period = freq ? sample / freq : 0;
 	const int half = period / 2;
 
-	assert(freq);
+	BUG_ON(!freq);
 
 	/* Make sure we don't overflow our buffer */
 	if (size % 2)

index 89490f7..7b1f9f1 100644
@@ -86,7 +86,7 @@ static void spi_request_bytes(struct exynos_spi *regs, int count, int step)
 		writel(0, &regs->swap_cfg);
 	}
 
-	assert(count && count < (1 << 16));
+	BUG_ON(!(count && count < (1 << 16)));
 	setbits_le32(&regs->ch_cfg, SPI_CH_RST);
 	clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
 

@@ -183,7 +183,7 @@ static int spi_rx_tx(struct exynos_spi_priv *priv, int todo,
 			 * and make sure that we transmit dummy bytes too, to
 			 * keep things going.
 			 */
-			assert(!out_bytes);
+			BUG_ON(out_bytes);
 			out_bytes = in_bytes;
 			toread = in_bytes;
 			txp = NULL;

@@ -355,7 +355,7 @@ static int exynos_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	if ((flags & SPI_XFER_END) && !(priv->mode & SPI_SLAVE)) {
 		spi_cs_deactivate(dev);
 		if (priv->skip_preamble) {
-			assert(!priv->skip_preamble);
+			BUG_ON(priv->skip_preamble);
 			debug("Failed to complete premable transaction\n");
 			ret = -1;
 		}

index 2f84b36..3282bca 100644
@@ -222,7 +222,7 @@ static void setup_response(struct sandbox_flash_priv *priv, void *resp,
 	csw->dCSWDataResidue = 0;
 	csw->bCSWStatus = CSWSTATUS_GOOD;
 
-	assert(!resp || resp == priv->buff);
+	BUG_ON(!(!resp || resp == priv->buff));
 	priv->buff_used = size;
 }
 

index 4e40f4b..49ac144 100644
@@ -211,7 +211,7 @@ static void usb_scan_bus(struct udevice *bus, bool recurse)
 
 	priv = dev_get_uclass_priv(bus);
 
-	assert(recurse);	/* TODO: Support non-recusive */
+	BUG_ON(!recurse);	/* TODO: Support non-recusive */
 
 	printf("scanning bus %d for devices... ", bus->seq);
 	debug("\n");

@@ -744,7 +744,7 @@ struct udevice *usb_get_bus(struct udevice *dev)
 		bus = bus->parent;
 	if (!bus) {
 		/* By design this cannot happen */
-		assert(bus);
+		BUG_ON(!bus);
 		debug("USB HUB '%s' does not have a controller\n", dev->name);
 	}
 

index 26e483c..f2a24b4 100644
@@ -417,7 +417,7 @@ int main(int arg, char **argv)
 
    #ifndef STBTT_assert
    #include <assert.h>
-   #define STBTT_assert(x)    assert(x)
+   #define STBTT_assert(x)    BUG_ON(!x)
    #endif
 
    #ifndef STBTT_strlen

index f04fa08..77ddce1 100644
@@ -38,7 +38,7 @@ static disk_partition_t *part_info;
 
 void ext4fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
 {
-	assert(rbdd->blksz == (1 << rbdd->log2blksz));
+	BUG_ON(rbdd->blksz != (1 << rbdd->log2blksz));
 	ext4fs_blk_desc = rbdd;
 	get_fs()->dev_desc = rbdd;
 	part_info = info;

index dac9545..4b2ca72 100644
@@ -431,7 +431,7 @@ uint16_t ext4fs_checksum_update(uint32_t i)
 		crc = ext2fs_crc16(crc, &le32_i, sizeof(le32_i));
 		crc = ext2fs_crc16(crc, desc, offset);
 		offset += sizeof(desc->bg_checksum);	/* skip checksum */
-		assert(offset == sizeof(*desc));
+		BUG_ON(offset != sizeof(*desc));
 		if (offset < fs->gdsize) {
 			crc = ext2fs_crc16(crc, (__u8 *)desc + offset,
 					   fs->gdsize - offset);

index fed6287..40d4547 100644
@@ -191,7 +191,7 @@ int ext4fs_put_metadata(char *metadata_buffer, uint32_t blknr)
 		return -EINVAL;
 	}
 	if (dirty_block_ptr[gd_index]->buf)
-		assert(dirty_block_ptr[gd_index]->blknr == blknr);
+		BUG_ON(dirty_block_ptr[gd_index]->blknr != blknr);
 	else
 		dirty_block_ptr[gd_index]->buf = zalloc(fs->blksz);
 

index d16883f..dca22a5 100644
@@ -705,7 +705,7 @@ static void fat_itr_child(fat_itr *itr, fat_itr *parent)
 	fsdata *mydata = parent->fsdata;  /* for silly macros */
 	unsigned clustnum = START(parent->dent);
 
-	assert(fat_itr_isdir(parent));
+	BUG_ON(!fat_itr_isdir(parent));
 
 	itr->fsdata = parent->fsdata;
 	if (clustnum > 0) {

index 8b9932a..d81c2dc 100644
@@ -157,9 +157,7 @@ static inline bool ofnode_is_np(ofnode node)
 	 * Check our assumption that flat tree offsets are not used when a
 	 * live tree is in use.
 	 */
-	assert(!ofnode_valid(node) ||
-	       (of_live_active() ? _ofnode_to_np(node)
-				  : _ofnode_to_np(node)));
+	BUG_ON(!(!ofnode_valid(node) || (of_live_active() ? _ofnode_to_np(node) : _ofnode_to_np(node))));
 #endif
 	return of_live_active() && ofnode_valid(node);
 }

index 1b92edb..8b52385 100644
@@ -25,7 +25,7 @@ const char *__efi_nesting_dec(void);
  * Enter the u-boot world from UEFI:
  */
 #define EFI_ENTRY(format, ...) do { \
-	assert(__efi_entry_check()); \
+	BUG_ON(!__efi_entry_check()); \
 	debug("%sEFI: Entry %s(" format ")\n", __efi_nesting_inc(), \
 		__func__, ##__VA_ARGS__); \
 	} while(0)

@@ -37,7 +37,7 @@ const char *__efi_nesting_dec(void);
 	typeof(ret) _r = ret; \
 	debug("%sEFI: Exit: %s: %u\n", __efi_nesting_dec(), \
 		__func__, (u32)((uintptr_t) _r & ~EFI_ERROR_MASK)); \
-	assert(__efi_exit_check()); \
+	BUG_ON(!__efi_exit_check()); \
 	_r; \
 	})
 

@@ -46,9 +46,9 @@ const char *__efi_nesting_dec(void);
  */
 #define EFI_CALL(exp) ({ \
 	debug("%sEFI: Call: %s\n", __efi_nesting_inc(), #exp); \
-	assert(__efi_exit_check()); \
+	BUG_ON(!__efi_exit_check()); \
 	typeof(exp) _r = exp; \
-	assert(__efi_entry_check()); \
+	BUG_ON(!__efi_entry_check()); \
 	debug("%sEFI: %lu returned by %s\n", __efi_nesting_dec(), \
 	      (unsigned long)((uintptr_t)_r & ~EFI_ERROR_MASK), #exp); \
 	_r; \

@@ -59,9 +59,9 @@ const char *__efi_nesting_dec(void);
  */
 #define EFI_CALL_VOID(exp) do { \
 	debug("%sEFI: Call: %s\n", __efi_nesting_inc(), #exp); \
-	assert(__efi_exit_check()); \
+	BUG_ON(!__efi_exit_check()); \
 	exp; \
-	assert(__efi_entry_check()); \
+	BUG_ON(!__efi_entry_check()); \
 	debug("%sEFI: Return From: %s\n", __efi_nesting_dec(), #exp); \
 	} while(0)
 

index 6ed0516..e18601e 100644
@@ -13,12 +13,12 @@
 
 int buf_init (circbuf_t * buf, unsigned int size)
 {
-	assert (buf != NULL);
+	BUG_ON(!buf);
 
 	buf->size = 0;
 	buf->totalsize = size;
 	buf->data = (char *) malloc (sizeof (char) * size);
-	assert (buf->data != NULL);
+	BUG_ON(!buf->data);
 
 	buf->top = buf->data;
 	buf->tail = buf->data;

@@ -29,8 +29,8 @@ int buf_init (circbuf_t * buf, unsigned int size)
 
 int buf_free (circbuf_t * buf)
 {
-	assert (buf != NULL);
-	assert (buf->data != NULL);
+	BUG_ON(!buf);
+	BUG_ON(!buf->data);
 
 	free (buf->data);
 	memset (buf, 0, sizeof (circbuf_t));

@@ -43,8 +43,8 @@ int buf_pop (circbuf_t * buf, char *dest, unsigned int len)
 	unsigned int i;
 	char *p;
 
-	assert (buf != NULL);
-	assert (dest != NULL);
+	BUG_ON(!buf);
+	BUG_ON(!dest);
 
 	p = buf->top;
 

@@ -73,8 +73,8 @@ int buf_push (circbuf_t * buf, const char *src, unsigned int len)
 	unsigned int i;
 	char *p;
 
-	assert (buf != NULL);
-	assert (src != NULL);
+	BUG_ON(!buf);
+	BUG_ON(!src);
 
 	p = buf->tail;
 

index 743b848..b1b25f2 100644
@@ -62,7 +62,7 @@ int __efi_entry_check(void)
 {
 	int ret = entry_count++ == 0;
 #ifdef CONFIG_ARM
-	assert(efi_gd);
+	BUG_ON(!efi_gd);
 	app_gd = gd;
 	gd = efi_gd;
 #endif

index f6e368e..fcd2d5f 100644
@@ -507,7 +507,7 @@ struct efi_device_path *efi_dp_from_eth(void)
 	void *buf, *start;
 	unsigned dpsize = 0;
 
-	assert(eth_get_dev());
+	BUG_ON(!eth_get_dev());
 
 #ifdef CONFIG_DM_ETH
 	dpsize += dp_size(eth_get_dev());

index 52a4e74..b3b49bb 100644
@@ -249,7 +249,7 @@ static efi_status_t dir_read(struct file_handle *fh, u64 *buffer_size,
 	unsigned int required_size;
 
 	if (!fh->dirs) {
-		assert(fh->offset == 0);
+		BUG_ON(fh->offset);
 		fh->dirs = fs_opendir(fh->path);
 		if (!fh->dirs)
 			return EFI_DEVICE_ERROR;

index d47759e..94d8435 100644
@@ -385,7 +385,7 @@ efi_status_t efi_free_pool(void *buffer)
 
 	alloc = container_of(buffer, struct efi_pool_allocation, data);
 	/* Sanity check, was the supplied address returned by allocate_pool */
-	assert(((uintptr_t)alloc & EFI_PAGE_MASK) == 0);
+	BUG_ON(((uintptr_t)alloc & EFI_PAGE_MASK));
 
 	r = efi_free_pages((uintptr_t)alloc, alloc->num_pages);
 

index 30ec6b9..95c6f1f 100644
@@ -78,7 +78,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
 const char *fdtdec_get_compatible(enum fdt_compat_id id)
 {
 	/* We allow reading of the 'unknown' ID for testing purposes */
-	assert(id >= 0 && id < COMPAT_COUNT);
+	BUG_ON(!(id >= 0 && id < COMPAT_COUNT));
 	return compat_names[id];
 }
 

@@ -378,7 +378,7 @@ int fdtdec_next_alias(const void *blob, const char *name,
 	int node, err;
 
 	/* snprintf() is not available */
-	assert(strlen(name) < MAX_STR_LEN);
+	BUG_ON(strlen(name) >= MAX_STR_LEN);
 	sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
 	node = fdt_path_offset(blob, str);
 	if (node < 0)

@@ -505,7 +505,7 @@ int fdtdec_add_aliases_for_id(const void *blob, const char *name,
 			if (j == maxcount)
 				break;
 
-			assert(!node_list[i]);
+			BUG_ON(node_list[i]);
 			node_list[i] = nodes[j++];
 			if (i >= num_found)
 				num_found = i + 1;

@@ -585,7 +585,7 @@ int fdtdec_check_fdt(void)
 	 * FDT (prior to console ready) will need to make their own
 	 * arrangements and do their own checks.
 	 */
-	assert(!fdtdec_prepare_fdt());
+	BUG_ON(fdtdec_prepare_fdt());
 	return 0;
 }
 

index fc37757..4c41624 100644
@@ -25,7 +25,7 @@ static int membuff_putrawflex(struct membuff *mb, int maxlen, bool update,
 	int len;
 
 	/* always write to 'mb->head' */
-	assert(data && offsetp);
+	BUG_ON(!(data && offsetp));
 	*data = &mb->start;
 	*offsetp = mb->head - mb->start;
 

@@ -330,7 +330,7 @@ int membuff_extend_by(struct membuff *mb, int by, int max)
 	char *ptr;
 
 	/* double the buffer size until it is big enough */
-	assert(by >= 0);
+	BUG_ON(0 > by);
 	for (orig = mb->end - mb->start, size = orig; size < orig + by;)
 		size *= 2;
 	if (max != -1)

index f21ac24..463bd09 100644
@@ -16,7 +16,7 @@ phys_addr_t __weak arch_phys_memset(phys_addr_t s, int c, phys_size_t n)
 {
 	void *s_ptr = (void *)(uintptr_t)s;
 
-	assert(((phys_addr_t)(uintptr_t)s) == s);
-	assert(((phys_addr_t)(uintptr_t)(s + n)) == s + n);
+	BUG_ON(((phys_addr_t)(uintptr_t)s) != s);
+	BUG_ON(((phys_addr_t)(uintptr_t)(s + n)) != s + n);
 	return (phys_addr_t)(uintptr_t)memset(s_ptr, c, n);
 }

index 5709884..f1d2427 100644
@@ -28,7 +28,7 @@ void qsort(void  *base,
 	char tmp;
 
 	if ((nel > 1) && (width > 0)) {
-		assert(nel <= ((size_t)(-1)) / width); /* check for overflow */
+		BUG_ON(nel > ((size_t)(-1)) / width); /* check for overflow */
 		wgap = 0;
 		do {
 			wgap = 3 * wgap + 1;

index e26d344..5fa92cf 100644
@@ -165,7 +165,7 @@ slre_dump(const struct slre *r, FILE *fp)
 static void
 set_jump_offset(struct slre *r, int pc, int offset)
 {
-	assert(offset < r->code_size);
+	BUG_ON(offset >= r->code_size);
 
 	if (r->code_size - offset > 0xff)
 		r->err_str = "Jump offset is too big";

@@ -507,8 +507,8 @@ match(const struct slre *r, int pc, const char *s, int len,
 
 	while (res && r->code[pc] != END) {
 
-		assert(pc < r->code_size);
-		assert(pc < (int) (sizeof(r->code) / sizeof(r->code[0])));
+		BUG_ON(pc >= r->code_size);
+		BUG_ON(pc >= (int)(sizeof(r->code) / sizeof(r->code[0])));
 
 		switch (r->code[pc]) {
 		case BRANCH:

@@ -635,7 +635,7 @@ match(const struct slre *r, int pc, const char *s, int len,
 			break;
 		default:
 			printf("unknown cmd (%d) at %d\n", r->code[pc], pc);
-			assert(0);
+			BUG();
 			break;
 		}
 	}

index d30b04b..9c78b8f 100644
@@ -42,7 +42,7 @@ static struct eth_uclass_priv *eth_get_uclass_priv(void)
 	struct uclass *uc;
 
 	uclass_get(UCLASS_ETH, &uc);
-	assert(uc);
+	BUG_ON(!uc);
 	return uc->priv;
 }
 

index be0cf64..0d7c406 100644
@@ -187,7 +187,7 @@ int eth_register(struct eth_device *dev)
 	struct eth_device *d;
 	static int index;
 
-	assert(strlen(dev->name) < sizeof(dev->name));
+	BUG_ON(strlen(dev->name) >= sizeof(dev->name));
 
 	if (!eth_devices) {
 		eth_devices = dev;

index 4259c9e..bc69c1d 100644
@@ -784,7 +784,7 @@ int net_send_udp_packet(uchar *ether, struct in_addr dest, int dport, int sport,
 	int pkt_hdr_size;
 
 	/* make sure the net_tx_packet is initialized (net_init() was called) */
-	assert(net_tx_packet != NULL);
+	BUG_ON(!net_tx_packet);
 	if (net_tx_packet == NULL)
 		return -1;
 

index f76d525..a5360c1 100644
@@ -19,16 +19,16 @@ static int do_ut_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	/* commands separated by \n */
 	run_command_list("setenv list 1\n setenv list ${list}1", -1, 0);
-	assert(!strcmp("11", env_get("list")));
+	BUG_ON(strcmp("11", env_get("list")));
 
 	/* command followed by \n and nothing else */
 	run_command_list("setenv list 1${list}\n", -1, 0);
-	assert(!strcmp("111", env_get("list")));
+	BUG_ON(strcmp("111", env_get("list")));
 
 	/* a command string with \0 in it. Stuff after \0 should be ignored */
 	run_command("setenv list", 0);
 	run_command_list(test_cmd, sizeof(test_cmd), 0);
-	assert(!strcmp("123", env_get("list")));
+	BUG_ON(strcmp("123", env_get("list")));
 
 	/*
 	 * a command list where we limit execution to only the first command

@@ -36,26 +36,26 @@ static int do_ut_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	 */
 	run_command_list("setenv list 1\n setenv list ${list}2; "
 		"setenv list ${list}3", strlen("setenv list 1"), 0);
-	assert(!strcmp("1", env_get("list")));
+	BUG_ON(strcmp("1", env_get("list")));
 
-	assert(run_command("false", 0) == 1);
-	assert(run_command("echo", 0) == 0);
-	assert(run_command_list("false", -1, 0) == 1);
-	assert(run_command_list("echo", -1, 0) == 0);
+	BUG_ON(run_command("false", 0) != 1);
+	BUG_ON(run_command("echo", 0));
+	BUG_ON(run_command_list("false", -1, 0) != 1);
+	BUG_ON(run_command_list("echo", -1, 0));
 
 #ifdef CONFIG_HUSH_PARSER
 	run_command("setenv foo 'setenv black 1\nsetenv adder 2'", 0);
 	run_command("run foo", 0);
-	assert(env_get("black") != NULL);
-	assert(!strcmp("1", env_get("black")));
-	assert(env_get("adder") != NULL);
-	assert(!strcmp("2", env_get("adder")));
+	BUG_ON(!env_get("black"));
+	BUG_ON(strcmp("1", env_get("black")));
+	BUG_ON(!env_get("adder"));
+	BUG_ON(strcmp("2", env_get("adder")));
 #endif
 
-	assert(run_command("", 0) == 0);
-	assert(run_command(" ", 0) == 0);
+	BUG_ON(run_command("", 0));
+	BUG_ON(run_command(" ", 0));
 
-	assert(run_command("'", 0) == 1);
+	BUG_ON(run_command("'", 0) != 1);
 
 	printf("%s: Everything went swimmingly\n", __func__);
 	return 0;

index be4e04e..bba1806 100644
@@ -156,8 +156,8 @@ static int compress_using_bzip2(void *in, unsigned long in_size,
 				unsigned long *out_size)
 {
 	/* There is no bzip2 compression in u-boot, so fake it. */
-	assert(in_size == strlen(plain));
-	assert(memcmp(plain, in, in_size) == 0);
+	BUG_ON(in_size != strlen(plain));
+	BUG_ON(memcmp(plain, in, in_size));
 
 	if (bzip2_compressed_size > out_max)
 		return -1;

@@ -189,8 +189,8 @@ static int compress_using_lzma(void *in, unsigned long in_size,
 			       unsigned long *out_size)
 {
 	/* There is no lzma compression in u-boot, so fake it. */
-	assert(in_size == strlen(plain));
-	assert(memcmp(plain, in, in_size) == 0);
+	BUG_ON(in_size != strlen(plain));
+	BUG_ON(memcmp(plain, in, in_size));
 
 	if (lzma_compressed_size > out_max)
 		return -1;

@@ -221,8 +221,8 @@ static int compress_using_lzo(void *in, unsigned long in_size,
 			      unsigned long *out_size)
 {
 	/* There is no lzo compression in u-boot, so fake it. */
-	assert(in_size == strlen(plain));
-	assert(memcmp(plain, in, in_size) == 0);
+	BUG_ON(in_size != strlen(plain));
+	BUG_ON(memcmp(plain, in, in_size));
 
 	if (lzo_compressed_size > out_max)
 		return -1;

@@ -254,8 +254,8 @@ static int compress_using_lz4(void *in, unsigned long in_size,
 			      unsigned long *out_size)
 {
 	/* There is no lz4 compression in u-boot, so fake it. */
-	assert(in_size == strlen(plain));
-	assert(memcmp(plain, in, in_size) == 0);
+	BUG_ON(in_size != strlen(plain));
+	BUG_ON(memcmp(plain, in, in_size));
 
 	if (lz4_compressed_size > out_max)
 		return -1;

77 lines not on this page · raw message

index 6e24545..f035f76 100644
@@ -76,21 +76,6 @@ typedef volatile unsigned char	vu_char;
 #define warn_non_spl(fmt, args...)			\
 	debug_cond(!_SPL_BUILD, fmt, ##args)
 
-/*
- * An assertion is run-time check done in debug mode only. If DEBUG is not
- * defined then it is skipped. If DEBUG is defined and the assertion fails,
- * then it calls panic*( which may or may not reset/halt U-Boot (see
- * CONFIG_PANIC_HANG), It is hoped that all failing assertions are found
- * before release, and after release it is hoped that they don't matter. But
- * in any case these failing assertions cannot be fixed with a reset (which
- * may just do the same assertion again).
- */
-void __assert_fail(const char *assertion, const char *file, unsigned line,
-		   const char *function);
-#define assert(x) \
-	({ if (!(x) && _DEBUG) \
-		__assert_fail(#x, __FILE__, __LINE__, __func__); })
-
 typedef void (interrupt_handler_t)(void *);
 
 #include <asm/u-boot.h> /* boot information for Linux kernel */

index 0b04813..d5b6d69 100644
@@ -381,12 +381,3 @@ int snprintf(char *buf, size_t size, const char *fmt, ...)
 
 	return ret;
 }
-
-void __assert_fail(const char *assertion, const char *file, unsigned line,
-		   const char *function)
-{
-	/* This will not return */
-	printf("%s:%u: %s: Assertion `%s' failed.", file, line, function,
-	       assertion);
-	hang();
-}

index dd572d2..4208239 100644
@@ -789,15 +789,6 @@ int vprintf(const char *fmt, va_list args)
 	return i;
 }
 
-
-void __assert_fail(const char *assertion, const char *file, unsigned line,
-		   const char *function)
-{
-	/* This will not return */
-	panic("%s:%u: %s: Assertion `%s' failed.", file, line, function,
-	      assertion);
-}
-
 char *simple_itoa(ulong i)
 {
 	/* 21 digits plus null terminator, good for 64-bit or smaller ints */